1// SPDX-License-Identifier: GPL-2.0 2/* 3 * SAMSUNG Exynos5433 TM2 board device tree source 4 * 5 * Copyright (c) 2016 Samsung Electronics Co., Ltd. 6 * 7 * Common device tree source file for Samsung's TM2 and TM2E boards 8 * which are based on Samsung Exynos5433 SoC. 9 */ 10 11/dts-v1/; 12#include "exynos5433.dtsi" 13#include <dt-bindings/clock/samsung,s2mps11.h> 14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/input/input.h> 16#include <dt-bindings/interrupt-controller/irq.h> 17#include <dt-bindings/sound/samsung-i2s.h> 18 19/ { 20 aliases { 21 gsc0 = &gsc_0; 22 gsc1 = &gsc_1; 23 gsc2 = &gsc_2; 24 pinctrl0 = &pinctrl_alive; 25 pinctrl1 = &pinctrl_aud; 26 pinctrl2 = &pinctrl_cpif; 27 pinctrl3 = &pinctrl_ese; 28 pinctrl4 = &pinctrl_finger; 29 pinctrl5 = &pinctrl_fsys; 30 pinctrl6 = &pinctrl_imem; 31 pinctrl7 = &pinctrl_nfc; 32 pinctrl8 = &pinctrl_peric; 33 pinctrl9 = &pinctrl_touch; 34 serial0 = &serial_0; 35 serial1 = &serial_1; 36 serial2 = &serial_2; 37 serial3 = &serial_3; 38 spi0 = &spi_0; 39 spi1 = &spi_1; 40 spi2 = &spi_2; 41 spi3 = &spi_3; 42 spi4 = &spi_4; 43 mshc0 = &mshc_0; 44 mshc2 = &mshc_2; 45 }; 46 47 chosen { 48 stdout-path = &serial_1; 49 }; 50 51 memory@20000000 { 52 device_type = "memory"; 53 reg = <0x0 0x20000000 0x0 0xc0000000>; 54 }; 55 56 gpio-keys { 57 compatible = "gpio-keys"; 58 59 power-key { 60 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>; 61 linux,code = <KEY_POWER>; 62 label = "power key"; 63 debounce-interval = <10>; 64 }; 65 66 volume-up-key { 67 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>; 68 linux,code = <KEY_VOLUMEUP>; 69 label = "volume-up key"; 70 debounce-interval = <10>; 71 }; 72 73 volume-down-key { 74 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>; 75 linux,code = <KEY_VOLUMEDOWN>; 76 label = "volume-down key"; 77 debounce-interval = <10>; 78 }; 79 80 homepage-key { 81 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; 82 linux,code = <KEY_MENU>; 83 label = "homepage key"; 84 debounce-interval = <10>; 85 }; 86 }; 87 88 i2c_max98504: i2c-gpio-0 { 89 compatible = "i2c-gpio"; 90 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */ 91 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >; 92 i2c-gpio,delay-us = <2>; 93 #address-cells = <1>; 94 #size-cells = <0>; 95 status = "okay"; 96 97 max98504: max98504@31 { 98 compatible = "maxim,max98504"; 99 reg = <0x31>; 100 maxim,rx-path = <1>; 101 maxim,tx-path = <1>; 102 maxim,tx-channel-mask = <3>; 103 maxim,tx-channel-source = <2>; 104 }; 105 }; 106 107 irda_regulator: irda-regulator { 108 compatible = "regulator-fixed"; 109 enable-active-high; 110 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>; 111 regulator-name = "irda_regulator"; 112 }; 113 114 sound { 115 compatible = "samsung,tm2-audio"; 116 audio-codec = <&wm5110>, <&hdmi>; 117 i2s-controller = <&i2s0 0>, <&i2s1 0>; 118 audio-amplifier = <&max98504>; 119 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>; 120 model = "wm5110"; 121 samsung,audio-routing = 122 /* Headphone */ 123 "HP", "HPOUT1L", 124 "HP", "HPOUT1R", 125 126 /* Speaker */ 127 "SPK", "SPKOUT", 128 "SPKOUT", "HPOUT2L", 129 "SPKOUT", "HPOUT2R", 130 131 /* Receiver */ 132 "RCV", "HPOUT3L", 133 "RCV", "HPOUT3R"; 134 status = "okay"; 135 }; 136}; 137 138&adc { 139 vdd-supply = <&ldo3_reg>; 140 status = "okay"; 141 142 thermistor-ap { 143 compatible = "murata,ncp03wf104"; 144 pullup-uv = <1800000>; 145 pullup-ohm = <100000>; 146 pulldown-ohm = <0>; 147 io-channels = <&adc 0>; 148 }; 149 150 thermistor-battery { 151 compatible = "murata,ncp03wf104"; 152 pullup-uv = <1800000>; 153 pullup-ohm = <100000>; 154 pulldown-ohm = <0>; 155 io-channels = <&adc 1>; 156 #thermal-sensor-cells = <0>; 157 }; 158 159 thermistor-charger { 160 compatible = "murata,ncp03wf104"; 161 pullup-uv = <1800000>; 162 pullup-ohm = <100000>; 163 pulldown-ohm = <0>; 164 io-channels = <&adc 2>; 165 }; 166}; 167 168&bus_g2d_400 { 169 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>; 170 vdd-supply = <&buck4_reg>; 171 exynos,saturation-ratio = <10>; 172 status = "okay"; 173}; 174 175&bus_g2d_266 { 176 devfreq = <&bus_g2d_400>; 177 status = "okay"; 178}; 179 180&bus_gscl { 181 devfreq = <&bus_g2d_400>; 182 status = "okay"; 183}; 184 185&bus_hevc { 186 devfreq = <&bus_g2d_400>; 187 status = "okay"; 188}; 189 190&bus_jpeg { 191 devfreq = <&bus_g2d_400>; 192 status = "okay"; 193}; 194 195&bus_mfc { 196 devfreq = <&bus_g2d_400>; 197 status = "okay"; 198}; 199 200&bus_mscl { 201 devfreq = <&bus_g2d_400>; 202 status = "okay"; 203}; 204 205&bus_noc0 { 206 devfreq = <&bus_g2d_400>; 207 status = "okay"; 208}; 209 210&bus_noc1 { 211 devfreq = <&bus_g2d_400>; 212 status = "okay"; 213}; 214 215&bus_noc2 { 216 devfreq = <&bus_g2d_400>; 217 status = "okay"; 218}; 219 220&cmu_aud { 221 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>, 222 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>, 223 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>, 224 <&cmu_top CLK_MOUT_AUD_PLL>, 225 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, 226 <&cmu_top CLK_MOUT_SCLK_AUDIO0>, 227 <&cmu_top CLK_MOUT_SCLK_AUDIO1>, 228 <&cmu_top CLK_MOUT_SCLK_SPDIF>, 229 230 <&cmu_aud CLK_DIV_AUD_CA5>, 231 <&cmu_aud CLK_DIV_ACLK_AUD>, 232 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>, 233 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>, 234 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>, 235 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>, 236 <&cmu_aud CLK_DIV_SCLK_AUD_UART>, 237 <&cmu_top CLK_DIV_SCLK_AUDIO0>, 238 <&cmu_top CLK_DIV_SCLK_AUDIO1>, 239 <&cmu_top CLK_DIV_SCLK_PCM1>, 240 <&cmu_top CLK_DIV_SCLK_I2S1>; 241 242 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>, 243 <&cmu_aud CLK_MOUT_AUD_PLL_USER>, 244 <&cmu_aud CLK_MOUT_AUD_PLL_USER>, 245 <&cmu_top CLK_FOUT_AUD_PLL>, 246 <&cmu_top CLK_MOUT_AUD_PLL>, 247 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, 248 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, 249 <&cmu_top CLK_SCLK_AUDIO0>; 250 251 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, 252 <196608001>, <65536001>, <32768001>, <49152001>, 253 <2048001>, <24576001>, <196608001>, 254 <24576001>, <98304001>, <2048001>, <49152001>; 255}; 256 257&cmu_fsys { 258 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, 259 <&cmu_top CLK_MOUT_SCLK_USBHOST30>, 260 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, 261 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, 262 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, 263 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, 264 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, 265 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, 266 <&cmu_top CLK_DIV_SCLK_USBDRD30>, 267 <&cmu_top CLK_DIV_SCLK_USBHOST30>; 268 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, 269 <&cmu_top CLK_MOUT_BUS_PLL_USER>, 270 <&cmu_top CLK_SCLK_USBDRD30_FSYS>, 271 <&cmu_top CLK_SCLK_USBHOST30_FSYS>, 272 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, 273 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, 274 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, 275 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; 276 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, 277 <66700000>, <66700000>; 278}; 279 280&cmu_gscl { 281 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, 282 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; 283 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, 284 <&cmu_top CLK_ACLK_GSCL_333>; 285}; 286 287&cmu_mfc { 288 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>; 289 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>; 290}; 291 292&cmu_mscl { 293 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, 294 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 295 <&cmu_mscl CLK_MOUT_SCLK_JPEG>, 296 <&cmu_top CLK_MOUT_SCLK_JPEG_A>; 297 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>, 298 <&cmu_top CLK_SCLK_JPEG_MSCL>, 299 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 300 <&cmu_top CLK_MOUT_BUS_PLL_USER>; 301}; 302 303&cmu_top { 304 assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>; 305 assigned-clock-rates = <196608001>; 306}; 307 308&cpu0 { 309 cpu-supply = <&buck3_reg>; 310}; 311 312&cpu4 { 313 cpu-supply = <&buck2_reg>; 314}; 315 316&decon { 317 status = "okay"; 318}; 319 320&decon_tv { 321 status = "okay"; 322 323 ports { 324 #address-cells = <1>; 325 #size-cells = <0>; 326 327 port@0 { 328 reg = <0>; 329 tv_to_hdmi: endpoint { 330 remote-endpoint = <&hdmi_to_tv>; 331 }; 332 }; 333 }; 334}; 335 336&dsi { 337 status = "okay"; 338 vddcore-supply = <&ldo6_reg>; 339 vddio-supply = <&ldo7_reg>; 340 samsung,burst-clock-frequency = <512000000>; 341 samsung,esc-clock-frequency = <16000000>; 342 samsung,pll-clock-frequency = <24000000>; 343 pinctrl-names = "default"; 344 pinctrl-0 = <&te_irq>; 345}; 346 347&hdmi { 348 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>; 349 status = "okay"; 350 vdd-supply = <&ldo6_reg>; 351 vdd_osc-supply = <&ldo7_reg>; 352 vdd_pll-supply = <&ldo6_reg>; 353 354 ports { 355 #address-cells = <1>; 356 #size-cells = <0>; 357 358 port@0 { 359 reg = <0>; 360 hdmi_to_tv: endpoint { 361 remote-endpoint = <&tv_to_hdmi>; 362 }; 363 }; 364 365 port@1 { 366 reg = <1>; 367 hdmi_to_mhl: endpoint { 368 remote-endpoint = <&mhl_to_hdmi>; 369 }; 370 }; 371 }; 372}; 373 374&hsi2c_0 { 375 status = "okay"; 376 clock-frequency = <2500000>; 377 378 s2mps13-pmic@66 { 379 compatible = "samsung,s2mps13-pmic"; 380 interrupt-parent = <&gpa0>; 381 interrupts = <7 IRQ_TYPE_NONE>; 382 reg = <0x66>; 383 samsung,s2mps11-wrstbi-ground; 384 385 s2mps13_osc: clocks { 386 compatible = "samsung,s2mps13-clk"; 387 #clock-cells = <1>; 388 clock-output-names = "s2mps13_ap", "s2mps13_cp", 389 "s2mps13_bt"; 390 }; 391 392 regulators { 393 ldo1_reg: LDO1 { 394 regulator-name = "VDD_ALIVE_0.9V_AP"; 395 regulator-min-microvolt = <900000>; 396 regulator-max-microvolt = <900000>; 397 regulator-always-on; 398 }; 399 400 ldo2_reg: LDO2 { 401 regulator-name = "VDDQ_MMC2_2.8V_AP"; 402 regulator-min-microvolt = <2800000>; 403 regulator-max-microvolt = <2800000>; 404 regulator-always-on; 405 regulator-state-mem { 406 regulator-off-in-suspend; 407 }; 408 }; 409 410 ldo3_reg: LDO3 { 411 regulator-name = "VDD1_E_1.8V_AP"; 412 regulator-min-microvolt = <1800000>; 413 regulator-max-microvolt = <1800000>; 414 regulator-always-on; 415 }; 416 417 ldo4_reg: LDO4 { 418 regulator-name = "VDD10_MIF_PLL_1.0V_AP"; 419 regulator-min-microvolt = <1300000>; 420 regulator-max-microvolt = <1300000>; 421 regulator-always-on; 422 regulator-state-mem { 423 regulator-off-in-suspend; 424 }; 425 }; 426 427 ldo5_reg: LDO5 { 428 regulator-name = "VDD10_DPLL_1.0V_AP"; 429 regulator-min-microvolt = <1000000>; 430 regulator-max-microvolt = <1000000>; 431 regulator-always-on; 432 regulator-state-mem { 433 regulator-off-in-suspend; 434 }; 435 }; 436 437 ldo6_reg: LDO6 { 438 regulator-name = "VDD10_MIPI2L_1.0V_AP"; 439 regulator-min-microvolt = <1000000>; 440 regulator-max-microvolt = <1000000>; 441 regulator-state-mem { 442 regulator-off-in-suspend; 443 }; 444 }; 445 446 ldo7_reg: LDO7 { 447 regulator-name = "VDD18_MIPI2L_1.8V_AP"; 448 regulator-min-microvolt = <1800000>; 449 regulator-max-microvolt = <1800000>; 450 regulator-always-on; 451 regulator-state-mem { 452 regulator-off-in-suspend; 453 }; 454 }; 455 456 ldo8_reg: LDO8 { 457 regulator-name = "VDD18_LLI_1.8V_AP"; 458 regulator-min-microvolt = <1800000>; 459 regulator-max-microvolt = <1800000>; 460 regulator-always-on; 461 regulator-state-mem { 462 regulator-off-in-suspend; 463 }; 464 }; 465 466 ldo9_reg: LDO9 { 467 regulator-name = "VDD18_ABB_ETC_1.8V_AP"; 468 regulator-min-microvolt = <1800000>; 469 regulator-max-microvolt = <1800000>; 470 regulator-always-on; 471 regulator-state-mem { 472 regulator-off-in-suspend; 473 }; 474 }; 475 476 ldo10_reg: LDO10 { 477 regulator-name = "VDD33_USB30_3.0V_AP"; 478 regulator-min-microvolt = <3000000>; 479 regulator-max-microvolt = <3000000>; 480 regulator-state-mem { 481 regulator-off-in-suspend; 482 }; 483 }; 484 485 ldo11_reg: LDO11 { 486 regulator-name = "VDD_INT_M_1.0V_AP"; 487 regulator-min-microvolt = <1000000>; 488 regulator-max-microvolt = <1000000>; 489 regulator-always-on; 490 regulator-state-mem { 491 regulator-off-in-suspend; 492 }; 493 }; 494 495 ldo12_reg: LDO12 { 496 regulator-name = "VDD_KFC_M_1.1V_AP"; 497 regulator-min-microvolt = <800000>; 498 regulator-max-microvolt = <1350000>; 499 regulator-always-on; 500 }; 501 502 ldo13_reg: LDO13 { 503 regulator-name = "VDD_G3D_M_0.95V_AP"; 504 regulator-min-microvolt = <950000>; 505 regulator-max-microvolt = <950000>; 506 regulator-always-on; 507 regulator-state-mem { 508 regulator-off-in-suspend; 509 }; 510 }; 511 512 ldo14_reg: LDO14 { 513 regulator-name = "VDDQ_M1_LDO_1.2V_AP"; 514 regulator-min-microvolt = <1200000>; 515 regulator-max-microvolt = <1200000>; 516 regulator-always-on; 517 regulator-state-mem { 518 regulator-off-in-suspend; 519 }; 520 }; 521 522 ldo15_reg: LDO15 { 523 regulator-name = "VDDQ_M2_LDO_1.2V_AP"; 524 regulator-min-microvolt = <1200000>; 525 regulator-max-microvolt = <1200000>; 526 regulator-always-on; 527 regulator-state-mem { 528 regulator-off-in-suspend; 529 }; 530 }; 531 532 ldo16_reg: LDO16 { 533 regulator-name = "VDDQ_EFUSE"; 534 regulator-min-microvolt = <1400000>; 535 regulator-max-microvolt = <3400000>; 536 regulator-always-on; 537 }; 538 539 ldo17_reg: LDO17 { 540 regulator-name = "V_TFLASH_2.8V_AP"; 541 regulator-min-microvolt = <2800000>; 542 regulator-max-microvolt = <2800000>; 543 }; 544 545 ldo18_reg: LDO18 { 546 regulator-name = "V_CODEC_1.8V_AP"; 547 regulator-min-microvolt = <1800000>; 548 regulator-max-microvolt = <1800000>; 549 }; 550 551 ldo19_reg: LDO19 { 552 regulator-name = "VDDA_1.8V_COMP"; 553 regulator-min-microvolt = <1800000>; 554 regulator-max-microvolt = <1800000>; 555 regulator-always-on; 556 }; 557 558 ldo20_reg: LDO20 { 559 regulator-name = "VCC_2.8V_AP"; 560 regulator-min-microvolt = <2800000>; 561 regulator-max-microvolt = <2800000>; 562 regulator-always-on; 563 }; 564 565 ldo21_reg: LDO21 { 566 regulator-name = "VT_CAM_1.8V"; 567 regulator-min-microvolt = <1800000>; 568 regulator-max-microvolt = <1800000>; 569 }; 570 571 ldo22_reg: LDO22 { 572 regulator-name = "CAM_IO_1.8V_AP"; 573 regulator-min-microvolt = <1800000>; 574 regulator-max-microvolt = <1800000>; 575 }; 576 577 ldo23_reg: LDO23 { 578 regulator-name = "CAM_SEN_CORE_1.05V_AP"; 579 regulator-min-microvolt = <1050000>; 580 regulator-max-microvolt = <1050000>; 581 }; 582 583 ldo24_reg: LDO24 { 584 regulator-name = "VT_CAM_1.2V"; 585 regulator-min-microvolt = <1200000>; 586 regulator-max-microvolt = <1200000>; 587 }; 588 589 ldo25_reg: LDO25 { 590 regulator-name = "UNUSED_LDO25"; 591 regulator-min-microvolt = <2800000>; 592 regulator-max-microvolt = <2800000>; 593 }; 594 595 ldo26_reg: LDO26 { 596 regulator-name = "CAM_AF_2.8V_AP"; 597 regulator-min-microvolt = <2800000>; 598 regulator-max-microvolt = <2800000>; 599 }; 600 601 ldo27_reg: LDO27 { 602 regulator-name = "VCC_3.0V_LCD_AP"; 603 regulator-min-microvolt = <3000000>; 604 regulator-max-microvolt = <3000000>; 605 }; 606 607 ldo28_reg: LDO28 { 608 regulator-name = "VCC_1.8V_LCD_AP"; 609 regulator-min-microvolt = <1800000>; 610 regulator-max-microvolt = <1800000>; 611 }; 612 613 ldo29_reg: LDO29 { 614 regulator-name = "VT_CAM_2.8V"; 615 regulator-min-microvolt = <3000000>; 616 regulator-max-microvolt = <3000000>; 617 }; 618 619 ldo30_reg: LDO30 { 620 regulator-name = "TSP_AVDD_3.3V_AP"; 621 regulator-min-microvolt = <3300000>; 622 regulator-max-microvolt = <3300000>; 623 }; 624 625 ldo31_reg: LDO31 { 626 /* 627 * LDO31 differs from target to target, 628 * its definition is in the .dts 629 */ 630 }; 631 632 ldo32_reg: LDO32 { 633 regulator-name = "VTOUCH_1.8V_AP"; 634 regulator-min-microvolt = <1800000>; 635 regulator-max-microvolt = <1800000>; 636 }; 637 638 ldo33_reg: LDO33 { 639 regulator-name = "VTOUCH_LED_3.3V"; 640 regulator-min-microvolt = <2500000>; 641 regulator-max-microvolt = <3300000>; 642 regulator-ramp-delay = <12500>; 643 }; 644 645 ldo34_reg: LDO34 { 646 regulator-name = "VCC_1.8V_MHL_AP"; 647 regulator-min-microvolt = <1000000>; 648 regulator-max-microvolt = <2100000>; 649 }; 650 651 ldo35_reg: LDO35 { 652 regulator-name = "OIS_VM_2.8V"; 653 regulator-min-microvolt = <1800000>; 654 regulator-max-microvolt = <2800000>; 655 }; 656 657 ldo36_reg: LDO36 { 658 regulator-name = "VSIL_1.0V"; 659 regulator-min-microvolt = <1000000>; 660 regulator-max-microvolt = <1000000>; 661 }; 662 663 ldo37_reg: LDO37 { 664 regulator-name = "VF_1.8V"; 665 regulator-min-microvolt = <1800000>; 666 regulator-max-microvolt = <1800000>; 667 }; 668 669 ldo38_reg: LDO38 { 670 /* 671 * LDO38 differs from target to target, 672 * its definition is in the .dts 673 */ 674 }; 675 676 ldo39_reg: LDO39 { 677 regulator-name = "V_HRM_1.8V"; 678 regulator-min-microvolt = <1800000>; 679 regulator-max-microvolt = <1800000>; 680 }; 681 682 ldo40_reg: LDO40 { 683 regulator-name = "V_HRM_3.3V"; 684 regulator-min-microvolt = <3300000>; 685 regulator-max-microvolt = <3300000>; 686 }; 687 688 buck1_reg: BUCK1 { 689 regulator-name = "VDD_MIF_0.9V_AP"; 690 regulator-min-microvolt = <600000>; 691 regulator-max-microvolt = <1500000>; 692 regulator-always-on; 693 regulator-state-mem { 694 regulator-off-in-suspend; 695 }; 696 }; 697 698 buck2_reg: BUCK2 { 699 regulator-name = "VDD_EGL_1.0V_AP"; 700 regulator-min-microvolt = <900000>; 701 regulator-max-microvolt = <1300000>; 702 regulator-always-on; 703 regulator-state-mem { 704 regulator-off-in-suspend; 705 }; 706 }; 707 708 buck3_reg: BUCK3 { 709 regulator-name = "VDD_KFC_1.0V_AP"; 710 regulator-min-microvolt = <800000>; 711 regulator-max-microvolt = <1200000>; 712 regulator-always-on; 713 regulator-state-mem { 714 regulator-off-in-suspend; 715 }; 716 }; 717 718 buck4_reg: BUCK4 { 719 regulator-name = "VDD_INT_0.95V_AP"; 720 regulator-min-microvolt = <600000>; 721 regulator-max-microvolt = <1500000>; 722 regulator-always-on; 723 regulator-state-mem { 724 regulator-off-in-suspend; 725 }; 726 }; 727 728 buck5_reg: BUCK5 { 729 regulator-name = "VDD_DISP_CAM0_0.9V_AP"; 730 regulator-min-microvolt = <600000>; 731 regulator-max-microvolt = <1500000>; 732 regulator-always-on; 733 regulator-state-mem { 734 regulator-off-in-suspend; 735 }; 736 }; 737 738 buck6_reg: BUCK6 { 739 regulator-name = "VDD_G3D_0.9V_AP"; 740 regulator-min-microvolt = <600000>; 741 regulator-max-microvolt = <1500000>; 742 regulator-always-on; 743 regulator-state-mem { 744 regulator-off-in-suspend; 745 }; 746 }; 747 748 buck7_reg: BUCK7 { 749 regulator-name = "VDD_MEM1_1.2V_AP"; 750 regulator-min-microvolt = <1200000>; 751 regulator-max-microvolt = <1200000>; 752 regulator-always-on; 753 }; 754 755 buck8_reg: BUCK8 { 756 regulator-name = "VDD_LLDO_1.35V_AP"; 757 regulator-min-microvolt = <1350000>; 758 regulator-max-microvolt = <3300000>; 759 regulator-always-on; 760 }; 761 762 buck9_reg: BUCK9 { 763 regulator-name = "VDD_MLDO_2.0V_AP"; 764 regulator-min-microvolt = <1350000>; 765 regulator-max-microvolt = <3300000>; 766 regulator-always-on; 767 }; 768 769 buck10_reg: BUCK10 { 770 regulator-name = "vdd_mem2"; 771 regulator-min-microvolt = <550000>; 772 regulator-max-microvolt = <1500000>; 773 regulator-always-on; 774 }; 775 }; 776 }; 777}; 778 779&hsi2c_4 { 780 status = "okay"; 781 782 s3fwrn5: nfc@27 { 783 compatible = "samsung,s3fwrn5-i2c"; 784 reg = <0x27>; 785 interrupt-parent = <&gpa1>; 786 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; 787 s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; 788 s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; 789 }; 790}; 791 792&hsi2c_5 { 793 status = "okay"; 794 795 stmfts: touchscreen@49 { 796 compatible = "st,stmfts"; 797 reg = <0x49>; 798 interrupt-parent = <&gpa1>; 799 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 800 avdd-supply = <&ldo30_reg>; 801 vdd-supply = <&ldo31_reg>; 802 }; 803}; 804 805&hsi2c_7 { 806 status = "okay"; 807 clock-frequency = <1000000>; 808 809 sii8620@39 { 810 reg = <0x39>; 811 compatible = "sil,sii8620"; 812 cvcc10-supply = <&ldo36_reg>; 813 iovcc18-supply = <&ldo34_reg>; 814 interrupt-parent = <&gpf0>; 815 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 816 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; 817 clocks = <&pmu_system_controller 0>; 818 clock-names = "xtal"; 819 820 ports { 821 #address-cells = <1>; 822 #size-cells = <0>; 823 824 port@0 { 825 reg = <0>; 826 mhl_to_hdmi: endpoint { 827 remote-endpoint = <&hdmi_to_mhl>; 828 }; 829 }; 830 831 port@1 { 832 reg = <1>; 833 mhl_to_musb_con: endpoint { 834 remote-endpoint = <&musb_con_to_mhl>; 835 }; 836 }; 837 }; 838 }; 839}; 840 841&hsi2c_8 { 842 status = "okay"; 843 844 max77843@66 { 845 compatible = "maxim,max77843"; 846 interrupt-parent = <&gpa1>; 847 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 848 reg = <0x66>; 849 850 muic: max77843-muic { 851 compatible = "maxim,max77843-muic"; 852 853 musb_con: musb_connector { 854 compatible = "samsung,usb-connector-11pin", 855 "usb-b-connector"; 856 label = "micro-USB"; 857 type = "micro"; 858 859 ports { 860 #address-cells = <1>; 861 #size-cells = <0>; 862 863 port@3 { 864 reg = <3>; 865 musb_con_to_mhl: endpoint { 866 remote-endpoint = <&mhl_to_musb_con>; 867 }; 868 }; 869 }; 870 }; 871 872 ports { 873 port { 874 muic_to_usb: endpoint { 875 remote-endpoint = <&usb_to_muic>; 876 }; 877 }; 878 }; 879 }; 880 881 regulators { 882 compatible = "maxim,max77843-regulator"; 883 safeout1_reg: SAFEOUT1 { 884 regulator-name = "SAFEOUT1"; 885 regulator-min-microvolt = <3300000>; 886 regulator-max-microvolt = <4950000>; 887 }; 888 889 safeout2_reg: SAFEOUT2 { 890 regulator-name = "SAFEOUT2"; 891 regulator-min-microvolt = <3300000>; 892 regulator-max-microvolt = <4950000>; 893 }; 894 895 charger_reg: CHARGER { 896 regulator-name = "CHARGER"; 897 regulator-min-microamp = <100000>; 898 regulator-max-microamp = <3150000>; 899 }; 900 }; 901 902 haptic: max77843-haptic { 903 compatible = "maxim,max77843-haptic"; 904 haptic-supply = <&ldo38_reg>; 905 pwms = <&pwm 0 33670 0>; 906 pwm-names = "haptic"; 907 }; 908 }; 909}; 910 911&hsi2c_11 { 912 status = "okay"; 913}; 914 915&i2s0 { 916 status = "okay"; 917}; 918 919&i2s1 { 920 assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>; 921 assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>; 922 status = "okay"; 923}; 924 925&mshc_0 { 926 status = "okay"; 927 mmc-hs200-1_8v; 928 mmc-hs400-1_8v; 929 cap-mmc-highspeed; 930 non-removable; 931 card-detect-delay = <200>; 932 samsung,dw-mshc-ciu-div = <3>; 933 samsung,dw-mshc-sdr-timing = <0 4>; 934 samsung,dw-mshc-ddr-timing = <0 2>; 935 samsung,dw-mshc-hs400-timing = <0 3>; 936 samsung,read-strobe-delay = <90>; 937 fifo-depth = <0x80>; 938 pinctrl-names = "default"; 939 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 940 &sd0_bus8 &sd0_rdqs>; 941 bus-width = <8>; 942 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; 943 assigned-clock-rates = <800000000>; 944}; 945 946&mshc_2 { 947 status = "okay"; 948 cap-sd-highspeed; 949 disable-wp; 950 cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>; 951 card-detect-delay = <200>; 952 samsung,dw-mshc-ciu-div = <3>; 953 samsung,dw-mshc-sdr-timing = <0 4>; 954 samsung,dw-mshc-ddr-timing = <0 2>; 955 fifo-depth = <0x80>; 956 pinctrl-names = "default"; 957 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; 958 bus-width = <4>; 959}; 960 961&ppmu_d0_general { 962 status = "okay"; 963 events { 964 ppmu_event0_d0_general: ppmu-event0-d0-general { 965 event-name = "ppmu-event0-d0-general"; 966 }; 967 }; 968}; 969 970&ppmu_d1_general { 971 status = "okay"; 972 events { 973 ppmu_event0_d1_general: ppmu-event0-d1-general { 974 event-name = "ppmu-event0-d1-general"; 975 }; 976 }; 977}; 978 979&pinctrl_alive { 980 pinctrl-names = "default"; 981 pinctrl-0 = <&initial_alive>; 982 983 initial_alive: initial-state { 984 PIN(INPUT, gpa0-0, DOWN, FAST_SR1); 985 PIN(INPUT, gpa0-1, NONE, FAST_SR1); 986 PIN(INPUT, gpa0-2, DOWN, FAST_SR1); 987 PIN(INPUT, gpa0-3, NONE, FAST_SR1); 988 PIN(INPUT, gpa0-4, NONE, FAST_SR1); 989 PIN(INPUT, gpa0-5, DOWN, FAST_SR1); 990 PIN(INPUT, gpa0-6, NONE, FAST_SR1); 991 PIN(INPUT, gpa0-7, NONE, FAST_SR1); 992 993 PIN(INPUT, gpa1-0, UP, FAST_SR1); 994 PIN(INPUT, gpa1-1, UP, FAST_SR1); 995 PIN(INPUT, gpa1-2, NONE, FAST_SR1); 996 PIN(INPUT, gpa1-3, DOWN, FAST_SR1); 997 PIN(INPUT, gpa1-4, DOWN, FAST_SR1); 998 PIN(INPUT, gpa1-5, NONE, FAST_SR1); 999 PIN(INPUT, gpa1-6, NONE, FAST_SR1); 1000 PIN(INPUT, gpa1-7, NONE, FAST_SR1); 1001 1002 PIN(INPUT, gpa2-0, NONE, FAST_SR1); 1003 PIN(INPUT, gpa2-1, NONE, FAST_SR1); 1004 PIN(INPUT, gpa2-2, NONE, FAST_SR1); 1005 PIN(INPUT, gpa2-3, DOWN, FAST_SR1); 1006 PIN(INPUT, gpa2-4, NONE, FAST_SR1); 1007 PIN(INPUT, gpa2-5, DOWN, FAST_SR1); 1008 PIN(INPUT, gpa2-6, DOWN, FAST_SR1); 1009 PIN(INPUT, gpa2-7, NONE, FAST_SR1); 1010 1011 PIN(INPUT, gpa3-0, DOWN, FAST_SR1); 1012 PIN(INPUT, gpa3-1, DOWN, FAST_SR1); 1013 PIN(INPUT, gpa3-2, NONE, FAST_SR1); 1014 PIN(INPUT, gpa3-3, DOWN, FAST_SR1); 1015 PIN(INPUT, gpa3-4, NONE, FAST_SR1); 1016 PIN(INPUT, gpa3-5, DOWN, FAST_SR1); 1017 PIN(INPUT, gpa3-6, DOWN, FAST_SR1); 1018 PIN(INPUT, gpa3-7, DOWN, FAST_SR1); 1019 1020 PIN(INPUT, gpf1-0, NONE, FAST_SR1); 1021 PIN(INPUT, gpf1-1, NONE, FAST_SR1); 1022 PIN(INPUT, gpf1-2, DOWN, FAST_SR1); 1023 PIN(INPUT, gpf1-4, UP, FAST_SR1); 1024 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1); 1025 PIN(INPUT, gpf1-6, DOWN, FAST_SR1); 1026 PIN(INPUT, gpf1-7, DOWN, FAST_SR1); 1027 1028 PIN(INPUT, gpf2-0, DOWN, FAST_SR1); 1029 PIN(INPUT, gpf2-1, DOWN, FAST_SR1); 1030 PIN(INPUT, gpf2-2, DOWN, FAST_SR1); 1031 PIN(INPUT, gpf2-3, DOWN, FAST_SR1); 1032 1033 PIN(INPUT, gpf3-0, DOWN, FAST_SR1); 1034 PIN(INPUT, gpf3-1, DOWN, FAST_SR1); 1035 PIN(INPUT, gpf3-2, NONE, FAST_SR1); 1036 PIN(INPUT, gpf3-3, DOWN, FAST_SR1); 1037 1038 PIN(INPUT, gpf4-0, DOWN, FAST_SR1); 1039 PIN(INPUT, gpf4-1, DOWN, FAST_SR1); 1040 PIN(INPUT, gpf4-2, DOWN, FAST_SR1); 1041 PIN(INPUT, gpf4-3, DOWN, FAST_SR1); 1042 PIN(INPUT, gpf4-4, DOWN, FAST_SR1); 1043 PIN(INPUT, gpf4-5, DOWN, FAST_SR1); 1044 PIN(INPUT, gpf4-6, DOWN, FAST_SR1); 1045 PIN(INPUT, gpf4-7, DOWN, FAST_SR1); 1046 1047 PIN(INPUT, gpf5-0, DOWN, FAST_SR1); 1048 PIN(INPUT, gpf5-1, DOWN, FAST_SR1); 1049 PIN(INPUT, gpf5-2, DOWN, FAST_SR1); 1050 PIN(INPUT, gpf5-3, DOWN, FAST_SR1); 1051 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1); 1052 PIN(INPUT, gpf5-5, DOWN, FAST_SR1); 1053 PIN(INPUT, gpf5-6, DOWN, FAST_SR1); 1054 PIN(INPUT, gpf5-7, DOWN, FAST_SR1); 1055 }; 1056 1057 te_irq: te_irq { 1058 samsung,pins = "gpf1-3"; 1059 samsung,pin-function = <0xf>; 1060 }; 1061}; 1062 1063&pinctrl_cpif { 1064 pinctrl-names = "default"; 1065 pinctrl-0 = <&initial_cpif>; 1066 1067 initial_cpif: initial-state { 1068 PIN(INPUT, gpv6-0, DOWN, FAST_SR1); 1069 PIN(INPUT, gpv6-1, DOWN, FAST_SR1); 1070 }; 1071}; 1072 1073&pinctrl_ese { 1074 pinctrl-names = "default"; 1075 pinctrl-0 = <&initial_ese>; 1076 1077 initial_ese: initial-state { 1078 PIN(INPUT, gpj2-0, DOWN, FAST_SR1); 1079 PIN(INPUT, gpj2-1, DOWN, FAST_SR1); 1080 PIN(INPUT, gpj2-2, DOWN, FAST_SR1); 1081 }; 1082}; 1083 1084&pinctrl_fsys { 1085 pinctrl-names = "default"; 1086 pinctrl-0 = <&initial_fsys>; 1087 1088 initial_fsys: initial-state { 1089 PIN(INPUT, gpr3-0, NONE, FAST_SR1); 1090 PIN(INPUT, gpr3-1, DOWN, FAST_SR1); 1091 PIN(INPUT, gpr3-2, DOWN, FAST_SR1); 1092 PIN(INPUT, gpr3-3, DOWN, FAST_SR1); 1093 PIN(INPUT, gpr3-7, NONE, FAST_SR1); 1094 }; 1095}; 1096 1097&pinctrl_imem { 1098 pinctrl-names = "default"; 1099 pinctrl-0 = <&initial_imem>; 1100 1101 initial_imem: initial-state { 1102 PIN(INPUT, gpf0-0, UP, FAST_SR1); 1103 PIN(INPUT, gpf0-1, UP, FAST_SR1); 1104 PIN(INPUT, gpf0-2, DOWN, FAST_SR1); 1105 PIN(INPUT, gpf0-3, UP, FAST_SR1); 1106 PIN(INPUT, gpf0-4, DOWN, FAST_SR1); 1107 PIN(INPUT, gpf0-5, NONE, FAST_SR1); 1108 PIN(INPUT, gpf0-6, DOWN, FAST_SR1); 1109 PIN(INPUT, gpf0-7, UP, FAST_SR1); 1110 }; 1111}; 1112 1113&pinctrl_nfc { 1114 pinctrl-names = "default"; 1115 pinctrl-0 = <&initial_nfc>; 1116 1117 initial_nfc: initial-state { 1118 PIN(INPUT, gpj0-2, DOWN, FAST_SR1); 1119 }; 1120}; 1121 1122&pinctrl_peric { 1123 pinctrl-names = "default"; 1124 pinctrl-0 = <&initial_peric>; 1125 1126 initial_peric: initial-state { 1127 PIN(INPUT, gpv7-0, DOWN, FAST_SR1); 1128 PIN(INPUT, gpv7-1, DOWN, FAST_SR1); 1129 PIN(INPUT, gpv7-2, NONE, FAST_SR1); 1130 PIN(INPUT, gpv7-3, DOWN, FAST_SR1); 1131 PIN(INPUT, gpv7-4, DOWN, FAST_SR1); 1132 PIN(INPUT, gpv7-5, DOWN, FAST_SR1); 1133 1134 PIN(INPUT, gpb0-4, DOWN, FAST_SR1); 1135 1136 PIN(INPUT, gpc0-2, DOWN, FAST_SR1); 1137 PIN(INPUT, gpc0-5, DOWN, FAST_SR1); 1138 PIN(INPUT, gpc0-7, DOWN, FAST_SR1); 1139 1140 PIN(INPUT, gpc1-1, DOWN, FAST_SR1); 1141 1142 PIN(INPUT, gpc3-4, NONE, FAST_SR1); 1143 PIN(INPUT, gpc3-5, NONE, FAST_SR1); 1144 PIN(INPUT, gpc3-6, NONE, FAST_SR1); 1145 PIN(INPUT, gpc3-7, NONE, FAST_SR1); 1146 1147 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1); 1148 PIN(2, gpg0-1, DOWN, FAST_SR1); 1149 1150 PIN(INPUT, gpd2-5, DOWN, FAST_SR1); 1151 1152 PIN(INPUT, gpd4-0, NONE, FAST_SR1); 1153 PIN(INPUT, gpd4-1, DOWN, FAST_SR1); 1154 PIN(INPUT, gpd4-2, DOWN, FAST_SR1); 1155 PIN(INPUT, gpd4-3, DOWN, FAST_SR1); 1156 PIN(INPUT, gpd4-4, DOWN, FAST_SR1); 1157 1158 PIN(INPUT, gpd6-3, DOWN, FAST_SR1); 1159 1160 PIN(INPUT, gpd8-1, UP, FAST_SR1); 1161 1162 PIN(INPUT, gpg1-0, DOWN, FAST_SR1); 1163 PIN(INPUT, gpg1-1, DOWN, FAST_SR1); 1164 PIN(INPUT, gpg1-2, DOWN, FAST_SR1); 1165 PIN(INPUT, gpg1-3, DOWN, FAST_SR1); 1166 PIN(INPUT, gpg1-4, DOWN, FAST_SR1); 1167 1168 PIN(INPUT, gpg2-0, DOWN, FAST_SR1); 1169 PIN(INPUT, gpg2-1, DOWN, FAST_SR1); 1170 1171 PIN(INPUT, gpg3-0, DOWN, FAST_SR1); 1172 PIN(INPUT, gpg3-1, DOWN, FAST_SR1); 1173 PIN(INPUT, gpg3-5, DOWN, FAST_SR1); 1174 }; 1175}; 1176 1177&pinctrl_touch { 1178 pinctrl-names = "default"; 1179 pinctrl-0 = <&initial_touch>; 1180 1181 initial_touch: initial-state { 1182 PIN(INPUT, gpj1-2, DOWN, FAST_SR1); 1183 }; 1184}; 1185 1186&pwm { 1187 pinctrl-0 = <&pwm0_out>; 1188 pinctrl-names = "default"; 1189 status = "okay"; 1190}; 1191 1192&mic { 1193 status = "okay"; 1194}; 1195 1196&pmu_system_controller { 1197 assigned-clocks = <&pmu_system_controller 0>; 1198 assigned-clock-parents = <&xxti>; 1199}; 1200 1201&serial_1 { 1202 status = "okay"; 1203}; 1204 1205&serial_3 { 1206 status = "okay"; 1207 1208 bluetooth { 1209 compatible = "brcm,bcm43438-bt"; 1210 max-speed = <3000000>; 1211 shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>; 1212 device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>; 1213 host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>; 1214 clocks = <&s2mps13_osc S2MPS11_CLK_BT>; 1215 clock-names = "extclk"; 1216 }; 1217}; 1218 1219&spi_1 { 1220 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; 1221 status = "okay"; 1222 1223 wm5110: wm5110-codec@0 { 1224 compatible = "wlf,wm5110"; 1225 reg = <0x0>; 1226 spi-max-frequency = <20000000>; 1227 interrupt-parent = <&gpa0>; 1228 interrupts = <4 IRQ_TYPE_NONE>; 1229 clocks = <&pmu_system_controller 0>, 1230 <&s2mps13_osc S2MPS11_CLK_BT>; 1231 clock-names = "mclk1", "mclk2"; 1232 1233 gpio-controller; 1234 #gpio-cells = <2>; 1235 1236 wlf,micd-detect-debounce = <300>; 1237 wlf,micd-bias-start-time = <0x1>; 1238 wlf,micd-rate = <0x7>; 1239 wlf,micd-dbtime = <0x1>; 1240 wlf,micd-force-micbias; 1241 wlf,micd-configs = <0x0 1 0>; 1242 wlf,hpdet-channel = <1>; 1243 wlf,gpsw = <0x1>; 1244 wlf,inmode = <2 0 2 0>; 1245 1246 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; 1247 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; 1248 1249 /* core supplies */ 1250 AVDD-supply = <&ldo18_reg>; 1251 DBVDD1-supply = <&ldo18_reg>; 1252 CPVDD-supply = <&ldo18_reg>; 1253 DBVDD2-supply = <&ldo18_reg>; 1254 DBVDD3-supply = <&ldo18_reg>; 1255 1256 controller-data { 1257 samsung,spi-feedback-delay = <0>; 1258 }; 1259 }; 1260}; 1261 1262&spi_3 { 1263 status = "okay"; 1264 no-cs-readback; 1265 1266 irled@0 { 1267 compatible = "ir-spi-led"; 1268 reg = <0x0>; 1269 spi-max-frequency = <5000000>; 1270 power-supply = <&irda_regulator>; 1271 duty-cycle = <60>; 1272 led-active-low; 1273 1274 controller-data { 1275 samsung,spi-feedback-delay = <0>; 1276 }; 1277 }; 1278}; 1279 1280&timer { 1281 clock-frequency = <24000000>; 1282}; 1283 1284&tmu_atlas0 { 1285 vtmu-supply = <&ldo3_reg>; 1286 status = "okay"; 1287}; 1288 1289&tmu_apollo { 1290 vtmu-supply = <&ldo3_reg>; 1291 status = "okay"; 1292}; 1293 1294&tmu_g3d { 1295 vtmu-supply = <&ldo3_reg>; 1296 status = "okay"; 1297}; 1298 1299&usbdrd30 { 1300 vdd33-supply = <&ldo10_reg>; 1301 vdd10-supply = <&ldo6_reg>; 1302 status = "okay"; 1303}; 1304 1305&usbdrd_dwc3 { 1306 dr_mode = "otg"; 1307}; 1308 1309&usbdrd30_phy { 1310 vbus-supply = <&safeout1_reg>; 1311 status = "okay"; 1312 1313 port { 1314 usb_to_muic: endpoint { 1315 remote-endpoint = <&muic_to_usb>; 1316 }; 1317 }; 1318}; 1319 1320&xxti { 1321 clock-frequency = <24000000>; 1322}; 1323