1/* 2 * SAMSUNG Exynos5433 TM2 board device tree source 3 * 4 * Copyright (c) 2016 Samsung Electronics Co., Ltd. 5 * 6 * Common device tree source file for Samsung's TM2 and TM2E boards 7 * which are based on Samsung Exynos5433 SoC. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14/dts-v1/; 15#include "exynos5433.dtsi" 16#include <dt-bindings/clock/samsung,s2mps11.h> 17#include <dt-bindings/gpio/gpio.h> 18#include <dt-bindings/input/input.h> 19#include <dt-bindings/interrupt-controller/irq.h> 20 21/ { 22 aliases { 23 gsc0 = &gsc_0; 24 gsc1 = &gsc_1; 25 gsc2 = &gsc_2; 26 pinctrl0 = &pinctrl_alive; 27 pinctrl1 = &pinctrl_aud; 28 pinctrl2 = &pinctrl_cpif; 29 pinctrl3 = &pinctrl_ese; 30 pinctrl4 = &pinctrl_finger; 31 pinctrl5 = &pinctrl_fsys; 32 pinctrl6 = &pinctrl_imem; 33 pinctrl7 = &pinctrl_nfc; 34 pinctrl8 = &pinctrl_peric; 35 pinctrl9 = &pinctrl_touch; 36 serial0 = &serial_0; 37 serial1 = &serial_1; 38 serial2 = &serial_2; 39 serial3 = &serial_3; 40 spi0 = &spi_0; 41 spi1 = &spi_1; 42 spi2 = &spi_2; 43 spi3 = &spi_3; 44 spi4 = &spi_4; 45 mshc0 = &mshc_0; 46 mshc2 = &mshc_2; 47 }; 48 49 chosen { 50 stdout-path = &serial_1; 51 }; 52 53 memory@20000000 { 54 device_type = "memory"; 55 reg = <0x0 0x20000000 0x0 0xc0000000>; 56 }; 57 58 gpio-keys { 59 compatible = "gpio-keys"; 60 61 power-key { 62 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>; 63 linux,code = <KEY_POWER>; 64 label = "power key"; 65 debounce-interval = <10>; 66 }; 67 68 volume-up-key { 69 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>; 70 linux,code = <KEY_VOLUMEUP>; 71 label = "volume-up key"; 72 debounce-interval = <10>; 73 }; 74 75 volume-down-key { 76 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>; 77 linux,code = <KEY_VOLUMEDOWN>; 78 label = "volume-down key"; 79 debounce-interval = <10>; 80 }; 81 82 homepage-key { 83 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; 84 linux,code = <KEY_MENU>; 85 label = "homepage key"; 86 debounce-interval = <10>; 87 }; 88 }; 89 90 i2c_max98504: i2c-gpio-0 { 91 compatible = "i2c-gpio"; 92 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */ 93 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >; 94 i2c-gpio,delay-us = <2>; 95 #address-cells = <1>; 96 #size-cells = <0>; 97 status = "okay"; 98 99 max98504: max98504@31 { 100 compatible = "maxim,max98504"; 101 reg = <0x31>; 102 maxim,rx-path = <1>; 103 maxim,tx-path = <1>; 104 maxim,tx-channel-mask = <3>; 105 maxim,tx-channel-source = <2>; 106 }; 107 }; 108 109 irda_regulator: irda-regulator { 110 compatible = "regulator-fixed"; 111 enable-active-high; 112 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>; 113 regulator-name = "irda_regulator"; 114 }; 115 116 sound { 117 compatible = "samsung,tm2-audio"; 118 audio-codec = <&wm5110>; 119 i2s-controller = <&i2s0>; 120 audio-amplifier = <&max98504>; 121 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>; 122 model = "wm5110"; 123 samsung,audio-routing = 124 /* Headphone */ 125 "HP", "HPOUT1L", 126 "HP", "HPOUT1R", 127 128 /* Speaker */ 129 "SPK", "SPKOUT", 130 "SPKOUT", "HPOUT2L", 131 "SPKOUT", "HPOUT2R", 132 133 /* Receiver */ 134 "RCV", "HPOUT3L", 135 "RCV", "HPOUT3R"; 136 status = "okay"; 137 }; 138}; 139 140&adc { 141 vdd-supply = <&ldo3_reg>; 142 status = "okay"; 143 144 thermistor-ap { 145 compatible = "murata,ncp03wf104"; 146 pullup-uv = <1800000>; 147 pullup-ohm = <100000>; 148 pulldown-ohm = <0>; 149 io-channels = <&adc 0>; 150 }; 151 152 thermistor-battery { 153 compatible = "murata,ncp03wf104"; 154 pullup-uv = <1800000>; 155 pullup-ohm = <100000>; 156 pulldown-ohm = <0>; 157 io-channels = <&adc 1>; 158 #thermal-sensor-cells = <0>; 159 }; 160 161 thermistor-charger { 162 compatible = "murata,ncp03wf104"; 163 pullup-uv = <1800000>; 164 pullup-ohm = <100000>; 165 pulldown-ohm = <0>; 166 io-channels = <&adc 2>; 167 }; 168}; 169 170&bus_g2d_400 { 171 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>; 172 vdd-supply = <&buck4_reg>; 173 exynos,saturation-ratio = <10>; 174 status = "okay"; 175}; 176 177&bus_g2d_266 { 178 devfreq = <&bus_g2d_400>; 179 status = "okay"; 180}; 181 182&bus_gscl { 183 devfreq = <&bus_g2d_400>; 184 status = "okay"; 185}; 186 187&bus_hevc { 188 devfreq = <&bus_g2d_400>; 189 status = "okay"; 190}; 191 192&bus_jpeg { 193 devfreq = <&bus_g2d_400>; 194 status = "okay"; 195}; 196 197&bus_mfc { 198 devfreq = <&bus_g2d_400>; 199 status = "okay"; 200}; 201 202&bus_mscl { 203 devfreq = <&bus_g2d_400>; 204 status = "okay"; 205}; 206 207&bus_noc0 { 208 devfreq = <&bus_g2d_400>; 209 status = "okay"; 210}; 211 212&bus_noc1 { 213 devfreq = <&bus_g2d_400>; 214 status = "okay"; 215}; 216 217&bus_noc2 { 218 devfreq = <&bus_g2d_400>; 219 status = "okay"; 220}; 221 222&cmu_aud { 223 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>; 224 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>; 225}; 226 227&cmu_fsys { 228 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, 229 <&cmu_top CLK_MOUT_SCLK_USBHOST30>, 230 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, 231 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, 232 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, 233 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, 234 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, 235 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, 236 <&cmu_top CLK_DIV_SCLK_USBDRD30>, 237 <&cmu_top CLK_DIV_SCLK_USBHOST30>; 238 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, 239 <&cmu_top CLK_MOUT_BUS_PLL_USER>, 240 <&cmu_top CLK_SCLK_USBDRD30_FSYS>, 241 <&cmu_top CLK_SCLK_USBHOST30_FSYS>, 242 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, 243 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, 244 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, 245 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; 246 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, 247 <66700000>, <66700000>; 248}; 249 250&cmu_gscl { 251 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, 252 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; 253 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, 254 <&cmu_top CLK_ACLK_GSCL_333>; 255}; 256 257&cmu_mfc { 258 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>; 259 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>; 260}; 261 262&cmu_mscl { 263 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, 264 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 265 <&cmu_mscl CLK_MOUT_SCLK_JPEG>, 266 <&cmu_top CLK_MOUT_SCLK_JPEG_A>; 267 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>, 268 <&cmu_top CLK_SCLK_JPEG_MSCL>, 269 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 270 <&cmu_top CLK_MOUT_BUS_PLL_USER>; 271}; 272 273&cpu0 { 274 cpu-supply = <&buck3_reg>; 275}; 276 277&cpu4 { 278 cpu-supply = <&buck2_reg>; 279}; 280 281&decon { 282 status = "okay"; 283 284 i80-if-timings { 285 }; 286}; 287 288&decon_tv { 289 status = "okay"; 290 291 ports { 292 #address-cells = <1>; 293 #size-cells = <0>; 294 295 port@0 { 296 reg = <0>; 297 tv_to_hdmi: endpoint { 298 remote-endpoint = <&hdmi_to_tv>; 299 }; 300 }; 301 }; 302}; 303 304&dsi { 305 status = "okay"; 306 vddcore-supply = <&ldo6_reg>; 307 vddio-supply = <&ldo7_reg>; 308 samsung,burst-clock-frequency = <512000000>; 309 samsung,esc-clock-frequency = <16000000>; 310 samsung,pll-clock-frequency = <24000000>; 311 pinctrl-names = "default"; 312 pinctrl-0 = <&te_irq>; 313 314 ports { 315 #address-cells = <1>; 316 #size-cells = <0>; 317 318 port@1 { 319 reg = <1>; 320 321 dsi_out: endpoint { 322 samsung,burst-clock-frequency = <512000000>; 323 samsung,esc-clock-frequency = <16000000>; 324 }; 325 }; 326 }; 327}; 328 329&hdmi { 330 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>; 331 status = "okay"; 332 vdd-supply = <&ldo6_reg>; 333 vdd_osc-supply = <&ldo7_reg>; 334 vdd_pll-supply = <&ldo6_reg>; 335 336 ports { 337 #address-cells = <1>; 338 #size-cells = <0>; 339 340 port@0 { 341 reg = <0>; 342 hdmi_to_tv: endpoint { 343 remote-endpoint = <&tv_to_hdmi>; 344 }; 345 }; 346 347 port@1 { 348 reg = <1>; 349 hdmi_to_mhl: endpoint { 350 remote-endpoint = <&mhl_to_hdmi>; 351 }; 352 }; 353 }; 354}; 355 356&hsi2c_0 { 357 status = "okay"; 358 clock-frequency = <2500000>; 359 360 s2mps13-pmic@66 { 361 compatible = "samsung,s2mps13-pmic"; 362 interrupt-parent = <&gpa0>; 363 interrupts = <7 IRQ_TYPE_NONE>; 364 reg = <0x66>; 365 samsung,s2mps11-wrstbi-ground; 366 367 s2mps13_osc: clocks { 368 compatible = "samsung,s2mps13-clk"; 369 #clock-cells = <1>; 370 clock-output-names = "s2mps13_ap", "s2mps13_cp", 371 "s2mps13_bt"; 372 }; 373 374 regulators { 375 ldo1_reg: LDO1 { 376 regulator-name = "VDD_ALIVE_0.9V_AP"; 377 regulator-min-microvolt = <900000>; 378 regulator-max-microvolt = <900000>; 379 regulator-always-on; 380 }; 381 382 ldo2_reg: LDO2 { 383 regulator-name = "VDDQ_MMC2_2.8V_AP"; 384 regulator-min-microvolt = <2800000>; 385 regulator-max-microvolt = <2800000>; 386 regulator-always-on; 387 regulator-state-mem { 388 regulator-off-in-suspend; 389 }; 390 }; 391 392 ldo3_reg: LDO3 { 393 regulator-name = "VDD1_E_1.8V_AP"; 394 regulator-min-microvolt = <1800000>; 395 regulator-max-microvolt = <1800000>; 396 regulator-always-on; 397 }; 398 399 ldo4_reg: LDO4 { 400 regulator-name = "VDD10_MIF_PLL_1.0V_AP"; 401 regulator-min-microvolt = <1300000>; 402 regulator-max-microvolt = <1300000>; 403 regulator-always-on; 404 regulator-state-mem { 405 regulator-off-in-suspend; 406 }; 407 }; 408 409 ldo5_reg: LDO5 { 410 regulator-name = "VDD10_DPLL_1.0V_AP"; 411 regulator-min-microvolt = <1000000>; 412 regulator-max-microvolt = <1000000>; 413 regulator-always-on; 414 regulator-state-mem { 415 regulator-off-in-suspend; 416 }; 417 }; 418 419 ldo6_reg: LDO6 { 420 regulator-name = "VDD10_MIPI2L_1.0V_AP"; 421 regulator-min-microvolt = <1000000>; 422 regulator-max-microvolt = <1000000>; 423 regulator-state-mem { 424 regulator-off-in-suspend; 425 }; 426 }; 427 428 ldo7_reg: LDO7 { 429 regulator-name = "VDD18_MIPI2L_1.8V_AP"; 430 regulator-min-microvolt = <1800000>; 431 regulator-max-microvolt = <1800000>; 432 regulator-always-on; 433 regulator-state-mem { 434 regulator-off-in-suspend; 435 }; 436 }; 437 438 ldo8_reg: LDO8 { 439 regulator-name = "VDD18_LLI_1.8V_AP"; 440 regulator-min-microvolt = <1800000>; 441 regulator-max-microvolt = <1800000>; 442 regulator-always-on; 443 regulator-state-mem { 444 regulator-off-in-suspend; 445 }; 446 }; 447 448 ldo9_reg: LDO9 { 449 regulator-name = "VDD18_ABB_ETC_1.8V_AP"; 450 regulator-min-microvolt = <1800000>; 451 regulator-max-microvolt = <1800000>; 452 regulator-always-on; 453 regulator-state-mem { 454 regulator-off-in-suspend; 455 }; 456 }; 457 458 ldo10_reg: LDO10 { 459 regulator-name = "VDD33_USB30_3.0V_AP"; 460 regulator-min-microvolt = <3000000>; 461 regulator-max-microvolt = <3000000>; 462 regulator-state-mem { 463 regulator-off-in-suspend; 464 }; 465 }; 466 467 ldo11_reg: LDO11 { 468 regulator-name = "VDD_INT_M_1.0V_AP"; 469 regulator-min-microvolt = <1000000>; 470 regulator-max-microvolt = <1000000>; 471 regulator-always-on; 472 regulator-state-mem { 473 regulator-off-in-suspend; 474 }; 475 }; 476 477 ldo12_reg: LDO12 { 478 regulator-name = "VDD_KFC_M_1.1V_AP"; 479 regulator-min-microvolt = <800000>; 480 regulator-max-microvolt = <1350000>; 481 regulator-always-on; 482 }; 483 484 ldo13_reg: LDO13 { 485 regulator-name = "VDD_G3D_M_0.95V_AP"; 486 regulator-min-microvolt = <950000>; 487 regulator-max-microvolt = <950000>; 488 regulator-always-on; 489 regulator-state-mem { 490 regulator-off-in-suspend; 491 }; 492 }; 493 494 ldo14_reg: LDO14 { 495 regulator-name = "VDDQ_M1_LDO_1.2V_AP"; 496 regulator-min-microvolt = <1200000>; 497 regulator-max-microvolt = <1200000>; 498 regulator-always-on; 499 regulator-state-mem { 500 regulator-off-in-suspend; 501 }; 502 }; 503 504 ldo15_reg: LDO15 { 505 regulator-name = "VDDQ_M2_LDO_1.2V_AP"; 506 regulator-min-microvolt = <1200000>; 507 regulator-max-microvolt = <1200000>; 508 regulator-always-on; 509 regulator-state-mem { 510 regulator-off-in-suspend; 511 }; 512 }; 513 514 ldo16_reg: LDO16 { 515 regulator-name = "VDDQ_EFUSE"; 516 regulator-min-microvolt = <1400000>; 517 regulator-max-microvolt = <3400000>; 518 regulator-always-on; 519 }; 520 521 ldo17_reg: LDO17 { 522 regulator-name = "V_TFLASH_2.8V_AP"; 523 regulator-min-microvolt = <2800000>; 524 regulator-max-microvolt = <2800000>; 525 }; 526 527 ldo18_reg: LDO18 { 528 regulator-name = "V_CODEC_1.8V_AP"; 529 regulator-min-microvolt = <1800000>; 530 regulator-max-microvolt = <1800000>; 531 }; 532 533 ldo19_reg: LDO19 { 534 regulator-name = "VDDA_1.8V_COMP"; 535 regulator-min-microvolt = <1800000>; 536 regulator-max-microvolt = <1800000>; 537 regulator-always-on; 538 }; 539 540 ldo20_reg: LDO20 { 541 regulator-name = "VCC_2.8V_AP"; 542 regulator-min-microvolt = <2800000>; 543 regulator-max-microvolt = <2800000>; 544 regulator-always-on; 545 }; 546 547 ldo21_reg: LDO21 { 548 regulator-name = "VT_CAM_1.8V"; 549 regulator-min-microvolt = <1800000>; 550 regulator-max-microvolt = <1800000>; 551 }; 552 553 ldo22_reg: LDO22 { 554 regulator-name = "CAM_IO_1.8V_AP"; 555 regulator-min-microvolt = <1800000>; 556 regulator-max-microvolt = <1800000>; 557 }; 558 559 ldo23_reg: LDO23 { 560 regulator-name = "CAM_SEN_CORE_1.05V_AP"; 561 regulator-min-microvolt = <1050000>; 562 regulator-max-microvolt = <1050000>; 563 }; 564 565 ldo24_reg: LDO24 { 566 regulator-name = "VT_CAM_1.2V"; 567 regulator-min-microvolt = <1200000>; 568 regulator-max-microvolt = <1200000>; 569 }; 570 571 ldo25_reg: LDO25 { 572 regulator-name = "UNUSED_LDO25"; 573 regulator-min-microvolt = <2800000>; 574 regulator-max-microvolt = <2800000>; 575 }; 576 577 ldo26_reg: LDO26 { 578 regulator-name = "CAM_AF_2.8V_AP"; 579 regulator-min-microvolt = <2800000>; 580 regulator-max-microvolt = <2800000>; 581 }; 582 583 ldo27_reg: LDO27 { 584 regulator-name = "VCC_3.0V_LCD_AP"; 585 regulator-min-microvolt = <3000000>; 586 regulator-max-microvolt = <3000000>; 587 }; 588 589 ldo28_reg: LDO28 { 590 regulator-name = "VCC_1.8V_LCD_AP"; 591 regulator-min-microvolt = <1800000>; 592 regulator-max-microvolt = <1800000>; 593 }; 594 595 ldo29_reg: LDO29 { 596 regulator-name = "VT_CAM_2.8V"; 597 regulator-min-microvolt = <3000000>; 598 regulator-max-microvolt = <3000000>; 599 }; 600 601 ldo30_reg: LDO30 { 602 regulator-name = "TSP_AVDD_3.3V_AP"; 603 regulator-min-microvolt = <3300000>; 604 regulator-max-microvolt = <3300000>; 605 }; 606 607 ldo31_reg: LDO31 { 608 /* 609 * LDO31 differs from target to target, 610 * its definition is in the .dts 611 */ 612 }; 613 614 ldo32_reg: LDO32 { 615 regulator-name = "VTOUCH_1.8V_AP"; 616 regulator-min-microvolt = <1800000>; 617 regulator-max-microvolt = <1800000>; 618 }; 619 620 ldo33_reg: LDO33 { 621 regulator-name = "VTOUCH_LED_3.3V"; 622 regulator-min-microvolt = <2500000>; 623 regulator-max-microvolt = <3300000>; 624 regulator-ramp-delay = <12500>; 625 }; 626 627 ldo34_reg: LDO34 { 628 regulator-name = "VCC_1.8V_MHL_AP"; 629 regulator-min-microvolt = <1000000>; 630 regulator-max-microvolt = <2100000>; 631 }; 632 633 ldo35_reg: LDO35 { 634 regulator-name = "OIS_VM_2.8V"; 635 regulator-min-microvolt = <1800000>; 636 regulator-max-microvolt = <2800000>; 637 }; 638 639 ldo36_reg: LDO36 { 640 regulator-name = "VSIL_1.0V"; 641 regulator-min-microvolt = <1000000>; 642 regulator-max-microvolt = <1000000>; 643 }; 644 645 ldo37_reg: LDO37 { 646 regulator-name = "VF_1.8V"; 647 regulator-min-microvolt = <1800000>; 648 regulator-max-microvolt = <1800000>; 649 }; 650 651 ldo38_reg: LDO38 { 652 /* 653 * LDO38 differs from target to target, 654 * its definition is in the .dts 655 */ 656 }; 657 658 ldo39_reg: LDO39 { 659 regulator-name = "V_HRM_1.8V"; 660 regulator-min-microvolt = <1800000>; 661 regulator-max-microvolt = <1800000>; 662 }; 663 664 ldo40_reg: LDO40 { 665 regulator-name = "V_HRM_3.3V"; 666 regulator-min-microvolt = <3300000>; 667 regulator-max-microvolt = <3300000>; 668 }; 669 670 buck1_reg: BUCK1 { 671 regulator-name = "VDD_MIF_0.9V_AP"; 672 regulator-min-microvolt = <600000>; 673 regulator-max-microvolt = <1500000>; 674 regulator-always-on; 675 regulator-state-mem { 676 regulator-off-in-suspend; 677 }; 678 }; 679 680 buck2_reg: BUCK2 { 681 regulator-name = "VDD_EGL_1.0V_AP"; 682 regulator-min-microvolt = <900000>; 683 regulator-max-microvolt = <1300000>; 684 regulator-always-on; 685 regulator-state-mem { 686 regulator-off-in-suspend; 687 }; 688 }; 689 690 buck3_reg: BUCK3 { 691 regulator-name = "VDD_KFC_1.0V_AP"; 692 regulator-min-microvolt = <800000>; 693 regulator-max-microvolt = <1200000>; 694 regulator-always-on; 695 regulator-state-mem { 696 regulator-off-in-suspend; 697 }; 698 }; 699 700 buck4_reg: BUCK4 { 701 regulator-name = "VDD_INT_0.95V_AP"; 702 regulator-min-microvolt = <600000>; 703 regulator-max-microvolt = <1500000>; 704 regulator-always-on; 705 regulator-state-mem { 706 regulator-off-in-suspend; 707 }; 708 }; 709 710 buck5_reg: BUCK5 { 711 regulator-name = "VDD_DISP_CAM0_0.9V_AP"; 712 regulator-min-microvolt = <600000>; 713 regulator-max-microvolt = <1500000>; 714 regulator-always-on; 715 regulator-state-mem { 716 regulator-off-in-suspend; 717 }; 718 }; 719 720 buck6_reg: BUCK6 { 721 regulator-name = "VDD_G3D_0.9V_AP"; 722 regulator-min-microvolt = <600000>; 723 regulator-max-microvolt = <1500000>; 724 regulator-always-on; 725 regulator-state-mem { 726 regulator-off-in-suspend; 727 }; 728 }; 729 730 buck7_reg: BUCK7 { 731 regulator-name = "VDD_MEM1_1.2V_AP"; 732 regulator-min-microvolt = <1200000>; 733 regulator-max-microvolt = <1200000>; 734 regulator-always-on; 735 }; 736 737 buck8_reg: BUCK8 { 738 regulator-name = "VDD_LLDO_1.35V_AP"; 739 regulator-min-microvolt = <1350000>; 740 regulator-max-microvolt = <3300000>; 741 regulator-always-on; 742 }; 743 744 buck9_reg: BUCK9 { 745 regulator-name = "VDD_MLDO_2.0V_AP"; 746 regulator-min-microvolt = <1350000>; 747 regulator-max-microvolt = <3300000>; 748 regulator-always-on; 749 }; 750 751 buck10_reg: BUCK10 { 752 regulator-name = "vdd_mem2"; 753 regulator-min-microvolt = <550000>; 754 regulator-max-microvolt = <1500000>; 755 regulator-always-on; 756 }; 757 }; 758 }; 759}; 760 761&hsi2c_5 { 762 status = "okay"; 763 764 stmfts: touchscreen@49 { 765 compatible = "st,stmfts"; 766 reg = <0x49>; 767 interrupt-parent = <&gpa1>; 768 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 769 avdd-supply = <&ldo30_reg>; 770 vdd-supply = <&ldo31_reg>; 771 }; 772}; 773 774&hsi2c_7 { 775 status = "okay"; 776 777 sii8620@39 { 778 reg = <0x39>; 779 compatible = "sil,sii8620"; 780 cvcc10-supply = <&ldo36_reg>; 781 iovcc18-supply = <&ldo34_reg>; 782 interrupt-parent = <&gpf0>; 783 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 784 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; 785 clocks = <&pmu_system_controller 0>; 786 clock-names = "xtal"; 787 788 port { 789 mhl_to_hdmi: endpoint { 790 remote-endpoint = <&hdmi_to_mhl>; 791 }; 792 }; 793 }; 794}; 795 796&hsi2c_8 { 797 status = "okay"; 798 799 max77843@66 { 800 compatible = "maxim,max77843"; 801 interrupt-parent = <&gpa1>; 802 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 803 reg = <0x66>; 804 805 muic: max77843-muic { 806 compatible = "maxim,max77843-muic"; 807 }; 808 809 regulators { 810 compatible = "maxim,max77843-regulator"; 811 safeout1_reg: SAFEOUT1 { 812 regulator-name = "SAFEOUT1"; 813 regulator-min-microvolt = <3300000>; 814 regulator-max-microvolt = <4950000>; 815 }; 816 817 safeout2_reg: SAFEOUT2 { 818 regulator-name = "SAFEOUT2"; 819 regulator-min-microvolt = <3300000>; 820 regulator-max-microvolt = <4950000>; 821 }; 822 823 charger_reg: CHARGER { 824 regulator-name = "CHARGER"; 825 regulator-min-microamp = <100000>; 826 regulator-max-microamp = <3150000>; 827 }; 828 }; 829 830 haptic: max77843-haptic { 831 compatible = "maxim,max77843-haptic"; 832 haptic-supply = <&ldo38_reg>; 833 pwms = <&pwm 0 33670 0>; 834 pwm-names = "haptic"; 835 }; 836 }; 837}; 838 839&hsi2c_11 { 840 status = "okay"; 841}; 842 843&i2s0 { 844 status = "okay"; 845}; 846 847&mshc_0 { 848 status = "okay"; 849 num-slots = <1>; 850 mmc-hs200-1_8v; 851 mmc-hs400-1_8v; 852 cap-mmc-highspeed; 853 non-removable; 854 card-detect-delay = <200>; 855 samsung,dw-mshc-ciu-div = <3>; 856 samsung,dw-mshc-sdr-timing = <0 4>; 857 samsung,dw-mshc-ddr-timing = <0 2>; 858 samsung,dw-mshc-hs400-timing = <0 3>; 859 samsung,read-strobe-delay = <90>; 860 fifo-depth = <0x80>; 861 pinctrl-names = "default"; 862 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 863 &sd0_bus8 &sd0_rdqs>; 864 bus-width = <8>; 865 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; 866 assigned-clock-rates = <800000000>; 867}; 868 869&mshc_2 { 870 status = "okay"; 871 num-slots = <1>; 872 cap-sd-highspeed; 873 disable-wp; 874 cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>; 875 cd-inverted; 876 card-detect-delay = <200>; 877 samsung,dw-mshc-ciu-div = <3>; 878 samsung,dw-mshc-sdr-timing = <0 4>; 879 samsung,dw-mshc-ddr-timing = <0 2>; 880 fifo-depth = <0x80>; 881 pinctrl-names = "default"; 882 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; 883 bus-width = <4>; 884}; 885 886&ppmu_d0_general { 887 status = "okay"; 888 events { 889 ppmu_event0_d0_general: ppmu-event0-d0-general { 890 event-name = "ppmu-event0-d0-general"; 891 }; 892 }; 893}; 894 895&ppmu_d1_general { 896 status = "okay"; 897 events { 898 ppmu_event0_d1_general: ppmu-event0-d1-general { 899 event-name = "ppmu-event0-d1-general"; 900 }; 901 }; 902}; 903 904&pinctrl_alive { 905 pinctrl-names = "default"; 906 pinctrl-0 = <&initial_alive>; 907 908 initial_alive: initial-state { 909 PIN(INPUT, gpa0-0, DOWN, FAST_SR1); 910 PIN(INPUT, gpa0-1, NONE, FAST_SR1); 911 PIN(INPUT, gpa0-2, DOWN, FAST_SR1); 912 PIN(INPUT, gpa0-3, NONE, FAST_SR1); 913 PIN(INPUT, gpa0-4, NONE, FAST_SR1); 914 PIN(INPUT, gpa0-5, DOWN, FAST_SR1); 915 PIN(INPUT, gpa0-6, NONE, FAST_SR1); 916 PIN(INPUT, gpa0-7, NONE, FAST_SR1); 917 918 PIN(INPUT, gpa1-0, UP, FAST_SR1); 919 PIN(INPUT, gpa1-1, UP, FAST_SR1); 920 PIN(INPUT, gpa1-2, NONE, FAST_SR1); 921 PIN(INPUT, gpa1-3, DOWN, FAST_SR1); 922 PIN(INPUT, gpa1-4, DOWN, FAST_SR1); 923 PIN(INPUT, gpa1-5, NONE, FAST_SR1); 924 PIN(INPUT, gpa1-6, NONE, FAST_SR1); 925 PIN(INPUT, gpa1-7, NONE, FAST_SR1); 926 927 PIN(INPUT, gpa2-0, NONE, FAST_SR1); 928 PIN(INPUT, gpa2-1, NONE, FAST_SR1); 929 PIN(INPUT, gpa2-2, NONE, FAST_SR1); 930 PIN(INPUT, gpa2-3, DOWN, FAST_SR1); 931 PIN(INPUT, gpa2-4, NONE, FAST_SR1); 932 PIN(INPUT, gpa2-5, DOWN, FAST_SR1); 933 PIN(INPUT, gpa2-6, DOWN, FAST_SR1); 934 PIN(INPUT, gpa2-7, NONE, FAST_SR1); 935 936 PIN(INPUT, gpa3-0, DOWN, FAST_SR1); 937 PIN(INPUT, gpa3-1, DOWN, FAST_SR1); 938 PIN(INPUT, gpa3-2, NONE, FAST_SR1); 939 PIN(INPUT, gpa3-3, DOWN, FAST_SR1); 940 PIN(INPUT, gpa3-4, NONE, FAST_SR1); 941 PIN(INPUT, gpa3-5, DOWN, FAST_SR1); 942 PIN(INPUT, gpa3-6, DOWN, FAST_SR1); 943 PIN(INPUT, gpa3-7, DOWN, FAST_SR1); 944 945 PIN(INPUT, gpf1-0, NONE, FAST_SR1); 946 PIN(INPUT, gpf1-1, NONE, FAST_SR1); 947 PIN(INPUT, gpf1-2, DOWN, FAST_SR1); 948 PIN(INPUT, gpf1-4, UP, FAST_SR1); 949 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1); 950 PIN(INPUT, gpf1-6, DOWN, FAST_SR1); 951 PIN(INPUT, gpf1-7, DOWN, FAST_SR1); 952 953 PIN(INPUT, gpf2-0, DOWN, FAST_SR1); 954 PIN(INPUT, gpf2-1, DOWN, FAST_SR1); 955 PIN(INPUT, gpf2-2, DOWN, FAST_SR1); 956 PIN(INPUT, gpf2-3, DOWN, FAST_SR1); 957 958 PIN(INPUT, gpf3-0, DOWN, FAST_SR1); 959 PIN(INPUT, gpf3-1, DOWN, FAST_SR1); 960 PIN(INPUT, gpf3-2, NONE, FAST_SR1); 961 PIN(INPUT, gpf3-3, DOWN, FAST_SR1); 962 963 PIN(INPUT, gpf4-0, DOWN, FAST_SR1); 964 PIN(INPUT, gpf4-1, DOWN, FAST_SR1); 965 PIN(INPUT, gpf4-2, DOWN, FAST_SR1); 966 PIN(INPUT, gpf4-3, DOWN, FAST_SR1); 967 PIN(INPUT, gpf4-4, DOWN, FAST_SR1); 968 PIN(INPUT, gpf4-5, DOWN, FAST_SR1); 969 PIN(INPUT, gpf4-6, DOWN, FAST_SR1); 970 PIN(INPUT, gpf4-7, DOWN, FAST_SR1); 971 972 PIN(INPUT, gpf5-0, DOWN, FAST_SR1); 973 PIN(INPUT, gpf5-1, DOWN, FAST_SR1); 974 PIN(INPUT, gpf5-2, DOWN, FAST_SR1); 975 PIN(INPUT, gpf5-3, DOWN, FAST_SR1); 976 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1); 977 PIN(INPUT, gpf5-5, DOWN, FAST_SR1); 978 PIN(INPUT, gpf5-6, DOWN, FAST_SR1); 979 PIN(INPUT, gpf5-7, DOWN, FAST_SR1); 980 }; 981 982 te_irq: te_irq { 983 samsung,pins = "gpf1-3"; 984 samsung,pin-function = <0xf>; 985 }; 986}; 987 988&pinctrl_cpif { 989 pinctrl-names = "default"; 990 pinctrl-0 = <&initial_cpif>; 991 992 initial_cpif: initial-state { 993 PIN(INPUT, gpv6-0, DOWN, FAST_SR1); 994 PIN(INPUT, gpv6-1, DOWN, FAST_SR1); 995 }; 996}; 997 998&pinctrl_ese { 999 pinctrl-names = "default"; 1000 pinctrl-0 = <&initial_ese>; 1001 1002 initial_ese: initial-state { 1003 PIN(INPUT, gpj2-0, DOWN, FAST_SR1); 1004 PIN(INPUT, gpj2-1, DOWN, FAST_SR1); 1005 PIN(INPUT, gpj2-2, DOWN, FAST_SR1); 1006 }; 1007}; 1008 1009&pinctrl_fsys { 1010 pinctrl-names = "default"; 1011 pinctrl-0 = <&initial_fsys>; 1012 1013 initial_fsys: initial-state { 1014 PIN(INPUT, gpr3-0, NONE, FAST_SR1); 1015 PIN(INPUT, gpr3-1, DOWN, FAST_SR1); 1016 PIN(INPUT, gpr3-2, DOWN, FAST_SR1); 1017 PIN(INPUT, gpr3-3, DOWN, FAST_SR1); 1018 PIN(INPUT, gpr3-7, NONE, FAST_SR1); 1019 }; 1020}; 1021 1022&pinctrl_imem { 1023 pinctrl-names = "default"; 1024 pinctrl-0 = <&initial_imem>; 1025 1026 initial_imem: initial-state { 1027 PIN(INPUT, gpf0-0, UP, FAST_SR1); 1028 PIN(INPUT, gpf0-1, UP, FAST_SR1); 1029 PIN(INPUT, gpf0-2, DOWN, FAST_SR1); 1030 PIN(INPUT, gpf0-3, UP, FAST_SR1); 1031 PIN(INPUT, gpf0-4, DOWN, FAST_SR1); 1032 PIN(INPUT, gpf0-5, NONE, FAST_SR1); 1033 PIN(INPUT, gpf0-6, DOWN, FAST_SR1); 1034 PIN(INPUT, gpf0-7, UP, FAST_SR1); 1035 }; 1036}; 1037 1038&pinctrl_nfc { 1039 pinctrl-names = "default"; 1040 pinctrl-0 = <&initial_nfc>; 1041 1042 initial_nfc: initial-state { 1043 PIN(INPUT, gpj0-2, DOWN, FAST_SR1); 1044 }; 1045}; 1046 1047&pinctrl_peric { 1048 pinctrl-names = "default"; 1049 pinctrl-0 = <&initial_peric>; 1050 1051 initial_peric: initial-state { 1052 PIN(INPUT, gpv7-0, DOWN, FAST_SR1); 1053 PIN(INPUT, gpv7-1, DOWN, FAST_SR1); 1054 PIN(INPUT, gpv7-2, NONE, FAST_SR1); 1055 PIN(INPUT, gpv7-3, DOWN, FAST_SR1); 1056 PIN(INPUT, gpv7-4, DOWN, FAST_SR1); 1057 PIN(INPUT, gpv7-5, DOWN, FAST_SR1); 1058 1059 PIN(INPUT, gpb0-4, DOWN, FAST_SR1); 1060 1061 PIN(INPUT, gpc0-2, DOWN, FAST_SR1); 1062 PIN(INPUT, gpc0-5, DOWN, FAST_SR1); 1063 PIN(INPUT, gpc0-7, DOWN, FAST_SR1); 1064 1065 PIN(INPUT, gpc1-1, DOWN, FAST_SR1); 1066 1067 PIN(INPUT, gpc3-4, NONE, FAST_SR1); 1068 PIN(INPUT, gpc3-5, NONE, FAST_SR1); 1069 PIN(INPUT, gpc3-6, NONE, FAST_SR1); 1070 PIN(INPUT, gpc3-7, NONE, FAST_SR1); 1071 1072 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1); 1073 PIN(2, gpg0-1, DOWN, FAST_SR1); 1074 1075 PIN(INPUT, gpd2-5, DOWN, FAST_SR1); 1076 1077 PIN(INPUT, gpd4-0, NONE, FAST_SR1); 1078 PIN(INPUT, gpd4-1, DOWN, FAST_SR1); 1079 PIN(INPUT, gpd4-2, DOWN, FAST_SR1); 1080 PIN(INPUT, gpd4-3, DOWN, FAST_SR1); 1081 PIN(INPUT, gpd4-4, DOWN, FAST_SR1); 1082 1083 PIN(INPUT, gpd6-3, DOWN, FAST_SR1); 1084 1085 PIN(INPUT, gpd8-1, UP, FAST_SR1); 1086 1087 PIN(INPUT, gpg1-0, DOWN, FAST_SR1); 1088 PIN(INPUT, gpg1-1, DOWN, FAST_SR1); 1089 PIN(INPUT, gpg1-2, DOWN, FAST_SR1); 1090 PIN(INPUT, gpg1-3, DOWN, FAST_SR1); 1091 PIN(INPUT, gpg1-4, DOWN, FAST_SR1); 1092 1093 PIN(INPUT, gpg2-0, DOWN, FAST_SR1); 1094 PIN(INPUT, gpg2-1, DOWN, FAST_SR1); 1095 1096 PIN(INPUT, gpg3-0, DOWN, FAST_SR1); 1097 PIN(INPUT, gpg3-1, DOWN, FAST_SR1); 1098 PIN(INPUT, gpg3-5, DOWN, FAST_SR1); 1099 }; 1100}; 1101 1102&pinctrl_touch { 1103 pinctrl-names = "default"; 1104 pinctrl-0 = <&initial_touch>; 1105 1106 initial_touch: initial-state { 1107 PIN(INPUT, gpj1-2, DOWN, FAST_SR1); 1108 }; 1109}; 1110 1111&pwm { 1112 pinctrl-0 = <&pwm0_out>; 1113 pinctrl-names = "default"; 1114 status = "okay"; 1115}; 1116 1117&mic { 1118 status = "okay"; 1119 1120 i80-if-timings { 1121 }; 1122}; 1123 1124&pmu_system_controller { 1125 assigned-clocks = <&pmu_system_controller 0>; 1126 assigned-clock-parents = <&xxti>; 1127}; 1128 1129&serial_1 { 1130 status = "okay"; 1131}; 1132 1133&spi_1 { 1134 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; 1135 status = "okay"; 1136 1137 wm5110: wm5110-codec@0 { 1138 compatible = "wlf,wm5110"; 1139 reg = <0x0>; 1140 spi-max-frequency = <20000000>; 1141 interrupt-parent = <&gpa0>; 1142 interrupts = <4 IRQ_TYPE_NONE>; 1143 clocks = <&pmu_system_controller 0>, 1144 <&s2mps13_osc S2MPS11_CLK_BT>; 1145 clock-names = "mclk1", "mclk2"; 1146 1147 gpio-controller; 1148 #gpio-cells = <2>; 1149 1150 wlf,micd-detect-debounce = <300>; 1151 wlf,micd-bias-start-time = <0x1>; 1152 wlf,micd-rate = <0x7>; 1153 wlf,micd-dbtime = <0x1>; 1154 wlf,micd-force-micbias; 1155 wlf,micd-configs = <0x0 1 0>; 1156 wlf,hpdet-channel = <1>; 1157 wlf,gpsw = <0x1>; 1158 wlf,inmode = <2 0 2 0>; 1159 1160 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; 1161 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; 1162 1163 /* core supplies */ 1164 AVDD-supply = <&ldo18_reg>; 1165 DBVDD1-supply = <&ldo18_reg>; 1166 CPVDD-supply = <&ldo18_reg>; 1167 DBVDD2-supply = <&ldo18_reg>; 1168 DBVDD3-supply = <&ldo18_reg>; 1169 1170 controller-data { 1171 samsung,spi-feedback-delay = <0>; 1172 }; 1173 }; 1174}; 1175 1176&spi_3 { 1177 status = "okay"; 1178 no-cs-readback; 1179 1180 irled@0 { 1181 compatible = "ir-spi-led"; 1182 reg = <0x0>; 1183 spi-max-frequency = <5000000>; 1184 power-supply = <&irda_regulator>; 1185 duty-cycle = <60>; 1186 led-active-low; 1187 1188 controller-data { 1189 samsung,spi-feedback-delay = <0>; 1190 }; 1191 }; 1192}; 1193 1194&timer { 1195 clock-frequency = <24000000>; 1196}; 1197 1198&tmu_atlas0 { 1199 vtmu-supply = <&ldo3_reg>; 1200 status = "okay"; 1201}; 1202 1203&tmu_apollo { 1204 vtmu-supply = <&ldo3_reg>; 1205 status = "okay"; 1206}; 1207 1208&tmu_g3d { 1209 vtmu-supply = <&ldo3_reg>; 1210 status = "okay"; 1211}; 1212 1213&usbdrd30 { 1214 vdd33-supply = <&ldo10_reg>; 1215 vdd10-supply = <&ldo6_reg>; 1216 status = "okay"; 1217}; 1218 1219&usbdrd_dwc3_0 { 1220 dr_mode = "otg"; 1221}; 1222 1223&usbdrd30_phy { 1224 vbus-supply = <&safeout1_reg>; 1225 status = "okay"; 1226}; 1227 1228&xxti { 1229 clock-frequency = <24000000>; 1230}; 1231