xref: /openbmc/linux/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi (revision 9977a8c3497a8f7f7f951994f298a8e4d961234f)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SAMSUNG Exynos5433 TM2 board device tree source
4 *
5 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
6 *
7 * Common device tree source file for Samsung's TM2 and TM2E boards
8 * which are based on Samsung Exynos5433 SoC.
9 */
10
11/dts-v1/;
12#include "exynos5433.dtsi"
13#include <dt-bindings/clock/samsung,s2mps11.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17
18/ {
19	aliases {
20		gsc0 = &gsc_0;
21		gsc1 = &gsc_1;
22		gsc2 = &gsc_2;
23		pinctrl0 = &pinctrl_alive;
24		pinctrl1 = &pinctrl_aud;
25		pinctrl2 = &pinctrl_cpif;
26		pinctrl3 = &pinctrl_ese;
27		pinctrl4 = &pinctrl_finger;
28		pinctrl5 = &pinctrl_fsys;
29		pinctrl6 = &pinctrl_imem;
30		pinctrl7 = &pinctrl_nfc;
31		pinctrl8 = &pinctrl_peric;
32		pinctrl9 = &pinctrl_touch;
33		serial0 = &serial_0;
34		serial1 = &serial_1;
35		serial2 = &serial_2;
36		serial3 = &serial_3;
37		spi0 = &spi_0;
38		spi1 = &spi_1;
39		spi2 = &spi_2;
40		spi3 = &spi_3;
41		spi4 = &spi_4;
42		mshc0 = &mshc_0;
43		mshc2 = &mshc_2;
44	};
45
46	chosen {
47		stdout-path = &serial_1;
48	};
49
50	memory@20000000 {
51		device_type = "memory";
52		reg = <0x0 0x20000000 0x0 0xc0000000>;
53	};
54
55	gpio-keys {
56		compatible = "gpio-keys";
57
58		power-key {
59			gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
60			linux,code = <KEY_POWER>;
61			label = "power key";
62			debounce-interval = <10>;
63		};
64
65		volume-up-key {
66			gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
67			linux,code = <KEY_VOLUMEUP>;
68			label = "volume-up key";
69			debounce-interval = <10>;
70		};
71
72		volume-down-key {
73			gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
74			linux,code = <KEY_VOLUMEDOWN>;
75			label = "volume-down key";
76			debounce-interval = <10>;
77		};
78
79		homepage-key {
80			gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
81			linux,code = <KEY_MENU>;
82			label = "homepage key";
83			debounce-interval = <10>;
84		};
85	};
86
87	i2c_max98504: i2c-gpio-0 {
88		compatible = "i2c-gpio";
89		gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
90			 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
91		i2c-gpio,delay-us = <2>;
92		#address-cells = <1>;
93		#size-cells = <0>;
94		status = "okay";
95
96		max98504: max98504@31 {
97			compatible = "maxim,max98504";
98			reg = <0x31>;
99			maxim,rx-path = <1>;
100			maxim,tx-path = <1>;
101			maxim,tx-channel-mask = <3>;
102			maxim,tx-channel-source = <2>;
103		};
104	};
105
106	irda_regulator: irda-regulator {
107		compatible = "regulator-fixed";
108		enable-active-high;
109		gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
110		regulator-name = "irda_regulator";
111	};
112
113	sound {
114		compatible = "samsung,tm2-audio";
115		audio-codec = <&wm5110>;
116		i2s-controller = <&i2s0>;
117		audio-amplifier = <&max98504>;
118		mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
119		model = "wm5110";
120		samsung,audio-routing =
121			/* Headphone */
122			"HP", "HPOUT1L",
123			"HP", "HPOUT1R",
124
125			/* Speaker */
126			"SPK", "SPKOUT",
127			"SPKOUT", "HPOUT2L",
128			"SPKOUT", "HPOUT2R",
129
130			/* Receiver */
131			"RCV", "HPOUT3L",
132			"RCV", "HPOUT3R";
133		status = "okay";
134	};
135};
136
137&adc {
138	vdd-supply = <&ldo3_reg>;
139	status = "okay";
140
141	thermistor-ap {
142		compatible = "murata,ncp03wf104";
143		pullup-uv = <1800000>;
144		pullup-ohm = <100000>;
145		pulldown-ohm = <0>;
146		io-channels = <&adc 0>;
147	};
148
149	thermistor-battery {
150		compatible = "murata,ncp03wf104";
151		pullup-uv = <1800000>;
152		pullup-ohm = <100000>;
153		pulldown-ohm = <0>;
154		io-channels = <&adc 1>;
155		#thermal-sensor-cells = <0>;
156	};
157
158	thermistor-charger {
159		compatible = "murata,ncp03wf104";
160		pullup-uv = <1800000>;
161		pullup-ohm = <100000>;
162		pulldown-ohm = <0>;
163		io-channels = <&adc 2>;
164	};
165};
166
167&bus_g2d_400 {
168	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
169	vdd-supply = <&buck4_reg>;
170	exynos,saturation-ratio = <10>;
171	status = "okay";
172};
173
174&bus_g2d_266 {
175	devfreq = <&bus_g2d_400>;
176	status = "okay";
177};
178
179&bus_gscl {
180	devfreq = <&bus_g2d_400>;
181	status = "okay";
182};
183
184&bus_hevc {
185	devfreq = <&bus_g2d_400>;
186	status = "okay";
187};
188
189&bus_jpeg {
190	devfreq = <&bus_g2d_400>;
191	status = "okay";
192};
193
194&bus_mfc {
195	devfreq = <&bus_g2d_400>;
196	status = "okay";
197};
198
199&bus_mscl {
200	devfreq = <&bus_g2d_400>;
201	status = "okay";
202};
203
204&bus_noc0 {
205	devfreq = <&bus_g2d_400>;
206	status = "okay";
207};
208
209&bus_noc1 {
210	devfreq = <&bus_g2d_400>;
211	status = "okay";
212};
213
214&bus_noc2 {
215	devfreq = <&bus_g2d_400>;
216	status = "okay";
217};
218
219&cmu_aud {
220	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
221	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
222};
223
224&cmu_fsys {
225	assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
226		<&cmu_top CLK_MOUT_SCLK_USBHOST30>,
227		<&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
228		<&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
229		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
230		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
231		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
232		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
233		<&cmu_top CLK_DIV_SCLK_USBDRD30>,
234		<&cmu_top CLK_DIV_SCLK_USBHOST30>;
235	assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
236		<&cmu_top CLK_MOUT_BUS_PLL_USER>,
237		<&cmu_top CLK_SCLK_USBDRD30_FSYS>,
238		<&cmu_top CLK_SCLK_USBHOST30_FSYS>,
239		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
240		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
241		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
242		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
243	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
244			       <66700000>, <66700000>;
245};
246
247&cmu_gscl {
248	assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
249			  <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
250	assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
251				 <&cmu_top CLK_ACLK_GSCL_333>;
252};
253
254&cmu_mfc {
255	assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
256	assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
257};
258
259&cmu_mscl {
260	assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
261			  <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
262			  <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
263			  <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
264	assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
265				 <&cmu_top CLK_SCLK_JPEG_MSCL>,
266				 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
267				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
268};
269
270&cpu0 {
271	cpu-supply = <&buck3_reg>;
272};
273
274&cpu4 {
275	cpu-supply = <&buck2_reg>;
276};
277
278&decon {
279	status = "okay";
280};
281
282&decon_tv {
283	status = "okay";
284
285	ports {
286		#address-cells = <1>;
287		#size-cells = <0>;
288
289		port@0 {
290			reg = <0>;
291			tv_to_hdmi: endpoint {
292				remote-endpoint = <&hdmi_to_tv>;
293			};
294		};
295	};
296};
297
298&dsi {
299	status = "okay";
300	vddcore-supply = <&ldo6_reg>;
301	vddio-supply = <&ldo7_reg>;
302	samsung,burst-clock-frequency = <512000000>;
303	samsung,esc-clock-frequency = <16000000>;
304	samsung,pll-clock-frequency = <24000000>;
305	pinctrl-names = "default";
306	pinctrl-0 = <&te_irq>;
307};
308
309&hdmi {
310	hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
311	status = "okay";
312	vdd-supply = <&ldo6_reg>;
313	vdd_osc-supply = <&ldo7_reg>;
314	vdd_pll-supply = <&ldo6_reg>;
315
316	ports {
317		#address-cells = <1>;
318		#size-cells = <0>;
319
320		port@0 {
321			reg = <0>;
322			hdmi_to_tv: endpoint {
323				remote-endpoint = <&tv_to_hdmi>;
324			};
325		};
326
327		port@1 {
328			reg = <1>;
329			hdmi_to_mhl: endpoint {
330				remote-endpoint = <&mhl_to_hdmi>;
331			};
332		};
333	};
334};
335
336&hsi2c_0 {
337	status = "okay";
338	clock-frequency = <2500000>;
339
340	s2mps13-pmic@66 {
341		compatible = "samsung,s2mps13-pmic";
342		interrupt-parent = <&gpa0>;
343		interrupts = <7 IRQ_TYPE_NONE>;
344		reg = <0x66>;
345		samsung,s2mps11-wrstbi-ground;
346
347		s2mps13_osc: clocks {
348			compatible = "samsung,s2mps13-clk";
349			#clock-cells = <1>;
350			clock-output-names = "s2mps13_ap", "s2mps13_cp",
351				"s2mps13_bt";
352		};
353
354		regulators {
355			ldo1_reg: LDO1 {
356				regulator-name = "VDD_ALIVE_0.9V_AP";
357				regulator-min-microvolt = <900000>;
358				regulator-max-microvolt = <900000>;
359				regulator-always-on;
360			};
361
362			ldo2_reg: LDO2 {
363				regulator-name = "VDDQ_MMC2_2.8V_AP";
364				regulator-min-microvolt = <2800000>;
365				regulator-max-microvolt = <2800000>;
366				regulator-always-on;
367				regulator-state-mem {
368					regulator-off-in-suspend;
369				};
370			};
371
372			ldo3_reg: LDO3 {
373				regulator-name = "VDD1_E_1.8V_AP";
374				regulator-min-microvolt = <1800000>;
375				regulator-max-microvolt = <1800000>;
376				regulator-always-on;
377			};
378
379			ldo4_reg: LDO4 {
380				regulator-name = "VDD10_MIF_PLL_1.0V_AP";
381				regulator-min-microvolt = <1300000>;
382				regulator-max-microvolt = <1300000>;
383				regulator-always-on;
384				regulator-state-mem {
385					regulator-off-in-suspend;
386				};
387			};
388
389			ldo5_reg: LDO5 {
390				regulator-name = "VDD10_DPLL_1.0V_AP";
391				regulator-min-microvolt = <1000000>;
392				regulator-max-microvolt = <1000000>;
393				regulator-always-on;
394				regulator-state-mem {
395					regulator-off-in-suspend;
396				};
397			};
398
399			ldo6_reg: LDO6 {
400				regulator-name = "VDD10_MIPI2L_1.0V_AP";
401				regulator-min-microvolt = <1000000>;
402				regulator-max-microvolt = <1000000>;
403				regulator-state-mem {
404					regulator-off-in-suspend;
405				};
406			};
407
408			ldo7_reg: LDO7 {
409				regulator-name = "VDD18_MIPI2L_1.8V_AP";
410				regulator-min-microvolt = <1800000>;
411				regulator-max-microvolt = <1800000>;
412				regulator-always-on;
413				regulator-state-mem {
414					regulator-off-in-suspend;
415				};
416			};
417
418			ldo8_reg: LDO8 {
419				regulator-name = "VDD18_LLI_1.8V_AP";
420				regulator-min-microvolt = <1800000>;
421				regulator-max-microvolt = <1800000>;
422				regulator-always-on;
423				regulator-state-mem {
424					regulator-off-in-suspend;
425				};
426			};
427
428			ldo9_reg: LDO9 {
429				regulator-name = "VDD18_ABB_ETC_1.8V_AP";
430				regulator-min-microvolt = <1800000>;
431				regulator-max-microvolt = <1800000>;
432				regulator-always-on;
433				regulator-state-mem {
434					regulator-off-in-suspend;
435				};
436			};
437
438			ldo10_reg: LDO10 {
439				regulator-name = "VDD33_USB30_3.0V_AP";
440				regulator-min-microvolt = <3000000>;
441				regulator-max-microvolt = <3000000>;
442				regulator-state-mem {
443					regulator-off-in-suspend;
444				};
445			};
446
447			ldo11_reg: LDO11 {
448				regulator-name = "VDD_INT_M_1.0V_AP";
449				regulator-min-microvolt = <1000000>;
450				regulator-max-microvolt = <1000000>;
451				regulator-always-on;
452				regulator-state-mem {
453					regulator-off-in-suspend;
454				};
455			};
456
457			ldo12_reg: LDO12 {
458				regulator-name = "VDD_KFC_M_1.1V_AP";
459				regulator-min-microvolt = <800000>;
460				regulator-max-microvolt = <1350000>;
461				regulator-always-on;
462			};
463
464			ldo13_reg: LDO13 {
465				regulator-name = "VDD_G3D_M_0.95V_AP";
466				regulator-min-microvolt = <950000>;
467				regulator-max-microvolt = <950000>;
468				regulator-always-on;
469				regulator-state-mem {
470					regulator-off-in-suspend;
471				};
472			};
473
474			ldo14_reg: LDO14 {
475				regulator-name = "VDDQ_M1_LDO_1.2V_AP";
476				regulator-min-microvolt = <1200000>;
477				regulator-max-microvolt = <1200000>;
478				regulator-always-on;
479				regulator-state-mem {
480					regulator-off-in-suspend;
481				};
482			};
483
484			ldo15_reg: LDO15 {
485				regulator-name = "VDDQ_M2_LDO_1.2V_AP";
486				regulator-min-microvolt = <1200000>;
487				regulator-max-microvolt = <1200000>;
488				regulator-always-on;
489				regulator-state-mem {
490					regulator-off-in-suspend;
491				};
492			};
493
494			ldo16_reg: LDO16 {
495				regulator-name = "VDDQ_EFUSE";
496				regulator-min-microvolt = <1400000>;
497				regulator-max-microvolt = <3400000>;
498				regulator-always-on;
499			};
500
501			ldo17_reg: LDO17 {
502				regulator-name = "V_TFLASH_2.8V_AP";
503				regulator-min-microvolt = <2800000>;
504				regulator-max-microvolt = <2800000>;
505			};
506
507			ldo18_reg: LDO18 {
508				regulator-name = "V_CODEC_1.8V_AP";
509				regulator-min-microvolt = <1800000>;
510				regulator-max-microvolt = <1800000>;
511			};
512
513			ldo19_reg: LDO19 {
514				regulator-name = "VDDA_1.8V_COMP";
515				regulator-min-microvolt = <1800000>;
516				regulator-max-microvolt = <1800000>;
517				regulator-always-on;
518			};
519
520			ldo20_reg: LDO20 {
521				regulator-name = "VCC_2.8V_AP";
522				regulator-min-microvolt = <2800000>;
523				regulator-max-microvolt = <2800000>;
524				regulator-always-on;
525			};
526
527			ldo21_reg: LDO21 {
528				regulator-name = "VT_CAM_1.8V";
529				regulator-min-microvolt = <1800000>;
530				regulator-max-microvolt = <1800000>;
531			};
532
533			ldo22_reg: LDO22 {
534				regulator-name = "CAM_IO_1.8V_AP";
535				regulator-min-microvolt = <1800000>;
536				regulator-max-microvolt = <1800000>;
537			};
538
539			ldo23_reg: LDO23 {
540				regulator-name = "CAM_SEN_CORE_1.05V_AP";
541				regulator-min-microvolt = <1050000>;
542				regulator-max-microvolt = <1050000>;
543			};
544
545			ldo24_reg: LDO24 {
546				regulator-name = "VT_CAM_1.2V";
547				regulator-min-microvolt = <1200000>;
548				regulator-max-microvolt = <1200000>;
549			};
550
551			ldo25_reg: LDO25 {
552				regulator-name = "UNUSED_LDO25";
553				regulator-min-microvolt = <2800000>;
554				regulator-max-microvolt = <2800000>;
555			};
556
557			ldo26_reg: LDO26 {
558				regulator-name = "CAM_AF_2.8V_AP";
559				regulator-min-microvolt = <2800000>;
560				regulator-max-microvolt = <2800000>;
561			};
562
563			ldo27_reg: LDO27 {
564				regulator-name = "VCC_3.0V_LCD_AP";
565				regulator-min-microvolt = <3000000>;
566				regulator-max-microvolt = <3000000>;
567			};
568
569			ldo28_reg: LDO28 {
570				regulator-name = "VCC_1.8V_LCD_AP";
571				regulator-min-microvolt = <1800000>;
572				regulator-max-microvolt = <1800000>;
573			};
574
575			ldo29_reg: LDO29 {
576				regulator-name = "VT_CAM_2.8V";
577				regulator-min-microvolt = <3000000>;
578				regulator-max-microvolt = <3000000>;
579			};
580
581			ldo30_reg: LDO30 {
582				regulator-name = "TSP_AVDD_3.3V_AP";
583				regulator-min-microvolt = <3300000>;
584				regulator-max-microvolt = <3300000>;
585			};
586
587			ldo31_reg: LDO31 {
588				/*
589				 * LDO31 differs from target to target,
590				 * its definition is in the .dts
591				 */
592			};
593
594			ldo32_reg: LDO32 {
595				regulator-name = "VTOUCH_1.8V_AP";
596				regulator-min-microvolt = <1800000>;
597				regulator-max-microvolt = <1800000>;
598			};
599
600			ldo33_reg: LDO33 {
601				regulator-name = "VTOUCH_LED_3.3V";
602				regulator-min-microvolt = <2500000>;
603				regulator-max-microvolt = <3300000>;
604				regulator-ramp-delay = <12500>;
605			};
606
607			ldo34_reg: LDO34 {
608				regulator-name = "VCC_1.8V_MHL_AP";
609				regulator-min-microvolt = <1000000>;
610				regulator-max-microvolt = <2100000>;
611			};
612
613			ldo35_reg: LDO35 {
614				regulator-name = "OIS_VM_2.8V";
615				regulator-min-microvolt = <1800000>;
616				regulator-max-microvolt = <2800000>;
617			};
618
619			ldo36_reg: LDO36 {
620				regulator-name = "VSIL_1.0V";
621				regulator-min-microvolt = <1000000>;
622				regulator-max-microvolt = <1000000>;
623			};
624
625			ldo37_reg: LDO37 {
626				regulator-name = "VF_1.8V";
627				regulator-min-microvolt = <1800000>;
628				regulator-max-microvolt = <1800000>;
629			};
630
631			ldo38_reg: LDO38 {
632				/*
633				 * LDO38 differs from target to target,
634				 * its definition is in the .dts
635				 */
636			};
637
638			ldo39_reg: LDO39 {
639				regulator-name = "V_HRM_1.8V";
640				regulator-min-microvolt = <1800000>;
641				regulator-max-microvolt = <1800000>;
642			};
643
644			ldo40_reg: LDO40 {
645				regulator-name = "V_HRM_3.3V";
646				regulator-min-microvolt = <3300000>;
647				regulator-max-microvolt = <3300000>;
648			};
649
650			buck1_reg: BUCK1 {
651				regulator-name = "VDD_MIF_0.9V_AP";
652				regulator-min-microvolt = <600000>;
653				regulator-max-microvolt = <1500000>;
654				regulator-always-on;
655				regulator-state-mem {
656					regulator-off-in-suspend;
657				};
658			};
659
660			buck2_reg: BUCK2 {
661				regulator-name = "VDD_EGL_1.0V_AP";
662				regulator-min-microvolt = <900000>;
663				regulator-max-microvolt = <1300000>;
664				regulator-always-on;
665				regulator-state-mem {
666					regulator-off-in-suspend;
667				};
668			};
669
670			buck3_reg: BUCK3 {
671				regulator-name = "VDD_KFC_1.0V_AP";
672				regulator-min-microvolt = <800000>;
673				regulator-max-microvolt = <1200000>;
674				regulator-always-on;
675				regulator-state-mem {
676					regulator-off-in-suspend;
677				};
678			};
679
680			buck4_reg: BUCK4 {
681				regulator-name = "VDD_INT_0.95V_AP";
682				regulator-min-microvolt = <600000>;
683				regulator-max-microvolt = <1500000>;
684				regulator-always-on;
685				regulator-state-mem {
686					regulator-off-in-suspend;
687				};
688			};
689
690			buck5_reg: BUCK5 {
691				regulator-name = "VDD_DISP_CAM0_0.9V_AP";
692				regulator-min-microvolt = <600000>;
693				regulator-max-microvolt = <1500000>;
694				regulator-always-on;
695				regulator-state-mem {
696					regulator-off-in-suspend;
697				};
698			};
699
700			buck6_reg: BUCK6 {
701				regulator-name = "VDD_G3D_0.9V_AP";
702				regulator-min-microvolt = <600000>;
703				regulator-max-microvolt = <1500000>;
704				regulator-always-on;
705				regulator-state-mem {
706					regulator-off-in-suspend;
707				};
708			};
709
710			buck7_reg: BUCK7 {
711				regulator-name = "VDD_MEM1_1.2V_AP";
712				regulator-min-microvolt = <1200000>;
713				regulator-max-microvolt = <1200000>;
714				regulator-always-on;
715			};
716
717			buck8_reg: BUCK8 {
718				regulator-name = "VDD_LLDO_1.35V_AP";
719				regulator-min-microvolt = <1350000>;
720				regulator-max-microvolt = <3300000>;
721				regulator-always-on;
722			};
723
724			buck9_reg: BUCK9 {
725				regulator-name = "VDD_MLDO_2.0V_AP";
726				regulator-min-microvolt = <1350000>;
727				regulator-max-microvolt = <3300000>;
728				regulator-always-on;
729			};
730
731			buck10_reg: BUCK10 {
732				regulator-name = "vdd_mem2";
733				regulator-min-microvolt = <550000>;
734				regulator-max-microvolt = <1500000>;
735				regulator-always-on;
736			};
737		};
738	};
739};
740
741&hsi2c_4 {
742	status = "okay";
743
744	s3fwrn5: nfc@27 {
745		compatible = "samsung,s3fwrn5-i2c";
746		reg = <0x27>;
747		interrupt-parent = <&gpa1>;
748		interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
749		s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
750		s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
751	};
752};
753
754&hsi2c_5 {
755	status = "okay";
756
757	stmfts: touchscreen@49 {
758		compatible = "st,stmfts";
759		reg = <0x49>;
760		interrupt-parent = <&gpa1>;
761		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
762		avdd-supply = <&ldo30_reg>;
763		vdd-supply = <&ldo31_reg>;
764	};
765};
766
767&hsi2c_7 {
768	status = "okay";
769	clock-frequency = <1000000>;
770
771	sii8620@39 {
772		reg = <0x39>;
773		compatible = "sil,sii8620";
774		cvcc10-supply = <&ldo36_reg>;
775		iovcc18-supply = <&ldo34_reg>;
776		interrupt-parent = <&gpf0>;
777		interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
778		reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
779		clocks = <&pmu_system_controller 0>;
780		clock-names = "xtal";
781
782		port {
783			mhl_to_hdmi: endpoint {
784				remote-endpoint = <&hdmi_to_mhl>;
785			};
786		};
787	};
788};
789
790&hsi2c_8 {
791	status = "okay";
792
793	max77843@66 {
794		compatible = "maxim,max77843";
795		interrupt-parent = <&gpa1>;
796		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
797		reg = <0x66>;
798
799		muic: max77843-muic {
800			compatible = "maxim,max77843-muic";
801		};
802
803		regulators {
804			compatible = "maxim,max77843-regulator";
805			safeout1_reg: SAFEOUT1 {
806				regulator-name = "SAFEOUT1";
807				regulator-min-microvolt = <3300000>;
808				regulator-max-microvolt = <4950000>;
809			};
810
811			safeout2_reg: SAFEOUT2 {
812				regulator-name = "SAFEOUT2";
813				regulator-min-microvolt = <3300000>;
814				regulator-max-microvolt = <4950000>;
815			};
816
817			charger_reg: CHARGER {
818				regulator-name = "CHARGER";
819				regulator-min-microamp = <100000>;
820				regulator-max-microamp = <3150000>;
821			};
822		};
823
824		haptic: max77843-haptic {
825			compatible = "maxim,max77843-haptic";
826			haptic-supply = <&ldo38_reg>;
827			pwms = <&pwm 0 33670 0>;
828			pwm-names = "haptic";
829		};
830	};
831};
832
833&hsi2c_11 {
834	status = "okay";
835};
836
837&i2s0 {
838	status = "okay";
839};
840
841&mshc_0 {
842	status = "okay";
843	mmc-hs200-1_8v;
844	mmc-hs400-1_8v;
845	cap-mmc-highspeed;
846	non-removable;
847	card-detect-delay = <200>;
848	samsung,dw-mshc-ciu-div = <3>;
849	samsung,dw-mshc-sdr-timing = <0 4>;
850	samsung,dw-mshc-ddr-timing = <0 2>;
851	samsung,dw-mshc-hs400-timing = <0 3>;
852	samsung,read-strobe-delay = <90>;
853	fifo-depth = <0x80>;
854	pinctrl-names = "default";
855	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
856			&sd0_bus8 &sd0_rdqs>;
857	bus-width = <8>;
858	assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
859	assigned-clock-rates = <800000000>;
860};
861
862&mshc_2 {
863	status = "okay";
864	cap-sd-highspeed;
865	disable-wp;
866	cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
867	cd-inverted;
868	card-detect-delay = <200>;
869	samsung,dw-mshc-ciu-div = <3>;
870	samsung,dw-mshc-sdr-timing = <0 4>;
871	samsung,dw-mshc-ddr-timing = <0 2>;
872	fifo-depth = <0x80>;
873	pinctrl-names = "default";
874	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
875	bus-width = <4>;
876};
877
878&ppmu_d0_general {
879	status = "okay";
880	events {
881		ppmu_event0_d0_general: ppmu-event0-d0-general {
882			event-name = "ppmu-event0-d0-general";
883		};
884	};
885};
886
887&ppmu_d1_general {
888	status = "okay";
889	events {
890		ppmu_event0_d1_general: ppmu-event0-d1-general {
891		       event-name = "ppmu-event0-d1-general";
892	       };
893       };
894};
895
896&pinctrl_alive {
897	pinctrl-names = "default";
898	pinctrl-0 = <&initial_alive>;
899
900	initial_alive: initial-state {
901		PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
902		PIN(INPUT, gpa0-1, NONE, FAST_SR1);
903		PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
904		PIN(INPUT, gpa0-3, NONE, FAST_SR1);
905		PIN(INPUT, gpa0-4, NONE, FAST_SR1);
906		PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
907		PIN(INPUT, gpa0-6, NONE, FAST_SR1);
908		PIN(INPUT, gpa0-7, NONE, FAST_SR1);
909
910		PIN(INPUT, gpa1-0, UP, FAST_SR1);
911		PIN(INPUT, gpa1-1, UP, FAST_SR1);
912		PIN(INPUT, gpa1-2, NONE, FAST_SR1);
913		PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
914		PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
915		PIN(INPUT, gpa1-5, NONE, FAST_SR1);
916		PIN(INPUT, gpa1-6, NONE, FAST_SR1);
917		PIN(INPUT, gpa1-7, NONE, FAST_SR1);
918
919		PIN(INPUT, gpa2-0, NONE, FAST_SR1);
920		PIN(INPUT, gpa2-1, NONE, FAST_SR1);
921		PIN(INPUT, gpa2-2, NONE, FAST_SR1);
922		PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
923		PIN(INPUT, gpa2-4, NONE, FAST_SR1);
924		PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
925		PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
926		PIN(INPUT, gpa2-7, NONE, FAST_SR1);
927
928		PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
929		PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
930		PIN(INPUT, gpa3-2, NONE, FAST_SR1);
931		PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
932		PIN(INPUT, gpa3-4, NONE, FAST_SR1);
933		PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
934		PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
935		PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
936
937		PIN(INPUT, gpf1-0, NONE, FAST_SR1);
938		PIN(INPUT, gpf1-1, NONE, FAST_SR1);
939		PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
940		PIN(INPUT, gpf1-4, UP, FAST_SR1);
941		PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
942		PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
943		PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
944
945		PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
946		PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
947		PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
948		PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
949
950		PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
951		PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
952		PIN(INPUT, gpf3-2, NONE, FAST_SR1);
953		PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
954
955		PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
956		PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
957		PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
958		PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
959		PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
960		PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
961		PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
962		PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
963
964		PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
965		PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
966		PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
967		PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
968		PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
969		PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
970		PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
971		PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
972	};
973
974	te_irq: te_irq {
975		samsung,pins = "gpf1-3";
976		samsung,pin-function = <0xf>;
977	};
978};
979
980&pinctrl_cpif {
981	pinctrl-names = "default";
982	pinctrl-0 = <&initial_cpif>;
983
984	initial_cpif: initial-state {
985		PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
986		PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
987	};
988};
989
990&pinctrl_ese {
991	pinctrl-names = "default";
992	pinctrl-0 = <&initial_ese>;
993
994	initial_ese: initial-state {
995		PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
996		PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
997		PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
998	};
999};
1000
1001&pinctrl_fsys {
1002	pinctrl-names = "default";
1003	pinctrl-0 = <&initial_fsys>;
1004
1005	initial_fsys: initial-state {
1006		PIN(INPUT, gpr3-0, NONE, FAST_SR1);
1007		PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
1008		PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
1009		PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
1010		PIN(INPUT, gpr3-7, NONE, FAST_SR1);
1011	};
1012};
1013
1014&pinctrl_imem {
1015	pinctrl-names = "default";
1016	pinctrl-0 = <&initial_imem>;
1017
1018	initial_imem: initial-state {
1019		PIN(INPUT, gpf0-0, UP, FAST_SR1);
1020		PIN(INPUT, gpf0-1, UP, FAST_SR1);
1021		PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
1022		PIN(INPUT, gpf0-3, UP, FAST_SR1);
1023		PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
1024		PIN(INPUT, gpf0-5, NONE, FAST_SR1);
1025		PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
1026		PIN(INPUT, gpf0-7, UP, FAST_SR1);
1027	};
1028};
1029
1030&pinctrl_nfc {
1031	pinctrl-names = "default";
1032	pinctrl-0 = <&initial_nfc>;
1033
1034	initial_nfc: initial-state {
1035		PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
1036	};
1037};
1038
1039&pinctrl_peric {
1040	pinctrl-names = "default";
1041	pinctrl-0 = <&initial_peric>;
1042
1043	initial_peric: initial-state {
1044		PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
1045		PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
1046		PIN(INPUT, gpv7-2, NONE, FAST_SR1);
1047		PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
1048		PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
1049		PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
1050
1051		PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
1052
1053		PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
1054		PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
1055		PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
1056
1057		PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
1058
1059		PIN(INPUT, gpc3-4, NONE, FAST_SR1);
1060		PIN(INPUT, gpc3-5, NONE, FAST_SR1);
1061		PIN(INPUT, gpc3-6, NONE, FAST_SR1);
1062		PIN(INPUT, gpc3-7, NONE, FAST_SR1);
1063
1064		PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
1065		PIN(2, gpg0-1, DOWN, FAST_SR1);
1066
1067		PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
1068
1069		PIN(INPUT, gpd4-0, NONE, FAST_SR1);
1070		PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
1071		PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
1072		PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
1073		PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
1074
1075		PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
1076
1077		PIN(INPUT, gpd8-1, UP, FAST_SR1);
1078
1079		PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
1080		PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
1081		PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
1082		PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
1083		PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
1084
1085		PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1086		PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1087
1088		PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1089		PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1090		PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1091	};
1092};
1093
1094&pinctrl_touch {
1095	pinctrl-names = "default";
1096	pinctrl-0 = <&initial_touch>;
1097
1098	initial_touch: initial-state {
1099		PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1100	};
1101};
1102
1103&pwm {
1104	pinctrl-0 = <&pwm0_out>;
1105	pinctrl-names = "default";
1106	status = "okay";
1107};
1108
1109&mic {
1110	status = "okay";
1111};
1112
1113&pmu_system_controller {
1114	assigned-clocks = <&pmu_system_controller 0>;
1115	assigned-clock-parents = <&xxti>;
1116};
1117
1118&serial_1 {
1119	status = "okay";
1120};
1121
1122&spi_1 {
1123	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1124	status = "okay";
1125
1126	wm5110: wm5110-codec@0 {
1127		compatible = "wlf,wm5110";
1128		reg = <0x0>;
1129		spi-max-frequency = <20000000>;
1130		interrupt-parent = <&gpa0>;
1131		interrupts = <4 IRQ_TYPE_NONE>;
1132		clocks = <&pmu_system_controller 0>,
1133			<&s2mps13_osc S2MPS11_CLK_BT>;
1134		clock-names = "mclk1", "mclk2";
1135
1136		gpio-controller;
1137		#gpio-cells = <2>;
1138
1139		wlf,micd-detect-debounce = <300>;
1140		wlf,micd-bias-start-time = <0x1>;
1141		wlf,micd-rate = <0x7>;
1142		wlf,micd-dbtime = <0x1>;
1143		wlf,micd-force-micbias;
1144		wlf,micd-configs = <0x0 1 0>;
1145		wlf,hpdet-channel = <1>;
1146		wlf,gpsw = <0x1>;
1147		wlf,inmode = <2 0 2 0>;
1148
1149		wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1150		wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1151
1152		/* core supplies */
1153		AVDD-supply = <&ldo18_reg>;
1154		DBVDD1-supply = <&ldo18_reg>;
1155		CPVDD-supply = <&ldo18_reg>;
1156		DBVDD2-supply = <&ldo18_reg>;
1157		DBVDD3-supply = <&ldo18_reg>;
1158
1159		controller-data {
1160			samsung,spi-feedback-delay = <0>;
1161		};
1162	};
1163};
1164
1165&spi_3 {
1166	status = "okay";
1167	no-cs-readback;
1168
1169	irled@0 {
1170		compatible = "ir-spi-led";
1171		reg = <0x0>;
1172		spi-max-frequency = <5000000>;
1173		power-supply = <&irda_regulator>;
1174		duty-cycle = <60>;
1175		led-active-low;
1176
1177		controller-data {
1178			samsung,spi-feedback-delay = <0>;
1179		};
1180	};
1181};
1182
1183&timer {
1184	clock-frequency = <24000000>;
1185};
1186
1187&tmu_atlas0 {
1188	vtmu-supply = <&ldo3_reg>;
1189	status = "okay";
1190};
1191
1192&tmu_apollo {
1193	vtmu-supply = <&ldo3_reg>;
1194	status = "okay";
1195};
1196
1197&tmu_g3d {
1198	vtmu-supply = <&ldo3_reg>;
1199	status = "okay";
1200};
1201
1202&usbdrd30 {
1203	vdd33-supply = <&ldo10_reg>;
1204	vdd10-supply = <&ldo6_reg>;
1205	status = "okay";
1206};
1207
1208&usbdrd_dwc3 {
1209	dr_mode = "otg";
1210	extcon = <&muic>;
1211};
1212
1213&usbdrd30_phy {
1214	vbus-supply = <&safeout1_reg>;
1215	status = "okay";
1216};
1217
1218&xxti {
1219	clock-frequency = <24000000>;
1220};
1221