1/* 2 * SAMSUNG Exynos5433 TM2 board device tree source 3 * 4 * Copyright (c) 2016 Samsung Electronics Co., Ltd. 5 * 6 * Common device tree source file for Samsung's TM2 and TM2E boards 7 * which are based on Samsung Exynos5433 SoC. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14/dts-v1/; 15#include "exynos5433.dtsi" 16#include <dt-bindings/clock/samsung,s2mps11.h> 17#include <dt-bindings/gpio/gpio.h> 18#include <dt-bindings/input/input.h> 19#include <dt-bindings/interrupt-controller/irq.h> 20 21/ { 22 aliases { 23 gsc0 = &gsc_0; 24 gsc1 = &gsc_1; 25 gsc2 = &gsc_2; 26 pinctrl0 = &pinctrl_alive; 27 pinctrl1 = &pinctrl_aud; 28 pinctrl2 = &pinctrl_cpif; 29 pinctrl3 = &pinctrl_ese; 30 pinctrl4 = &pinctrl_finger; 31 pinctrl5 = &pinctrl_fsys; 32 pinctrl6 = &pinctrl_imem; 33 pinctrl7 = &pinctrl_nfc; 34 pinctrl8 = &pinctrl_peric; 35 pinctrl9 = &pinctrl_touch; 36 serial0 = &serial_0; 37 serial1 = &serial_1; 38 serial2 = &serial_2; 39 serial3 = &serial_3; 40 spi0 = &spi_0; 41 spi1 = &spi_1; 42 spi2 = &spi_2; 43 spi3 = &spi_3; 44 spi4 = &spi_4; 45 mshc0 = &mshc_0; 46 mshc2 = &mshc_2; 47 }; 48 49 chosen { 50 stdout-path = &serial_1; 51 }; 52 53 memory@20000000 { 54 device_type = "memory"; 55 reg = <0x0 0x20000000 0x0 0xc0000000>; 56 }; 57 58 gpio-keys { 59 compatible = "gpio-keys"; 60 61 power-key { 62 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>; 63 linux,code = <KEY_POWER>; 64 label = "power key"; 65 debounce-interval = <10>; 66 }; 67 68 volume-up-key { 69 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>; 70 linux,code = <KEY_VOLUMEUP>; 71 label = "volume-up key"; 72 debounce-interval = <10>; 73 }; 74 75 volume-down-key { 76 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>; 77 linux,code = <KEY_VOLUMEDOWN>; 78 label = "volume-down key"; 79 debounce-interval = <10>; 80 }; 81 82 homepage-key { 83 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; 84 linux,code = <KEY_MENU>; 85 label = "homepage key"; 86 debounce-interval = <10>; 87 }; 88 }; 89 90 i2c_max98504: i2c-gpio-0 { 91 compatible = "i2c-gpio"; 92 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */ 93 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >; 94 i2c-gpio,delay-us = <2>; 95 #address-cells = <1>; 96 #size-cells = <0>; 97 status = "okay"; 98 99 max98504: max98504@31 { 100 compatible = "maxim,max98504"; 101 reg = <0x31>; 102 maxim,rx-path = <1>; 103 maxim,tx-path = <1>; 104 maxim,tx-channel-mask = <3>; 105 maxim,tx-channel-source = <2>; 106 }; 107 }; 108 109 irda_regulator: irda-regulator { 110 compatible = "regulator-fixed"; 111 enable-active-high; 112 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>; 113 regulator-name = "irda_regulator"; 114 }; 115 116 sound { 117 compatible = "samsung,tm2-audio"; 118 audio-codec = <&wm5110>; 119 i2s-controller = <&i2s0>; 120 audio-amplifier = <&max98504>; 121 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>; 122 model = "wm5110"; 123 samsung,audio-routing = 124 /* Headphone */ 125 "HP", "HPOUT1L", 126 "HP", "HPOUT1R", 127 128 /* Speaker */ 129 "SPK", "SPKOUT", 130 "SPKOUT", "HPOUT2L", 131 "SPKOUT", "HPOUT2R", 132 133 /* Receiver */ 134 "RCV", "HPOUT3L", 135 "RCV", "HPOUT3R"; 136 status = "okay"; 137 }; 138}; 139 140&adc { 141 vdd-supply = <&ldo3_reg>; 142 status = "okay"; 143 144 thermistor-ap { 145 compatible = "murata,ncp03wf104"; 146 pullup-uv = <1800000>; 147 pullup-ohm = <100000>; 148 pulldown-ohm = <0>; 149 io-channels = <&adc 0>; 150 }; 151 152 thermistor-battery { 153 compatible = "murata,ncp03wf104"; 154 pullup-uv = <1800000>; 155 pullup-ohm = <100000>; 156 pulldown-ohm = <0>; 157 io-channels = <&adc 1>; 158 #thermal-sensor-cells = <0>; 159 }; 160 161 thermistor-charger { 162 compatible = "murata,ncp03wf104"; 163 pullup-uv = <1800000>; 164 pullup-ohm = <100000>; 165 pulldown-ohm = <0>; 166 io-channels = <&adc 2>; 167 }; 168}; 169 170&bus_g2d_400 { 171 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>; 172 vdd-supply = <&buck4_reg>; 173 exynos,saturation-ratio = <10>; 174 status = "okay"; 175}; 176 177&bus_g2d_266 { 178 devfreq = <&bus_g2d_400>; 179 status = "okay"; 180}; 181 182&bus_gscl { 183 devfreq = <&bus_g2d_400>; 184 status = "okay"; 185}; 186 187&bus_hevc { 188 devfreq = <&bus_g2d_400>; 189 status = "okay"; 190}; 191 192&bus_jpeg { 193 devfreq = <&bus_g2d_400>; 194 status = "okay"; 195}; 196 197&bus_mfc { 198 devfreq = <&bus_g2d_400>; 199 status = "okay"; 200}; 201 202&bus_mscl { 203 devfreq = <&bus_g2d_400>; 204 status = "okay"; 205}; 206 207&bus_noc0 { 208 devfreq = <&bus_g2d_400>; 209 status = "okay"; 210}; 211 212&bus_noc1 { 213 devfreq = <&bus_g2d_400>; 214 status = "okay"; 215}; 216 217&bus_noc2 { 218 devfreq = <&bus_g2d_400>; 219 status = "okay"; 220}; 221 222&cmu_aud { 223 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>; 224 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>; 225}; 226 227&cmu_fsys { 228 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, 229 <&cmu_top CLK_MOUT_SCLK_USBHOST30>, 230 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, 231 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, 232 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, 233 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, 234 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, 235 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, 236 <&cmu_top CLK_DIV_SCLK_USBDRD30>, 237 <&cmu_top CLK_DIV_SCLK_USBHOST30>; 238 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, 239 <&cmu_top CLK_MOUT_BUS_PLL_USER>, 240 <&cmu_top CLK_SCLK_USBDRD30_FSYS>, 241 <&cmu_top CLK_SCLK_USBHOST30_FSYS>, 242 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, 243 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, 244 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, 245 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; 246 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, 247 <66700000>, <66700000>; 248}; 249 250&cmu_gscl { 251 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, 252 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; 253 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, 254 <&cmu_top CLK_ACLK_GSCL_333>; 255}; 256 257&cmu_mfc { 258 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>; 259 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>; 260}; 261 262&cmu_mscl { 263 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, 264 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 265 <&cmu_mscl CLK_MOUT_SCLK_JPEG>, 266 <&cmu_top CLK_MOUT_SCLK_JPEG_A>; 267 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>, 268 <&cmu_top CLK_SCLK_JPEG_MSCL>, 269 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 270 <&cmu_top CLK_MOUT_BUS_PLL_USER>; 271}; 272 273&cpu0 { 274 cpu-supply = <&buck3_reg>; 275}; 276 277&cpu4 { 278 cpu-supply = <&buck2_reg>; 279}; 280 281&decon { 282 status = "okay"; 283}; 284 285&decon_tv { 286 status = "okay"; 287 288 ports { 289 #address-cells = <1>; 290 #size-cells = <0>; 291 292 port@0 { 293 reg = <0>; 294 tv_to_hdmi: endpoint { 295 remote-endpoint = <&hdmi_to_tv>; 296 }; 297 }; 298 }; 299}; 300 301&dsi { 302 status = "okay"; 303 vddcore-supply = <&ldo6_reg>; 304 vddio-supply = <&ldo7_reg>; 305 samsung,burst-clock-frequency = <512000000>; 306 samsung,esc-clock-frequency = <16000000>; 307 samsung,pll-clock-frequency = <24000000>; 308 pinctrl-names = "default"; 309 pinctrl-0 = <&te_irq>; 310 311 ports { 312 #address-cells = <1>; 313 #size-cells = <0>; 314 315 port@1 { 316 reg = <1>; 317 318 dsi_out: endpoint { 319 samsung,burst-clock-frequency = <512000000>; 320 samsung,esc-clock-frequency = <16000000>; 321 }; 322 }; 323 }; 324}; 325 326&hdmi { 327 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>; 328 status = "okay"; 329 vdd-supply = <&ldo6_reg>; 330 vdd_osc-supply = <&ldo7_reg>; 331 vdd_pll-supply = <&ldo6_reg>; 332 333 ports { 334 #address-cells = <1>; 335 #size-cells = <0>; 336 337 port@0 { 338 reg = <0>; 339 hdmi_to_tv: endpoint { 340 remote-endpoint = <&tv_to_hdmi>; 341 }; 342 }; 343 344 port@1 { 345 reg = <1>; 346 hdmi_to_mhl: endpoint { 347 remote-endpoint = <&mhl_to_hdmi>; 348 }; 349 }; 350 }; 351}; 352 353&hsi2c_0 { 354 status = "okay"; 355 clock-frequency = <2500000>; 356 357 s2mps13-pmic@66 { 358 compatible = "samsung,s2mps13-pmic"; 359 interrupt-parent = <&gpa0>; 360 interrupts = <7 IRQ_TYPE_NONE>; 361 reg = <0x66>; 362 samsung,s2mps11-wrstbi-ground; 363 364 s2mps13_osc: clocks { 365 compatible = "samsung,s2mps13-clk"; 366 #clock-cells = <1>; 367 clock-output-names = "s2mps13_ap", "s2mps13_cp", 368 "s2mps13_bt"; 369 }; 370 371 regulators { 372 ldo1_reg: LDO1 { 373 regulator-name = "VDD_ALIVE_0.9V_AP"; 374 regulator-min-microvolt = <900000>; 375 regulator-max-microvolt = <900000>; 376 regulator-always-on; 377 }; 378 379 ldo2_reg: LDO2 { 380 regulator-name = "VDDQ_MMC2_2.8V_AP"; 381 regulator-min-microvolt = <2800000>; 382 regulator-max-microvolt = <2800000>; 383 regulator-always-on; 384 regulator-state-mem { 385 regulator-off-in-suspend; 386 }; 387 }; 388 389 ldo3_reg: LDO3 { 390 regulator-name = "VDD1_E_1.8V_AP"; 391 regulator-min-microvolt = <1800000>; 392 regulator-max-microvolt = <1800000>; 393 regulator-always-on; 394 }; 395 396 ldo4_reg: LDO4 { 397 regulator-name = "VDD10_MIF_PLL_1.0V_AP"; 398 regulator-min-microvolt = <1300000>; 399 regulator-max-microvolt = <1300000>; 400 regulator-always-on; 401 regulator-state-mem { 402 regulator-off-in-suspend; 403 }; 404 }; 405 406 ldo5_reg: LDO5 { 407 regulator-name = "VDD10_DPLL_1.0V_AP"; 408 regulator-min-microvolt = <1000000>; 409 regulator-max-microvolt = <1000000>; 410 regulator-always-on; 411 regulator-state-mem { 412 regulator-off-in-suspend; 413 }; 414 }; 415 416 ldo6_reg: LDO6 { 417 regulator-name = "VDD10_MIPI2L_1.0V_AP"; 418 regulator-min-microvolt = <1000000>; 419 regulator-max-microvolt = <1000000>; 420 regulator-state-mem { 421 regulator-off-in-suspend; 422 }; 423 }; 424 425 ldo7_reg: LDO7 { 426 regulator-name = "VDD18_MIPI2L_1.8V_AP"; 427 regulator-min-microvolt = <1800000>; 428 regulator-max-microvolt = <1800000>; 429 regulator-always-on; 430 regulator-state-mem { 431 regulator-off-in-suspend; 432 }; 433 }; 434 435 ldo8_reg: LDO8 { 436 regulator-name = "VDD18_LLI_1.8V_AP"; 437 regulator-min-microvolt = <1800000>; 438 regulator-max-microvolt = <1800000>; 439 regulator-always-on; 440 regulator-state-mem { 441 regulator-off-in-suspend; 442 }; 443 }; 444 445 ldo9_reg: LDO9 { 446 regulator-name = "VDD18_ABB_ETC_1.8V_AP"; 447 regulator-min-microvolt = <1800000>; 448 regulator-max-microvolt = <1800000>; 449 regulator-always-on; 450 regulator-state-mem { 451 regulator-off-in-suspend; 452 }; 453 }; 454 455 ldo10_reg: LDO10 { 456 regulator-name = "VDD33_USB30_3.0V_AP"; 457 regulator-min-microvolt = <3000000>; 458 regulator-max-microvolt = <3000000>; 459 regulator-state-mem { 460 regulator-off-in-suspend; 461 }; 462 }; 463 464 ldo11_reg: LDO11 { 465 regulator-name = "VDD_INT_M_1.0V_AP"; 466 regulator-min-microvolt = <1000000>; 467 regulator-max-microvolt = <1000000>; 468 regulator-always-on; 469 regulator-state-mem { 470 regulator-off-in-suspend; 471 }; 472 }; 473 474 ldo12_reg: LDO12 { 475 regulator-name = "VDD_KFC_M_1.1V_AP"; 476 regulator-min-microvolt = <800000>; 477 regulator-max-microvolt = <1350000>; 478 regulator-always-on; 479 }; 480 481 ldo13_reg: LDO13 { 482 regulator-name = "VDD_G3D_M_0.95V_AP"; 483 regulator-min-microvolt = <950000>; 484 regulator-max-microvolt = <950000>; 485 regulator-always-on; 486 regulator-state-mem { 487 regulator-off-in-suspend; 488 }; 489 }; 490 491 ldo14_reg: LDO14 { 492 regulator-name = "VDDQ_M1_LDO_1.2V_AP"; 493 regulator-min-microvolt = <1200000>; 494 regulator-max-microvolt = <1200000>; 495 regulator-always-on; 496 regulator-state-mem { 497 regulator-off-in-suspend; 498 }; 499 }; 500 501 ldo15_reg: LDO15 { 502 regulator-name = "VDDQ_M2_LDO_1.2V_AP"; 503 regulator-min-microvolt = <1200000>; 504 regulator-max-microvolt = <1200000>; 505 regulator-always-on; 506 regulator-state-mem { 507 regulator-off-in-suspend; 508 }; 509 }; 510 511 ldo16_reg: LDO16 { 512 regulator-name = "VDDQ_EFUSE"; 513 regulator-min-microvolt = <1400000>; 514 regulator-max-microvolt = <3400000>; 515 regulator-always-on; 516 }; 517 518 ldo17_reg: LDO17 { 519 regulator-name = "V_TFLASH_2.8V_AP"; 520 regulator-min-microvolt = <2800000>; 521 regulator-max-microvolt = <2800000>; 522 }; 523 524 ldo18_reg: LDO18 { 525 regulator-name = "V_CODEC_1.8V_AP"; 526 regulator-min-microvolt = <1800000>; 527 regulator-max-microvolt = <1800000>; 528 }; 529 530 ldo19_reg: LDO19 { 531 regulator-name = "VDDA_1.8V_COMP"; 532 regulator-min-microvolt = <1800000>; 533 regulator-max-microvolt = <1800000>; 534 regulator-always-on; 535 }; 536 537 ldo20_reg: LDO20 { 538 regulator-name = "VCC_2.8V_AP"; 539 regulator-min-microvolt = <2800000>; 540 regulator-max-microvolt = <2800000>; 541 regulator-always-on; 542 }; 543 544 ldo21_reg: LDO21 { 545 regulator-name = "VT_CAM_1.8V"; 546 regulator-min-microvolt = <1800000>; 547 regulator-max-microvolt = <1800000>; 548 }; 549 550 ldo22_reg: LDO22 { 551 regulator-name = "CAM_IO_1.8V_AP"; 552 regulator-min-microvolt = <1800000>; 553 regulator-max-microvolt = <1800000>; 554 }; 555 556 ldo23_reg: LDO23 { 557 regulator-name = "CAM_SEN_CORE_1.05V_AP"; 558 regulator-min-microvolt = <1050000>; 559 regulator-max-microvolt = <1050000>; 560 }; 561 562 ldo24_reg: LDO24 { 563 regulator-name = "VT_CAM_1.2V"; 564 regulator-min-microvolt = <1200000>; 565 regulator-max-microvolt = <1200000>; 566 }; 567 568 ldo25_reg: LDO25 { 569 regulator-name = "UNUSED_LDO25"; 570 regulator-min-microvolt = <2800000>; 571 regulator-max-microvolt = <2800000>; 572 }; 573 574 ldo26_reg: LDO26 { 575 regulator-name = "CAM_AF_2.8V_AP"; 576 regulator-min-microvolt = <2800000>; 577 regulator-max-microvolt = <2800000>; 578 }; 579 580 ldo27_reg: LDO27 { 581 regulator-name = "VCC_3.0V_LCD_AP"; 582 regulator-min-microvolt = <3000000>; 583 regulator-max-microvolt = <3000000>; 584 }; 585 586 ldo28_reg: LDO28 { 587 regulator-name = "VCC_1.8V_LCD_AP"; 588 regulator-min-microvolt = <1800000>; 589 regulator-max-microvolt = <1800000>; 590 }; 591 592 ldo29_reg: LDO29 { 593 regulator-name = "VT_CAM_2.8V"; 594 regulator-min-microvolt = <3000000>; 595 regulator-max-microvolt = <3000000>; 596 }; 597 598 ldo30_reg: LDO30 { 599 regulator-name = "TSP_AVDD_3.3V_AP"; 600 regulator-min-microvolt = <3300000>; 601 regulator-max-microvolt = <3300000>; 602 }; 603 604 ldo31_reg: LDO31 { 605 /* 606 * LDO31 differs from target to target, 607 * its definition is in the .dts 608 */ 609 }; 610 611 ldo32_reg: LDO32 { 612 regulator-name = "VTOUCH_1.8V_AP"; 613 regulator-min-microvolt = <1800000>; 614 regulator-max-microvolt = <1800000>; 615 }; 616 617 ldo33_reg: LDO33 { 618 regulator-name = "VTOUCH_LED_3.3V"; 619 regulator-min-microvolt = <2500000>; 620 regulator-max-microvolt = <3300000>; 621 regulator-ramp-delay = <12500>; 622 }; 623 624 ldo34_reg: LDO34 { 625 regulator-name = "VCC_1.8V_MHL_AP"; 626 regulator-min-microvolt = <1000000>; 627 regulator-max-microvolt = <2100000>; 628 }; 629 630 ldo35_reg: LDO35 { 631 regulator-name = "OIS_VM_2.8V"; 632 regulator-min-microvolt = <1800000>; 633 regulator-max-microvolt = <2800000>; 634 }; 635 636 ldo36_reg: LDO36 { 637 regulator-name = "VSIL_1.0V"; 638 regulator-min-microvolt = <1000000>; 639 regulator-max-microvolt = <1000000>; 640 }; 641 642 ldo37_reg: LDO37 { 643 regulator-name = "VF_1.8V"; 644 regulator-min-microvolt = <1800000>; 645 regulator-max-microvolt = <1800000>; 646 }; 647 648 ldo38_reg: LDO38 { 649 /* 650 * LDO38 differs from target to target, 651 * its definition is in the .dts 652 */ 653 }; 654 655 ldo39_reg: LDO39 { 656 regulator-name = "V_HRM_1.8V"; 657 regulator-min-microvolt = <1800000>; 658 regulator-max-microvolt = <1800000>; 659 }; 660 661 ldo40_reg: LDO40 { 662 regulator-name = "V_HRM_3.3V"; 663 regulator-min-microvolt = <3300000>; 664 regulator-max-microvolt = <3300000>; 665 }; 666 667 buck1_reg: BUCK1 { 668 regulator-name = "VDD_MIF_0.9V_AP"; 669 regulator-min-microvolt = <600000>; 670 regulator-max-microvolt = <1500000>; 671 regulator-always-on; 672 regulator-state-mem { 673 regulator-off-in-suspend; 674 }; 675 }; 676 677 buck2_reg: BUCK2 { 678 regulator-name = "VDD_EGL_1.0V_AP"; 679 regulator-min-microvolt = <900000>; 680 regulator-max-microvolt = <1300000>; 681 regulator-always-on; 682 regulator-state-mem { 683 regulator-off-in-suspend; 684 }; 685 }; 686 687 buck3_reg: BUCK3 { 688 regulator-name = "VDD_KFC_1.0V_AP"; 689 regulator-min-microvolt = <800000>; 690 regulator-max-microvolt = <1200000>; 691 regulator-always-on; 692 regulator-state-mem { 693 regulator-off-in-suspend; 694 }; 695 }; 696 697 buck4_reg: BUCK4 { 698 regulator-name = "VDD_INT_0.95V_AP"; 699 regulator-min-microvolt = <600000>; 700 regulator-max-microvolt = <1500000>; 701 regulator-always-on; 702 regulator-state-mem { 703 regulator-off-in-suspend; 704 }; 705 }; 706 707 buck5_reg: BUCK5 { 708 regulator-name = "VDD_DISP_CAM0_0.9V_AP"; 709 regulator-min-microvolt = <600000>; 710 regulator-max-microvolt = <1500000>; 711 regulator-always-on; 712 regulator-state-mem { 713 regulator-off-in-suspend; 714 }; 715 }; 716 717 buck6_reg: BUCK6 { 718 regulator-name = "VDD_G3D_0.9V_AP"; 719 regulator-min-microvolt = <600000>; 720 regulator-max-microvolt = <1500000>; 721 regulator-always-on; 722 regulator-state-mem { 723 regulator-off-in-suspend; 724 }; 725 }; 726 727 buck7_reg: BUCK7 { 728 regulator-name = "VDD_MEM1_1.2V_AP"; 729 regulator-min-microvolt = <1200000>; 730 regulator-max-microvolt = <1200000>; 731 regulator-always-on; 732 }; 733 734 buck8_reg: BUCK8 { 735 regulator-name = "VDD_LLDO_1.35V_AP"; 736 regulator-min-microvolt = <1350000>; 737 regulator-max-microvolt = <3300000>; 738 regulator-always-on; 739 }; 740 741 buck9_reg: BUCK9 { 742 regulator-name = "VDD_MLDO_2.0V_AP"; 743 regulator-min-microvolt = <1350000>; 744 regulator-max-microvolt = <3300000>; 745 regulator-always-on; 746 }; 747 748 buck10_reg: BUCK10 { 749 regulator-name = "vdd_mem2"; 750 regulator-min-microvolt = <550000>; 751 regulator-max-microvolt = <1500000>; 752 regulator-always-on; 753 }; 754 }; 755 }; 756}; 757 758&hsi2c_5 { 759 status = "okay"; 760 761 stmfts: touchscreen@49 { 762 compatible = "st,stmfts"; 763 reg = <0x49>; 764 interrupt-parent = <&gpa1>; 765 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 766 avdd-supply = <&ldo30_reg>; 767 vdd-supply = <&ldo31_reg>; 768 }; 769}; 770 771&hsi2c_7 { 772 status = "okay"; 773 774 sii8620@39 { 775 reg = <0x39>; 776 compatible = "sil,sii8620"; 777 cvcc10-supply = <&ldo36_reg>; 778 iovcc18-supply = <&ldo34_reg>; 779 interrupt-parent = <&gpf0>; 780 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 781 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; 782 clocks = <&pmu_system_controller 0>; 783 clock-names = "xtal"; 784 785 port { 786 mhl_to_hdmi: endpoint { 787 remote-endpoint = <&hdmi_to_mhl>; 788 }; 789 }; 790 }; 791}; 792 793&hsi2c_8 { 794 status = "okay"; 795 796 max77843@66 { 797 compatible = "maxim,max77843"; 798 interrupt-parent = <&gpa1>; 799 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 800 reg = <0x66>; 801 802 muic: max77843-muic { 803 compatible = "maxim,max77843-muic"; 804 }; 805 806 regulators { 807 compatible = "maxim,max77843-regulator"; 808 safeout1_reg: SAFEOUT1 { 809 regulator-name = "SAFEOUT1"; 810 regulator-min-microvolt = <3300000>; 811 regulator-max-microvolt = <4950000>; 812 }; 813 814 safeout2_reg: SAFEOUT2 { 815 regulator-name = "SAFEOUT2"; 816 regulator-min-microvolt = <3300000>; 817 regulator-max-microvolt = <4950000>; 818 }; 819 820 charger_reg: CHARGER { 821 regulator-name = "CHARGER"; 822 regulator-min-microamp = <100000>; 823 regulator-max-microamp = <3150000>; 824 }; 825 }; 826 827 haptic: max77843-haptic { 828 compatible = "maxim,max77843-haptic"; 829 haptic-supply = <&ldo38_reg>; 830 pwms = <&pwm 0 33670 0>; 831 pwm-names = "haptic"; 832 }; 833 }; 834}; 835 836&hsi2c_11 { 837 status = "okay"; 838}; 839 840&i2s0 { 841 status = "okay"; 842}; 843 844&mshc_0 { 845 status = "okay"; 846 num-slots = <1>; 847 mmc-hs200-1_8v; 848 mmc-hs400-1_8v; 849 cap-mmc-highspeed; 850 non-removable; 851 card-detect-delay = <200>; 852 samsung,dw-mshc-ciu-div = <3>; 853 samsung,dw-mshc-sdr-timing = <0 4>; 854 samsung,dw-mshc-ddr-timing = <0 2>; 855 samsung,dw-mshc-hs400-timing = <0 3>; 856 samsung,read-strobe-delay = <90>; 857 fifo-depth = <0x80>; 858 pinctrl-names = "default"; 859 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 860 &sd0_bus8 &sd0_rdqs>; 861 bus-width = <8>; 862 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; 863 assigned-clock-rates = <800000000>; 864}; 865 866&mshc_2 { 867 status = "okay"; 868 num-slots = <1>; 869 cap-sd-highspeed; 870 disable-wp; 871 cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>; 872 cd-inverted; 873 card-detect-delay = <200>; 874 samsung,dw-mshc-ciu-div = <3>; 875 samsung,dw-mshc-sdr-timing = <0 4>; 876 samsung,dw-mshc-ddr-timing = <0 2>; 877 fifo-depth = <0x80>; 878 pinctrl-names = "default"; 879 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; 880 bus-width = <4>; 881}; 882 883&ppmu_d0_general { 884 status = "okay"; 885 events { 886 ppmu_event0_d0_general: ppmu-event0-d0-general { 887 event-name = "ppmu-event0-d0-general"; 888 }; 889 }; 890}; 891 892&ppmu_d1_general { 893 status = "okay"; 894 events { 895 ppmu_event0_d1_general: ppmu-event0-d1-general { 896 event-name = "ppmu-event0-d1-general"; 897 }; 898 }; 899}; 900 901&pinctrl_alive { 902 pinctrl-names = "default"; 903 pinctrl-0 = <&initial_alive>; 904 905 initial_alive: initial-state { 906 PIN(INPUT, gpa0-0, DOWN, FAST_SR1); 907 PIN(INPUT, gpa0-1, NONE, FAST_SR1); 908 PIN(INPUT, gpa0-2, DOWN, FAST_SR1); 909 PIN(INPUT, gpa0-3, NONE, FAST_SR1); 910 PIN(INPUT, gpa0-4, NONE, FAST_SR1); 911 PIN(INPUT, gpa0-5, DOWN, FAST_SR1); 912 PIN(INPUT, gpa0-6, NONE, FAST_SR1); 913 PIN(INPUT, gpa0-7, NONE, FAST_SR1); 914 915 PIN(INPUT, gpa1-0, UP, FAST_SR1); 916 PIN(INPUT, gpa1-1, UP, FAST_SR1); 917 PIN(INPUT, gpa1-2, NONE, FAST_SR1); 918 PIN(INPUT, gpa1-3, DOWN, FAST_SR1); 919 PIN(INPUT, gpa1-4, DOWN, FAST_SR1); 920 PIN(INPUT, gpa1-5, NONE, FAST_SR1); 921 PIN(INPUT, gpa1-6, NONE, FAST_SR1); 922 PIN(INPUT, gpa1-7, NONE, FAST_SR1); 923 924 PIN(INPUT, gpa2-0, NONE, FAST_SR1); 925 PIN(INPUT, gpa2-1, NONE, FAST_SR1); 926 PIN(INPUT, gpa2-2, NONE, FAST_SR1); 927 PIN(INPUT, gpa2-3, DOWN, FAST_SR1); 928 PIN(INPUT, gpa2-4, NONE, FAST_SR1); 929 PIN(INPUT, gpa2-5, DOWN, FAST_SR1); 930 PIN(INPUT, gpa2-6, DOWN, FAST_SR1); 931 PIN(INPUT, gpa2-7, NONE, FAST_SR1); 932 933 PIN(INPUT, gpa3-0, DOWN, FAST_SR1); 934 PIN(INPUT, gpa3-1, DOWN, FAST_SR1); 935 PIN(INPUT, gpa3-2, NONE, FAST_SR1); 936 PIN(INPUT, gpa3-3, DOWN, FAST_SR1); 937 PIN(INPUT, gpa3-4, NONE, FAST_SR1); 938 PIN(INPUT, gpa3-5, DOWN, FAST_SR1); 939 PIN(INPUT, gpa3-6, DOWN, FAST_SR1); 940 PIN(INPUT, gpa3-7, DOWN, FAST_SR1); 941 942 PIN(INPUT, gpf1-0, NONE, FAST_SR1); 943 PIN(INPUT, gpf1-1, NONE, FAST_SR1); 944 PIN(INPUT, gpf1-2, DOWN, FAST_SR1); 945 PIN(INPUT, gpf1-4, UP, FAST_SR1); 946 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1); 947 PIN(INPUT, gpf1-6, DOWN, FAST_SR1); 948 PIN(INPUT, gpf1-7, DOWN, FAST_SR1); 949 950 PIN(INPUT, gpf2-0, DOWN, FAST_SR1); 951 PIN(INPUT, gpf2-1, DOWN, FAST_SR1); 952 PIN(INPUT, gpf2-2, DOWN, FAST_SR1); 953 PIN(INPUT, gpf2-3, DOWN, FAST_SR1); 954 955 PIN(INPUT, gpf3-0, DOWN, FAST_SR1); 956 PIN(INPUT, gpf3-1, DOWN, FAST_SR1); 957 PIN(INPUT, gpf3-2, NONE, FAST_SR1); 958 PIN(INPUT, gpf3-3, DOWN, FAST_SR1); 959 960 PIN(INPUT, gpf4-0, DOWN, FAST_SR1); 961 PIN(INPUT, gpf4-1, DOWN, FAST_SR1); 962 PIN(INPUT, gpf4-2, DOWN, FAST_SR1); 963 PIN(INPUT, gpf4-3, DOWN, FAST_SR1); 964 PIN(INPUT, gpf4-4, DOWN, FAST_SR1); 965 PIN(INPUT, gpf4-5, DOWN, FAST_SR1); 966 PIN(INPUT, gpf4-6, DOWN, FAST_SR1); 967 PIN(INPUT, gpf4-7, DOWN, FAST_SR1); 968 969 PIN(INPUT, gpf5-0, DOWN, FAST_SR1); 970 PIN(INPUT, gpf5-1, DOWN, FAST_SR1); 971 PIN(INPUT, gpf5-2, DOWN, FAST_SR1); 972 PIN(INPUT, gpf5-3, DOWN, FAST_SR1); 973 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1); 974 PIN(INPUT, gpf5-5, DOWN, FAST_SR1); 975 PIN(INPUT, gpf5-6, DOWN, FAST_SR1); 976 PIN(INPUT, gpf5-7, DOWN, FAST_SR1); 977 }; 978 979 te_irq: te_irq { 980 samsung,pins = "gpf1-3"; 981 samsung,pin-function = <0xf>; 982 }; 983}; 984 985&pinctrl_cpif { 986 pinctrl-names = "default"; 987 pinctrl-0 = <&initial_cpif>; 988 989 initial_cpif: initial-state { 990 PIN(INPUT, gpv6-0, DOWN, FAST_SR1); 991 PIN(INPUT, gpv6-1, DOWN, FAST_SR1); 992 }; 993}; 994 995&pinctrl_ese { 996 pinctrl-names = "default"; 997 pinctrl-0 = <&initial_ese>; 998 999 initial_ese: initial-state { 1000 PIN(INPUT, gpj2-0, DOWN, FAST_SR1); 1001 PIN(INPUT, gpj2-1, DOWN, FAST_SR1); 1002 PIN(INPUT, gpj2-2, DOWN, FAST_SR1); 1003 }; 1004}; 1005 1006&pinctrl_fsys { 1007 pinctrl-names = "default"; 1008 pinctrl-0 = <&initial_fsys>; 1009 1010 initial_fsys: initial-state { 1011 PIN(INPUT, gpr3-0, NONE, FAST_SR1); 1012 PIN(INPUT, gpr3-1, DOWN, FAST_SR1); 1013 PIN(INPUT, gpr3-2, DOWN, FAST_SR1); 1014 PIN(INPUT, gpr3-3, DOWN, FAST_SR1); 1015 PIN(INPUT, gpr3-7, NONE, FAST_SR1); 1016 }; 1017}; 1018 1019&pinctrl_imem { 1020 pinctrl-names = "default"; 1021 pinctrl-0 = <&initial_imem>; 1022 1023 initial_imem: initial-state { 1024 PIN(INPUT, gpf0-0, UP, FAST_SR1); 1025 PIN(INPUT, gpf0-1, UP, FAST_SR1); 1026 PIN(INPUT, gpf0-2, DOWN, FAST_SR1); 1027 PIN(INPUT, gpf0-3, UP, FAST_SR1); 1028 PIN(INPUT, gpf0-4, DOWN, FAST_SR1); 1029 PIN(INPUT, gpf0-5, NONE, FAST_SR1); 1030 PIN(INPUT, gpf0-6, DOWN, FAST_SR1); 1031 PIN(INPUT, gpf0-7, UP, FAST_SR1); 1032 }; 1033}; 1034 1035&pinctrl_nfc { 1036 pinctrl-names = "default"; 1037 pinctrl-0 = <&initial_nfc>; 1038 1039 initial_nfc: initial-state { 1040 PIN(INPUT, gpj0-2, DOWN, FAST_SR1); 1041 }; 1042}; 1043 1044&pinctrl_peric { 1045 pinctrl-names = "default"; 1046 pinctrl-0 = <&initial_peric>; 1047 1048 initial_peric: initial-state { 1049 PIN(INPUT, gpv7-0, DOWN, FAST_SR1); 1050 PIN(INPUT, gpv7-1, DOWN, FAST_SR1); 1051 PIN(INPUT, gpv7-2, NONE, FAST_SR1); 1052 PIN(INPUT, gpv7-3, DOWN, FAST_SR1); 1053 PIN(INPUT, gpv7-4, DOWN, FAST_SR1); 1054 PIN(INPUT, gpv7-5, DOWN, FAST_SR1); 1055 1056 PIN(INPUT, gpb0-4, DOWN, FAST_SR1); 1057 1058 PIN(INPUT, gpc0-2, DOWN, FAST_SR1); 1059 PIN(INPUT, gpc0-5, DOWN, FAST_SR1); 1060 PIN(INPUT, gpc0-7, DOWN, FAST_SR1); 1061 1062 PIN(INPUT, gpc1-1, DOWN, FAST_SR1); 1063 1064 PIN(INPUT, gpc3-4, NONE, FAST_SR1); 1065 PIN(INPUT, gpc3-5, NONE, FAST_SR1); 1066 PIN(INPUT, gpc3-6, NONE, FAST_SR1); 1067 PIN(INPUT, gpc3-7, NONE, FAST_SR1); 1068 1069 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1); 1070 PIN(2, gpg0-1, DOWN, FAST_SR1); 1071 1072 PIN(INPUT, gpd2-5, DOWN, FAST_SR1); 1073 1074 PIN(INPUT, gpd4-0, NONE, FAST_SR1); 1075 PIN(INPUT, gpd4-1, DOWN, FAST_SR1); 1076 PIN(INPUT, gpd4-2, DOWN, FAST_SR1); 1077 PIN(INPUT, gpd4-3, DOWN, FAST_SR1); 1078 PIN(INPUT, gpd4-4, DOWN, FAST_SR1); 1079 1080 PIN(INPUT, gpd6-3, DOWN, FAST_SR1); 1081 1082 PIN(INPUT, gpd8-1, UP, FAST_SR1); 1083 1084 PIN(INPUT, gpg1-0, DOWN, FAST_SR1); 1085 PIN(INPUT, gpg1-1, DOWN, FAST_SR1); 1086 PIN(INPUT, gpg1-2, DOWN, FAST_SR1); 1087 PIN(INPUT, gpg1-3, DOWN, FAST_SR1); 1088 PIN(INPUT, gpg1-4, DOWN, FAST_SR1); 1089 1090 PIN(INPUT, gpg2-0, DOWN, FAST_SR1); 1091 PIN(INPUT, gpg2-1, DOWN, FAST_SR1); 1092 1093 PIN(INPUT, gpg3-0, DOWN, FAST_SR1); 1094 PIN(INPUT, gpg3-1, DOWN, FAST_SR1); 1095 PIN(INPUT, gpg3-5, DOWN, FAST_SR1); 1096 }; 1097}; 1098 1099&pinctrl_touch { 1100 pinctrl-names = "default"; 1101 pinctrl-0 = <&initial_touch>; 1102 1103 initial_touch: initial-state { 1104 PIN(INPUT, gpj1-2, DOWN, FAST_SR1); 1105 }; 1106}; 1107 1108&pwm { 1109 pinctrl-0 = <&pwm0_out>; 1110 pinctrl-names = "default"; 1111 status = "okay"; 1112}; 1113 1114&mic { 1115 status = "okay"; 1116}; 1117 1118&pmu_system_controller { 1119 assigned-clocks = <&pmu_system_controller 0>; 1120 assigned-clock-parents = <&xxti>; 1121}; 1122 1123&serial_1 { 1124 status = "okay"; 1125}; 1126 1127&spi_1 { 1128 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; 1129 status = "okay"; 1130 1131 wm5110: wm5110-codec@0 { 1132 compatible = "wlf,wm5110"; 1133 reg = <0x0>; 1134 spi-max-frequency = <20000000>; 1135 interrupt-parent = <&gpa0>; 1136 interrupts = <4 IRQ_TYPE_NONE>; 1137 clocks = <&pmu_system_controller 0>, 1138 <&s2mps13_osc S2MPS11_CLK_BT>; 1139 clock-names = "mclk1", "mclk2"; 1140 1141 gpio-controller; 1142 #gpio-cells = <2>; 1143 1144 wlf,micd-detect-debounce = <300>; 1145 wlf,micd-bias-start-time = <0x1>; 1146 wlf,micd-rate = <0x7>; 1147 wlf,micd-dbtime = <0x1>; 1148 wlf,micd-force-micbias; 1149 wlf,micd-configs = <0x0 1 0>; 1150 wlf,hpdet-channel = <1>; 1151 wlf,gpsw = <0x1>; 1152 wlf,inmode = <2 0 2 0>; 1153 1154 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; 1155 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; 1156 1157 /* core supplies */ 1158 AVDD-supply = <&ldo18_reg>; 1159 DBVDD1-supply = <&ldo18_reg>; 1160 CPVDD-supply = <&ldo18_reg>; 1161 DBVDD2-supply = <&ldo18_reg>; 1162 DBVDD3-supply = <&ldo18_reg>; 1163 1164 controller-data { 1165 samsung,spi-feedback-delay = <0>; 1166 }; 1167 }; 1168}; 1169 1170&spi_3 { 1171 status = "okay"; 1172 no-cs-readback; 1173 1174 irled@0 { 1175 compatible = "ir-spi-led"; 1176 reg = <0x0>; 1177 spi-max-frequency = <5000000>; 1178 power-supply = <&irda_regulator>; 1179 duty-cycle = <60>; 1180 led-active-low; 1181 1182 controller-data { 1183 samsung,spi-feedback-delay = <0>; 1184 }; 1185 }; 1186}; 1187 1188&timer { 1189 clock-frequency = <24000000>; 1190}; 1191 1192&tmu_atlas0 { 1193 vtmu-supply = <&ldo3_reg>; 1194 status = "okay"; 1195}; 1196 1197&tmu_apollo { 1198 vtmu-supply = <&ldo3_reg>; 1199 status = "okay"; 1200}; 1201 1202&tmu_g3d { 1203 vtmu-supply = <&ldo3_reg>; 1204 status = "okay"; 1205}; 1206 1207&usbdrd30 { 1208 vdd33-supply = <&ldo10_reg>; 1209 vdd10-supply = <&ldo6_reg>; 1210 status = "okay"; 1211}; 1212 1213&usbdrd_dwc3_0 { 1214 dr_mode = "otg"; 1215}; 1216 1217&usbdrd30_phy { 1218 vbus-supply = <&safeout1_reg>; 1219 status = "okay"; 1220}; 1221 1222&xxti { 1223 clock-frequency = <24000000>; 1224}; 1225