1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung Exynos5433 TM2 board device tree source
4 *
5 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
6 *
7 * Common device tree source file for Samsung's TM2 and TM2E boards
8 * which are based on Samsung Exynos5433 SoC.
9 */
10
11/dts-v1/;
12#include "exynos5433.dtsi"
13#include <dt-bindings/clock/samsung,s2mps11.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/sound/samsung-i2s.h>
18
19/ {
20	aliases {
21		gsc0 = &gsc_0;
22		gsc1 = &gsc_1;
23		gsc2 = &gsc_2;
24		pinctrl0 = &pinctrl_alive;
25		pinctrl1 = &pinctrl_aud;
26		pinctrl2 = &pinctrl_cpif;
27		pinctrl3 = &pinctrl_ese;
28		pinctrl4 = &pinctrl_finger;
29		pinctrl5 = &pinctrl_fsys;
30		pinctrl6 = &pinctrl_imem;
31		pinctrl7 = &pinctrl_nfc;
32		pinctrl8 = &pinctrl_peric;
33		pinctrl9 = &pinctrl_touch;
34		serial0 = &serial_0;
35		serial1 = &serial_1;
36		serial2 = &serial_2;
37		serial3 = &serial_3;
38		spi0 = &spi_0;
39		spi1 = &spi_1;
40		spi2 = &spi_2;
41		spi3 = &spi_3;
42		spi4 = &spi_4;
43		mshc0 = &mshc_0;
44		mshc2 = &mshc_2;
45	};
46
47	chosen {
48		stdout-path = &serial_1;
49	};
50
51	memory@20000000 {
52		device_type = "memory";
53		reg = <0x0 0x20000000 0x0 0xc0000000>;
54	};
55
56	gpio-keys {
57		compatible = "gpio-keys";
58
59		power-key {
60			gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
61			linux,code = <KEY_POWER>;
62			label = "power key";
63			debounce-interval = <10>;
64		};
65
66		volume-up-key {
67			gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
68			linux,code = <KEY_VOLUMEUP>;
69			label = "volume-up key";
70			debounce-interval = <10>;
71		};
72
73		volume-down-key {
74			gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
75			linux,code = <KEY_VOLUMEDOWN>;
76			label = "volume-down key";
77			debounce-interval = <10>;
78		};
79
80		homepage-key {
81			gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
82			linux,code = <KEY_MENU>;
83			label = "homepage key";
84			debounce-interval = <10>;
85		};
86	};
87
88	i2c_max98504: i2c-gpio-0 {
89		compatible = "i2c-gpio";
90		sda-gpios = <&gpd0 1 GPIO_ACTIVE_HIGH>;
91		scl-gpios = <&gpd0 0 GPIO_ACTIVE_HIGH>;
92		i2c-gpio,delay-us = <2>;
93		#address-cells = <1>;
94		#size-cells = <0>;
95
96		max98504: amplifier@31 {
97			compatible = "maxim,max98504";
98			reg = <0x31>;
99			maxim,rx-path = <1>;
100			maxim,tx-path = <1>;
101			maxim,tx-channel-mask = <3>;
102			maxim,tx-channel-source = <2>;
103		};
104	};
105
106	irda_regulator: irda-regulator {
107		compatible = "regulator-fixed";
108		enable-active-high;
109		gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
110		regulator-name = "irda_regulator";
111	};
112
113	sound {
114		compatible = "samsung,tm2-audio";
115		audio-codec = <&wm5110>, <&hdmi>;
116		i2s-controller = <&i2s0 0>, <&i2s1 0>;
117		audio-amplifier = <&max98504>;
118		mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
119		model = "wm5110";
120		samsung,audio-routing =
121			/* Headphone */
122			"HP", "HPOUT1L",
123			"HP", "HPOUT1R",
124
125			/* Speaker */
126			"SPK", "SPKOUT",
127			"SPKOUT", "HPOUT2L",
128			"SPKOUT", "HPOUT2R",
129
130			/* Receiver */
131			"RCV", "HPOUT3L",
132			"RCV", "HPOUT3R";
133		status = "okay";
134	};
135};
136
137&adc {
138	vdd-supply = <&ldo3_reg>;
139	status = "okay";
140
141	thermistor-ap {
142		compatible = "murata,ncp03wf104";
143		pullup-uv = <1800000>;
144		pullup-ohm = <100000>;
145		pulldown-ohm = <0>;
146		io-channels = <&adc 0>;
147	};
148
149	thermistor-battery {
150		compatible = "murata,ncp03wf104";
151		pullup-uv = <1800000>;
152		pullup-ohm = <100000>;
153		pulldown-ohm = <0>;
154		io-channels = <&adc 1>;
155		#thermal-sensor-cells = <0>;
156	};
157
158	thermistor-charger {
159		compatible = "murata,ncp03wf104";
160		pullup-uv = <1800000>;
161		pullup-ohm = <100000>;
162		pulldown-ohm = <0>;
163		io-channels = <&adc 2>;
164	};
165};
166
167&bus_g2d_400 {
168	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
169	vdd-supply = <&buck4_reg>;
170	exynos,saturation-ratio = <10>;
171	status = "okay";
172};
173
174&bus_g2d_266 {
175	devfreq = <&bus_g2d_400>;
176	status = "okay";
177};
178
179&bus_gscl {
180	devfreq = <&bus_g2d_400>;
181	status = "okay";
182};
183
184&bus_hevc {
185	devfreq = <&bus_g2d_400>;
186	status = "okay";
187};
188
189&bus_jpeg {
190	devfreq = <&bus_g2d_400>;
191	status = "okay";
192};
193
194&bus_mfc {
195	devfreq = <&bus_g2d_400>;
196	status = "okay";
197};
198
199&bus_mscl {
200	devfreq = <&bus_g2d_400>;
201	status = "okay";
202};
203
204&bus_noc0 {
205	devfreq = <&bus_g2d_400>;
206	status = "okay";
207};
208
209&bus_noc1 {
210	devfreq = <&bus_g2d_400>;
211	status = "okay";
212};
213
214&bus_noc2 {
215	devfreq = <&bus_g2d_400>;
216	status = "okay";
217};
218
219&cmu_aud {
220	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
221		<&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
222		<&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
223		<&cmu_top CLK_MOUT_AUD_PLL>,
224		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
225		<&cmu_top CLK_MOUT_SCLK_AUDIO0>,
226		<&cmu_top CLK_MOUT_SCLK_AUDIO1>,
227		<&cmu_top CLK_MOUT_SCLK_SPDIF>,
228
229		<&cmu_aud CLK_DIV_AUD_CA5>,
230		<&cmu_aud CLK_DIV_ACLK_AUD>,
231		<&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
232		<&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
233		<&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
234		<&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
235		<&cmu_aud CLK_DIV_SCLK_AUD_UART>,
236		<&cmu_top CLK_DIV_SCLK_AUDIO0>,
237		<&cmu_top CLK_DIV_SCLK_AUDIO1>,
238		<&cmu_top CLK_DIV_SCLK_PCM1>,
239		<&cmu_top CLK_DIV_SCLK_I2S1>;
240
241	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
242		<&cmu_aud CLK_MOUT_AUD_PLL_USER>,
243		<&cmu_aud CLK_MOUT_AUD_PLL_USER>,
244		<&cmu_top CLK_FOUT_AUD_PLL>,
245		<&cmu_top CLK_MOUT_AUD_PLL>,
246		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
247		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
248		<&cmu_top CLK_SCLK_AUDIO0>;
249
250	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
251		<196608001>, <65536001>, <32768001>, <49152001>,
252		<2048001>, <24576001>, <196608001>,
253		<24576001>, <98304001>, <2048001>, <49152001>;
254};
255
256&cmu_fsys {
257	assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
258		<&cmu_top CLK_MOUT_SCLK_USBHOST30>,
259		<&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
260		<&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
261		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
262		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
263		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
264		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
265		<&cmu_top CLK_DIV_SCLK_USBDRD30>,
266		<&cmu_top CLK_DIV_SCLK_USBHOST30>;
267	assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
268		<&cmu_top CLK_MOUT_BUS_PLL_USER>,
269		<&cmu_top CLK_SCLK_USBDRD30_FSYS>,
270		<&cmu_top CLK_SCLK_USBHOST30_FSYS>,
271		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
272		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
273		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
274		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
275	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
276			       <66700000>, <66700000>;
277};
278
279&cmu_gscl {
280	assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
281			  <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
282	assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
283				 <&cmu_top CLK_ACLK_GSCL_333>;
284};
285
286&cmu_mfc {
287	assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
288	assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
289};
290
291&cmu_mif {
292	assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>;
293	assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
294	assigned-clock-rates = <0>, <333000000>;
295};
296
297&cmu_mscl {
298	assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
299			  <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
300			  <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
301			  <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
302	assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
303				 <&cmu_top CLK_SCLK_JPEG_MSCL>,
304				 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
305				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
306};
307
308&cmu_top {
309	assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
310	assigned-clock-rates = <196608001>;
311};
312
313&cpu0 {
314	cpu-supply = <&buck3_reg>;
315};
316
317&cpu4 {
318	cpu-supply = <&buck2_reg>;
319};
320
321&decon {
322	status = "okay";
323};
324
325&decon_tv {
326	status = "okay";
327
328	ports {
329		#address-cells = <1>;
330		#size-cells = <0>;
331
332		port@0 {
333			reg = <0>;
334			tv_to_hdmi: endpoint {
335				remote-endpoint = <&hdmi_to_tv>;
336			};
337		};
338	};
339};
340
341&dsi {
342	status = "okay";
343	vddcore-supply = <&ldo6_reg>;
344	vddio-supply = <&ldo7_reg>;
345	samsung,burst-clock-frequency = <512000000>;
346	samsung,esc-clock-frequency = <16000000>;
347	samsung,pll-clock-frequency = <24000000>;
348	pinctrl-names = "default";
349	pinctrl-0 = <&te_irq>;
350};
351
352&gpu {
353	mali-supply = <&buck6_reg>;
354	status = "okay";
355};
356
357&hdmi {
358	hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
359	status = "okay";
360	vdd-supply = <&ldo6_reg>;
361	vdd_osc-supply = <&ldo7_reg>;
362	vdd_pll-supply = <&ldo6_reg>;
363
364	ports {
365		#address-cells = <1>;
366		#size-cells = <0>;
367
368		port@0 {
369			reg = <0>;
370			hdmi_to_tv: endpoint {
371				remote-endpoint = <&tv_to_hdmi>;
372			};
373		};
374
375		port@1 {
376			reg = <1>;
377			hdmi_to_mhl: endpoint {
378				remote-endpoint = <&mhl_to_hdmi>;
379			};
380		};
381	};
382};
383
384&hsi2c_0 {
385	status = "okay";
386	clock-frequency = <2500000>;
387
388	pmic@66 {
389		compatible = "samsung,s2mps13-pmic";
390		interrupt-parent = <&gpa0>;
391		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
392		reg = <0x66>;
393		samsung,s2mps11-wrstbi-ground;
394		wakeup-source;
395
396		s2mps13_osc: clocks {
397			compatible = "samsung,s2mps13-clk";
398			#clock-cells = <1>;
399			clock-output-names = "s2mps13_ap", "s2mps13_cp",
400				"s2mps13_bt";
401		};
402
403		regulators {
404			ldo1_reg: LDO1 {
405				regulator-name = "VDD_ALIVE_0.9V_AP";
406				regulator-min-microvolt = <900000>;
407				regulator-max-microvolt = <900000>;
408				regulator-always-on;
409			};
410
411			ldo2_reg: LDO2 {
412				regulator-name = "VDDQ_MMC2_2.8V_AP";
413				regulator-min-microvolt = <2800000>;
414				regulator-max-microvolt = <2800000>;
415				regulator-always-on;
416				regulator-state-mem {
417					regulator-off-in-suspend;
418				};
419			};
420
421			ldo3_reg: LDO3 {
422				regulator-name = "VDD1_E_1.8V_AP";
423				regulator-min-microvolt = <1800000>;
424				regulator-max-microvolt = <1800000>;
425				regulator-always-on;
426			};
427
428			ldo4_reg: LDO4 {
429				regulator-name = "VDD10_MIF_PLL_1.0V_AP";
430				regulator-min-microvolt = <1300000>;
431				regulator-max-microvolt = <1300000>;
432				regulator-always-on;
433				regulator-state-mem {
434					regulator-off-in-suspend;
435				};
436			};
437
438			ldo5_reg: LDO5 {
439				regulator-name = "VDD10_DPLL_1.0V_AP";
440				regulator-min-microvolt = <1000000>;
441				regulator-max-microvolt = <1000000>;
442				regulator-always-on;
443				regulator-state-mem {
444					regulator-off-in-suspend;
445				};
446			};
447
448			ldo6_reg: LDO6 {
449				regulator-name = "VDD10_MIPI2L_1.0V_AP";
450				regulator-min-microvolt = <1000000>;
451				regulator-max-microvolt = <1000000>;
452				regulator-state-mem {
453					regulator-off-in-suspend;
454				};
455			};
456
457			ldo7_reg: LDO7 {
458				regulator-name = "VDD18_MIPI2L_1.8V_AP";
459				regulator-min-microvolt = <1800000>;
460				regulator-max-microvolt = <1800000>;
461				regulator-always-on;
462				regulator-state-mem {
463					regulator-off-in-suspend;
464				};
465			};
466
467			ldo8_reg: LDO8 {
468				regulator-name = "VDD18_LLI_1.8V_AP";
469				regulator-min-microvolt = <1800000>;
470				regulator-max-microvolt = <1800000>;
471				regulator-always-on;
472				regulator-state-mem {
473					regulator-off-in-suspend;
474				};
475			};
476
477			ldo9_reg: LDO9 {
478				regulator-name = "VDD18_ABB_ETC_1.8V_AP";
479				regulator-min-microvolt = <1800000>;
480				regulator-max-microvolt = <1800000>;
481				regulator-always-on;
482				regulator-state-mem {
483					regulator-off-in-suspend;
484				};
485			};
486
487			ldo10_reg: LDO10 {
488				regulator-name = "VDD33_USB30_3.0V_AP";
489				regulator-min-microvolt = <3000000>;
490				regulator-max-microvolt = <3000000>;
491				regulator-state-mem {
492					regulator-off-in-suspend;
493				};
494			};
495
496			ldo11_reg: LDO11 {
497				regulator-name = "VDD_INT_M_1.0V_AP";
498				regulator-min-microvolt = <1000000>;
499				regulator-max-microvolt = <1000000>;
500				regulator-always-on;
501				regulator-state-mem {
502					regulator-off-in-suspend;
503				};
504			};
505
506			ldo12_reg: LDO12 {
507				regulator-name = "VDD_KFC_M_1.1V_AP";
508				regulator-min-microvolt = <800000>;
509				regulator-max-microvolt = <1350000>;
510				regulator-always-on;
511			};
512
513			ldo13_reg: LDO13 {
514				regulator-name = "VDD_G3D_M_0.95V_AP";
515				regulator-min-microvolt = <950000>;
516				regulator-max-microvolt = <950000>;
517				regulator-always-on;
518				regulator-state-mem {
519					regulator-off-in-suspend;
520				};
521			};
522
523			ldo14_reg: LDO14 {
524				regulator-name = "VDDQ_M1_LDO_1.2V_AP";
525				regulator-min-microvolt = <1200000>;
526				regulator-max-microvolt = <1200000>;
527				regulator-always-on;
528				regulator-state-mem {
529					regulator-off-in-suspend;
530				};
531			};
532
533			ldo15_reg: LDO15 {
534				regulator-name = "VDDQ_M2_LDO_1.2V_AP";
535				regulator-min-microvolt = <1200000>;
536				regulator-max-microvolt = <1200000>;
537				regulator-always-on;
538				regulator-state-mem {
539					regulator-off-in-suspend;
540				};
541			};
542
543			ldo16_reg: LDO16 {
544				regulator-name = "VDDQ_EFUSE";
545				regulator-min-microvolt = <1400000>;
546				regulator-max-microvolt = <3400000>;
547				regulator-always-on;
548			};
549
550			ldo17_reg: LDO17 {
551				regulator-name = "V_TFLASH_2.8V_AP";
552				regulator-min-microvolt = <2800000>;
553				regulator-max-microvolt = <2800000>;
554			};
555
556			ldo18_reg: LDO18 {
557				regulator-name = "V_CODEC_1.8V_AP";
558				regulator-min-microvolt = <1800000>;
559				regulator-max-microvolt = <1800000>;
560			};
561
562			ldo19_reg: LDO19 {
563				regulator-name = "VDDA_1.8V_COMP";
564				regulator-min-microvolt = <1800000>;
565				regulator-max-microvolt = <1800000>;
566				regulator-always-on;
567			};
568
569			ldo20_reg: LDO20 {
570				regulator-name = "VCC_2.8V_AP";
571				regulator-min-microvolt = <2800000>;
572				regulator-max-microvolt = <2800000>;
573				regulator-always-on;
574			};
575
576			ldo21_reg: LDO21 {
577				regulator-name = "VT_CAM_1.8V";
578				regulator-min-microvolt = <1800000>;
579				regulator-max-microvolt = <1800000>;
580			};
581
582			ldo22_reg: LDO22 {
583				regulator-name = "CAM_IO_1.8V_AP";
584				regulator-min-microvolt = <1800000>;
585				regulator-max-microvolt = <1800000>;
586			};
587
588			ldo23_reg: LDO23 {
589				regulator-name = "CAM_SEN_CORE_1.05V_AP";
590				regulator-min-microvolt = <1050000>;
591				regulator-max-microvolt = <1050000>;
592			};
593
594			ldo24_reg: LDO24 {
595				regulator-name = "VT_CAM_1.2V";
596				regulator-min-microvolt = <1200000>;
597				regulator-max-microvolt = <1200000>;
598			};
599
600			ldo25_reg: LDO25 {
601				regulator-name = "UNUSED_LDO25";
602				regulator-min-microvolt = <2800000>;
603				regulator-max-microvolt = <2800000>;
604			};
605
606			ldo26_reg: LDO26 {
607				regulator-name = "CAM_AF_2.8V_AP";
608				regulator-min-microvolt = <2800000>;
609				regulator-max-microvolt = <2800000>;
610			};
611
612			ldo27_reg: LDO27 {
613				regulator-name = "VCC_3.0V_LCD_AP";
614				regulator-min-microvolt = <3000000>;
615				regulator-max-microvolt = <3000000>;
616			};
617
618			ldo28_reg: LDO28 {
619				regulator-name = "VCC_1.8V_LCD_AP";
620				regulator-min-microvolt = <1800000>;
621				regulator-max-microvolt = <1800000>;
622			};
623
624			ldo29_reg: LDO29 {
625				regulator-name = "VT_CAM_2.8V";
626				regulator-min-microvolt = <3000000>;
627				regulator-max-microvolt = <3000000>;
628			};
629
630			ldo30_reg: LDO30 {
631				regulator-name = "TSP_AVDD_3.3V_AP";
632				regulator-min-microvolt = <3300000>;
633				regulator-max-microvolt = <3300000>;
634			};
635
636			ldo31_reg: LDO31 {
637				/*
638				 * LDO31 differs from target to target,
639				 * its definition is in the .dts
640				 */
641			};
642
643			ldo32_reg: LDO32 {
644				regulator-name = "VTOUCH_1.8V_AP";
645				regulator-min-microvolt = <1800000>;
646				regulator-max-microvolt = <1800000>;
647			};
648
649			ldo33_reg: LDO33 {
650				regulator-name = "VTOUCH_LED_3.3V";
651				regulator-min-microvolt = <2500000>;
652				regulator-max-microvolt = <3300000>;
653				regulator-ramp-delay = <12500>;
654			};
655
656			ldo34_reg: LDO34 {
657				regulator-name = "VCC_1.8V_MHL_AP";
658				regulator-min-microvolt = <1000000>;
659				regulator-max-microvolt = <2100000>;
660			};
661
662			ldo35_reg: LDO35 {
663				regulator-name = "OIS_VM_2.8V";
664				regulator-min-microvolt = <1800000>;
665				regulator-max-microvolt = <2800000>;
666			};
667
668			ldo36_reg: LDO36 {
669				regulator-name = "VSIL_1.0V";
670				regulator-min-microvolt = <1000000>;
671				regulator-max-microvolt = <1000000>;
672			};
673
674			ldo37_reg: LDO37 {
675				regulator-name = "VF_1.8V";
676				regulator-min-microvolt = <1800000>;
677				regulator-max-microvolt = <1800000>;
678			};
679
680			ldo38_reg: LDO38 {
681				/*
682				 * LDO38 differs from target to target,
683				 * its definition is in the .dts
684				 */
685			};
686
687			ldo39_reg: LDO39 {
688				regulator-name = "V_HRM_1.8V";
689				regulator-min-microvolt = <1800000>;
690				regulator-max-microvolt = <1800000>;
691			};
692
693			ldo40_reg: LDO40 {
694				regulator-name = "V_HRM_3.3V";
695				regulator-min-microvolt = <3300000>;
696				regulator-max-microvolt = <3300000>;
697			};
698
699			buck1_reg: BUCK1 {
700				regulator-name = "VDD_MIF_0.9V_AP";
701				regulator-min-microvolt = <600000>;
702				regulator-max-microvolt = <1500000>;
703				regulator-always-on;
704				regulator-state-mem {
705					regulator-off-in-suspend;
706				};
707			};
708
709			buck2_reg: BUCK2 {
710				regulator-name = "VDD_EGL_1.0V_AP";
711				regulator-min-microvolt = <900000>;
712				regulator-max-microvolt = <1300000>;
713				regulator-always-on;
714				regulator-state-mem {
715					regulator-off-in-suspend;
716				};
717			};
718
719			buck3_reg: BUCK3 {
720				regulator-name = "VDD_KFC_1.0V_AP";
721				regulator-min-microvolt = <800000>;
722				regulator-max-microvolt = <1200000>;
723				regulator-always-on;
724				regulator-state-mem {
725					regulator-off-in-suspend;
726				};
727			};
728
729			buck4_reg: BUCK4 {
730				regulator-name = "VDD_INT_0.95V_AP";
731				regulator-min-microvolt = <600000>;
732				regulator-max-microvolt = <1500000>;
733				regulator-always-on;
734				regulator-state-mem {
735					regulator-off-in-suspend;
736				};
737			};
738
739			buck5_reg: BUCK5 {
740				regulator-name = "VDD_DISP_CAM0_0.9V_AP";
741				regulator-min-microvolt = <600000>;
742				regulator-max-microvolt = <1500000>;
743				regulator-always-on;
744				regulator-state-mem {
745					regulator-off-in-suspend;
746				};
747			};
748
749			buck6_reg: BUCK6 {
750				regulator-name = "VDD_G3D_0.9V_AP";
751				regulator-min-microvolt = <600000>;
752				regulator-max-microvolt = <1500000>;
753				regulator-always-on;
754				regulator-state-mem {
755					regulator-off-in-suspend;
756				};
757			};
758
759			buck7_reg: BUCK7 {
760				regulator-name = "VDD_MEM1_1.2V_AP";
761				regulator-min-microvolt = <1200000>;
762				regulator-max-microvolt = <1200000>;
763				regulator-always-on;
764			};
765
766			buck8_reg: BUCK8 {
767				regulator-name = "VDD_LLDO_1.35V_AP";
768				regulator-min-microvolt = <1350000>;
769				regulator-max-microvolt = <3300000>;
770				regulator-always-on;
771			};
772
773			buck9_reg: BUCK9 {
774				regulator-name = "VDD_MLDO_2.0V_AP";
775				regulator-min-microvolt = <1350000>;
776				regulator-max-microvolt = <3300000>;
777				regulator-always-on;
778			};
779
780			buck10_reg: BUCK10 {
781				regulator-name = "vdd_mem2";
782				regulator-min-microvolt = <550000>;
783				regulator-max-microvolt = <1500000>;
784				regulator-always-on;
785			};
786		};
787	};
788};
789
790&hsi2c_4 {
791	status = "okay";
792
793	s3fwrn5: nfc@27 {
794		compatible = "samsung,s3fwrn5-i2c";
795		reg = <0x27>;
796		interrupt-parent = <&gpa1>;
797		interrupts = <3 IRQ_TYPE_EDGE_RISING>;
798		en-gpios = <&gpf1 4 GPIO_ACTIVE_LOW>;
799		wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
800	};
801};
802
803&hsi2c_5 {
804	status = "okay";
805
806	stmfts: touchscreen@49 {
807		compatible = "st,stmfts";
808		reg = <0x49>;
809		interrupt-parent = <&gpa1>;
810		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
811		avdd-supply = <&ldo30_reg>;
812		vdd-supply = <&ldo31_reg>;
813	};
814};
815
816&hsi2c_7 {
817	status = "okay";
818	clock-frequency = <1000000>;
819
820	bridge@39 {
821		reg = <0x39>;
822		compatible = "sil,sii8620";
823		cvcc10-supply = <&ldo36_reg>;
824		iovcc18-supply = <&ldo34_reg>;
825		interrupt-parent = <&gpf0>;
826		interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
827		reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
828		clocks = <&pmu_system_controller 0>;
829		clock-names = "xtal";
830
831		ports {
832			#address-cells = <1>;
833			#size-cells = <0>;
834
835			port@0 {
836				reg = <0>;
837				mhl_to_hdmi: endpoint {
838					remote-endpoint = <&hdmi_to_mhl>;
839				};
840			};
841
842			port@1 {
843				reg = <1>;
844				mhl_to_musb_con: endpoint {
845					remote-endpoint = <&musb_con_to_mhl>;
846				};
847			};
848		};
849	};
850};
851
852&hsi2c_8 {
853	status = "okay";
854
855	pmic@66 {
856		compatible = "maxim,max77843";
857		interrupt-parent = <&gpa1>;
858		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
859		reg = <0x66>;
860
861		muic: extcon {
862			compatible = "maxim,max77843-muic";
863
864			musb_con: connector {
865				compatible = "samsung,usb-connector-11pin",
866					     "usb-b-connector";
867				label = "micro-USB";
868				type = "micro";
869
870				ports {
871					#address-cells = <1>;
872					#size-cells = <0>;
873
874					port@0 {
875						/*
876						 * TODO: The DTS this is based on does not have
877						 * port@0 which is a required property. The ports
878						 * look incomplete and need fixing.
879						 * Add a disabled port just to satisfy dtschema.
880						 */
881						reg = <0>;
882						status = "disabled";
883					};
884
885					port@3 {
886						reg = <3>;
887						musb_con_to_mhl: endpoint {
888							remote-endpoint = <&mhl_to_musb_con>;
889						};
890					};
891				};
892			};
893
894			ports {
895				port {
896					muic_to_usb: endpoint {
897						remote-endpoint = <&usb_to_muic>;
898					};
899				};
900			};
901		};
902
903		regulators {
904			compatible = "maxim,max77843-regulator";
905			safeout1_reg: SAFEOUT1 {
906				regulator-name = "SAFEOUT1";
907				regulator-min-microvolt = <3300000>;
908				regulator-max-microvolt = <4950000>;
909			};
910
911			safeout2_reg: SAFEOUT2 {
912				regulator-name = "SAFEOUT2";
913				regulator-min-microvolt = <3300000>;
914				regulator-max-microvolt = <4950000>;
915			};
916
917			charger_reg: CHARGER {
918				regulator-name = "CHARGER";
919				regulator-min-microamp = <100000>;
920				regulator-max-microamp = <3150000>;
921			};
922		};
923
924		haptic: motor-driver {
925			compatible = "maxim,max77843-haptic";
926			haptic-supply = <&ldo38_reg>;
927			pwms = <&pwm 0 33670 0>;
928			pwm-names = "haptic";
929		};
930	};
931};
932
933&hsi2c_11 {
934	status = "okay";
935};
936
937&i2s0 {
938	status = "okay";
939};
940
941&i2s1 {
942	assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
943	assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
944	status = "okay";
945};
946
947&mshc_0 {
948	status = "okay";
949	mmc-hs200-1_8v;
950	mmc-hs400-1_8v;
951	cap-mmc-highspeed;
952	non-removable;
953	card-detect-delay = <200>;
954	samsung,dw-mshc-ciu-div = <3>;
955	samsung,dw-mshc-sdr-timing = <0 4>;
956	samsung,dw-mshc-ddr-timing = <0 2>;
957	samsung,dw-mshc-hs400-timing = <0 3>;
958	samsung,read-strobe-delay = <90>;
959	fifo-depth = <0x80>;
960	pinctrl-names = "default";
961	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
962			&sd0_bus8 &sd0_rdqs>;
963	bus-width = <8>;
964	assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
965	assigned-clock-rates = <800000000>;
966};
967
968&mshc_2 {
969	status = "okay";
970	cap-sd-highspeed;
971	disable-wp;
972	cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
973	card-detect-delay = <200>;
974	samsung,dw-mshc-ciu-div = <3>;
975	samsung,dw-mshc-sdr-timing = <0 4>;
976	samsung,dw-mshc-ddr-timing = <0 2>;
977	fifo-depth = <0x80>;
978	pinctrl-names = "default";
979	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
980	bus-width = <4>;
981};
982
983&pcie {
984	status = "okay";
985	pinctrl-names = "default";
986	pinctrl-0 = <&pcie_bus &pcie_wlanen>;
987	vdd10-supply = <&ldo6_reg>;
988	vdd18-supply = <&ldo7_reg>;
989	assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
990			  <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
991	assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
992				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
993	assigned-clock-rates = <0>, <100000000>;
994	interrupt-map-mask = <0 0 0 0>;
995	interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
996};
997
998&pcie_phy {
999	status = "okay";
1000};
1001
1002&ppmu_d0_general {
1003	status = "okay";
1004	events {
1005		ppmu_event0_d0_general: ppmu-event0-d0-general {
1006			event-name = "ppmu-event0-d0-general";
1007		};
1008	};
1009};
1010
1011&ppmu_d1_general {
1012	status = "okay";
1013	events {
1014		ppmu_event0_d1_general: ppmu-event0-d1-general {
1015		       event-name = "ppmu-event0-d1-general";
1016	       };
1017	};
1018};
1019
1020&pinctrl_alive {
1021	pinctrl-names = "default";
1022	pinctrl-0 = <&initial_alive>;
1023
1024	initial_alive: initial-state {
1025		PIN_IN(gpa0-0, DOWN, FAST_SR1);
1026		PIN_IN(gpa0-1, NONE, FAST_SR1);
1027		PIN_IN(gpa0-2, DOWN, FAST_SR1);
1028		PIN_IN(gpa0-3, NONE, FAST_SR1);
1029		PIN_IN(gpa0-4, NONE, FAST_SR1);
1030		PIN_IN(gpa0-5, DOWN, FAST_SR1);
1031		PIN_IN(gpa0-6, NONE, FAST_SR1);
1032		PIN_IN(gpa0-7, NONE, FAST_SR1);
1033
1034		PIN_IN(gpa1-0, UP, FAST_SR1);
1035		PIN_IN(gpa1-1, UP, FAST_SR1);
1036		PIN_IN(gpa1-2, NONE, FAST_SR1);
1037		PIN_IN(gpa1-3, DOWN, FAST_SR1);
1038		PIN_IN(gpa1-4, DOWN, FAST_SR1);
1039		PIN_IN(gpa1-5, NONE, FAST_SR1);
1040		PIN_IN(gpa1-6, NONE, FAST_SR1);
1041		PIN_IN(gpa1-7, NONE, FAST_SR1);
1042
1043		PIN_IN(gpa2-0, NONE, FAST_SR1);
1044		PIN_IN(gpa2-1, NONE, FAST_SR1);
1045		PIN_IN(gpa2-2, NONE, FAST_SR1);
1046		PIN_IN(gpa2-3, DOWN, FAST_SR1);
1047		PIN_IN(gpa2-4, NONE, FAST_SR1);
1048		PIN_IN(gpa2-5, DOWN, FAST_SR1);
1049		PIN_IN(gpa2-6, DOWN, FAST_SR1);
1050		PIN_IN(gpa2-7, NONE, FAST_SR1);
1051
1052		PIN_IN(gpa3-0, DOWN, FAST_SR1);
1053		PIN_IN(gpa3-1, DOWN, FAST_SR1);
1054		PIN_IN(gpa3-2, NONE, FAST_SR1);
1055		PIN_IN(gpa3-3, DOWN, FAST_SR1);
1056		PIN_IN(gpa3-4, NONE, FAST_SR1);
1057		PIN_IN(gpa3-5, DOWN, FAST_SR1);
1058		PIN_IN(gpa3-6, DOWN, FAST_SR1);
1059		PIN_IN(gpa3-7, DOWN, FAST_SR1);
1060
1061		PIN_IN(gpf1-0, NONE, FAST_SR1);
1062		PIN_IN(gpf1-1, NONE, FAST_SR1);
1063		PIN_IN(gpf1-2, DOWN, FAST_SR1);
1064		PIN_IN(gpf1-4, UP, FAST_SR1);
1065		PIN_OT(gpf1-5, NONE, FAST_SR1);
1066		PIN_IN(gpf1-6, DOWN, FAST_SR1);
1067		PIN_IN(gpf1-7, DOWN, FAST_SR1);
1068
1069		PIN_IN(gpf2-0, DOWN, FAST_SR1);
1070		PIN_IN(gpf2-1, DOWN, FAST_SR1);
1071		PIN_IN(gpf2-2, DOWN, FAST_SR1);
1072		PIN_IN(gpf2-3, DOWN, FAST_SR1);
1073
1074		PIN_IN(gpf3-0, DOWN, FAST_SR1);
1075		PIN_IN(gpf3-1, DOWN, FAST_SR1);
1076		PIN_IN(gpf3-2, NONE, FAST_SR1);
1077		PIN_IN(gpf3-3, DOWN, FAST_SR1);
1078
1079		PIN_IN(gpf4-0, DOWN, FAST_SR1);
1080		PIN_IN(gpf4-1, DOWN, FAST_SR1);
1081		PIN_IN(gpf4-2, DOWN, FAST_SR1);
1082		PIN_IN(gpf4-3, DOWN, FAST_SR1);
1083		PIN_IN(gpf4-4, DOWN, FAST_SR1);
1084		PIN_IN(gpf4-5, DOWN, FAST_SR1);
1085		PIN_IN(gpf4-6, DOWN, FAST_SR1);
1086		PIN_IN(gpf4-7, DOWN, FAST_SR1);
1087
1088		PIN_IN(gpf5-0, DOWN, FAST_SR1);
1089		PIN_IN(gpf5-1, DOWN, FAST_SR1);
1090		PIN_IN(gpf5-2, DOWN, FAST_SR1);
1091		PIN_IN(gpf5-3, DOWN, FAST_SR1);
1092		PIN_OT(gpf5-4, NONE, FAST_SR1);
1093		PIN_IN(gpf5-5, DOWN, FAST_SR1);
1094		PIN_IN(gpf5-6, DOWN, FAST_SR1);
1095		PIN_IN(gpf5-7, DOWN, FAST_SR1);
1096	};
1097
1098	te_irq: te-irq-pins {
1099		samsung,pins = "gpf1-3";
1100		samsung,pin-function = <0xf>;
1101	};
1102};
1103
1104&pinctrl_cpif {
1105	pinctrl-names = "default";
1106	pinctrl-0 = <&initial_cpif>;
1107
1108	initial_cpif: initial-state {
1109		PIN_IN(gpv6-0, DOWN, FAST_SR1);
1110		PIN_IN(gpv6-1, DOWN, FAST_SR1);
1111	};
1112};
1113
1114&pinctrl_ese {
1115	pinctrl-names = "default";
1116	pinctrl-0 = <&initial_ese>;
1117
1118	pcie_wlanen: pcie-wlanen-pins {
1119		samsung,pins = "gpj2-0";
1120		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
1121		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
1122		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
1123	};
1124
1125	initial_ese: initial-state {
1126		PIN_IN(gpj2-1, DOWN, FAST_SR1);
1127		PIN_IN(gpj2-2, DOWN, FAST_SR1);
1128	};
1129};
1130
1131&pinctrl_fsys {
1132	pinctrl-names = "default";
1133	pinctrl-0 = <&initial_fsys>;
1134
1135	initial_fsys: initial-state {
1136		PIN_IN(gpr3-0, NONE, FAST_SR1);
1137		PIN_IN(gpr3-1, DOWN, FAST_SR1);
1138		PIN_IN(gpr3-2, DOWN, FAST_SR1);
1139		PIN_IN(gpr3-3, DOWN, FAST_SR1);
1140		PIN_IN(gpr3-7, NONE, FAST_SR1);
1141	};
1142};
1143
1144&pinctrl_imem {
1145	pinctrl-names = "default";
1146	pinctrl-0 = <&initial_imem>;
1147
1148	initial_imem: initial-state {
1149		PIN_IN(gpf0-0, UP, FAST_SR1);
1150		PIN_IN(gpf0-1, UP, FAST_SR1);
1151		PIN_IN(gpf0-2, DOWN, FAST_SR1);
1152		PIN_IN(gpf0-3, UP, FAST_SR1);
1153		PIN_IN(gpf0-4, DOWN, FAST_SR1);
1154		PIN_IN(gpf0-5, NONE, FAST_SR1);
1155		PIN_IN(gpf0-6, DOWN, FAST_SR1);
1156		PIN_IN(gpf0-7, UP, FAST_SR1);
1157	};
1158};
1159
1160&pinctrl_nfc {
1161	pinctrl-names = "default";
1162	pinctrl-0 = <&initial_nfc>;
1163
1164	initial_nfc: initial-state {
1165		PIN_IN(gpj0-2, DOWN, FAST_SR1);
1166	};
1167};
1168
1169&pinctrl_peric {
1170	pinctrl-names = "default";
1171	pinctrl-0 = <&initial_peric>;
1172
1173	initial_peric: initial-state {
1174		PIN_IN(gpv7-0, DOWN, FAST_SR1);
1175		PIN_IN(gpv7-1, DOWN, FAST_SR1);
1176		PIN_IN(gpv7-2, NONE, FAST_SR1);
1177		PIN_IN(gpv7-3, DOWN, FAST_SR1);
1178		PIN_IN(gpv7-4, DOWN, FAST_SR1);
1179		PIN_IN(gpv7-5, DOWN, FAST_SR1);
1180
1181		PIN_IN(gpb0-4, DOWN, FAST_SR1);
1182
1183		PIN_IN(gpc0-2, DOWN, FAST_SR1);
1184		PIN_IN(gpc0-5, DOWN, FAST_SR1);
1185		PIN_IN(gpc0-7, DOWN, FAST_SR1);
1186
1187		PIN_IN(gpc1-1, DOWN, FAST_SR1);
1188
1189		PIN_IN(gpc3-4, NONE, FAST_SR1);
1190		PIN_IN(gpc3-5, NONE, FAST_SR1);
1191		PIN_IN(gpc3-6, NONE, FAST_SR1);
1192		PIN_IN(gpc3-7, NONE, FAST_SR1);
1193
1194		PIN_OT(gpg0-0, NONE, FAST_SR1);
1195		PIN_F2(gpg0-1, DOWN, FAST_SR1);
1196
1197		PIN_IN(gpd2-5, DOWN, FAST_SR1);
1198
1199		PIN_IN(gpd4-0, NONE, FAST_SR1);
1200		PIN_IN(gpd4-1, DOWN, FAST_SR1);
1201		PIN_IN(gpd4-2, DOWN, FAST_SR1);
1202		PIN_IN(gpd4-3, DOWN, FAST_SR1);
1203		PIN_IN(gpd4-4, DOWN, FAST_SR1);
1204
1205		PIN_IN(gpd6-3, DOWN, FAST_SR1);
1206
1207		PIN_IN(gpd8-1, UP, FAST_SR1);
1208
1209		PIN_IN(gpg1-0, DOWN, FAST_SR1);
1210		PIN_IN(gpg1-1, DOWN, FAST_SR1);
1211		PIN_IN(gpg1-2, DOWN, FAST_SR1);
1212		PIN_IN(gpg1-3, DOWN, FAST_SR1);
1213		PIN_IN(gpg1-4, DOWN, FAST_SR1);
1214
1215		PIN_IN(gpg2-0, DOWN, FAST_SR1);
1216		PIN_IN(gpg2-1, DOWN, FAST_SR1);
1217
1218		PIN_IN(gpg3-0, DOWN, FAST_SR1);
1219		PIN_IN(gpg3-1, DOWN, FAST_SR1);
1220		PIN_IN(gpg3-5, DOWN, FAST_SR1);
1221	};
1222};
1223
1224&pinctrl_touch {
1225	pinctrl-names = "default";
1226	pinctrl-0 = <&initial_touch>;
1227
1228	initial_touch: initial-state {
1229		PIN_IN(gpj1-2, DOWN, FAST_SR1);
1230	};
1231};
1232
1233&pwm {
1234	pinctrl-0 = <&pwm0_out>;
1235	pinctrl-names = "default";
1236	status = "okay";
1237};
1238
1239&mic {
1240	status = "okay";
1241};
1242
1243&pmu_system_controller {
1244	assigned-clocks = <&pmu_system_controller 0>;
1245	assigned-clock-parents = <&xxti>;
1246};
1247
1248&serial_1 {
1249	status = "okay";
1250};
1251
1252&serial_3 {
1253	status = "okay";
1254
1255	bluetooth {
1256		compatible = "brcm,bcm43438-bt";
1257		max-speed = <3000000>;
1258		shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
1259		device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
1260		host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
1261		clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
1262		clock-names = "extclk";
1263	};
1264};
1265
1266&spi_1 {
1267	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1268	status = "okay";
1269
1270	wm5110: audio-codec@0 {
1271		compatible = "wlf,wm5110";
1272		reg = <0x0>;
1273		spi-max-frequency = <20000000>;
1274		interrupt-parent = <&gpa0>;
1275		interrupts = <4 IRQ_TYPE_NONE>;
1276		clocks = <&pmu_system_controller 0>,
1277			<&s2mps13_osc S2MPS11_CLK_BT>;
1278		clock-names = "mclk1", "mclk2";
1279
1280		gpio-controller;
1281		#gpio-cells = <2>;
1282
1283		wlf,micd-detect-debounce = <300>;
1284		wlf,micd-bias-start-time = <0x1>;
1285		wlf,micd-rate = <0x7>;
1286		wlf,micd-dbtime = <0x1>;
1287		wlf,micd-force-micbias;
1288		wlf,micd-configs = <0x0 1 0>;
1289		wlf,hpdet-channel = <1>;
1290		wlf,gpsw = <0x1>;
1291		wlf,inmode = <2 0 2 0>;
1292
1293		wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1294		wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1295
1296		/* core supplies */
1297		AVDD-supply = <&ldo18_reg>;
1298		DBVDD1-supply = <&ldo18_reg>;
1299		CPVDD-supply = <&ldo18_reg>;
1300		DBVDD2-supply = <&ldo18_reg>;
1301		DBVDD3-supply = <&ldo18_reg>;
1302
1303		controller-data {
1304			samsung,spi-feedback-delay = <0>;
1305		};
1306	};
1307};
1308
1309&spi_3 {
1310	status = "okay";
1311	no-cs-readback;
1312
1313	irled@0 {
1314		compatible = "ir-spi-led";
1315		reg = <0x0>;
1316		spi-max-frequency = <5000000>;
1317		power-supply = <&irda_regulator>;
1318		duty-cycle = <60>;
1319		led-active-low;
1320
1321		controller-data {
1322			samsung,spi-feedback-delay = <0>;
1323		};
1324	};
1325};
1326
1327&timer {
1328	clock-frequency = <24000000>;
1329};
1330
1331&tmu_atlas0 {
1332	vtmu-supply = <&ldo3_reg>;
1333	status = "okay";
1334};
1335
1336&tmu_apollo {
1337	vtmu-supply = <&ldo3_reg>;
1338	status = "okay";
1339};
1340
1341&tmu_g3d {
1342	vtmu-supply = <&ldo3_reg>;
1343	status = "okay";
1344};
1345
1346&usbdrd30 {
1347	vdd33-supply = <&ldo10_reg>;
1348	vdd10-supply = <&ldo6_reg>;
1349	status = "okay";
1350};
1351
1352&usbdrd_dwc3 {
1353	dr_mode = "otg";
1354};
1355
1356&usbdrd30_phy {
1357	vbus-supply = <&safeout1_reg>;
1358	status = "okay";
1359
1360	port {
1361		usb_to_muic: endpoint {
1362			remote-endpoint = <&muic_to_usb>;
1363		};
1364	};
1365};
1366
1367&xxti {
1368	clock-frequency = <24000000>;
1369};
1370