1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung Exynos5433 TM2 board device tree source
4 *
5 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
6 *
7 * Common device tree source file for Samsung's TM2 and TM2E boards
8 * which are based on Samsung Exynos5433 SoC.
9 */
10
11/dts-v1/;
12#include "exynos5433.dtsi"
13#include <dt-bindings/clock/samsung,s2mps11.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/sound/samsung-i2s.h>
18
19/ {
20	aliases {
21		gsc0 = &gsc_0;
22		gsc1 = &gsc_1;
23		gsc2 = &gsc_2;
24		pinctrl0 = &pinctrl_alive;
25		pinctrl1 = &pinctrl_aud;
26		pinctrl2 = &pinctrl_cpif;
27		pinctrl3 = &pinctrl_ese;
28		pinctrl4 = &pinctrl_finger;
29		pinctrl5 = &pinctrl_fsys;
30		pinctrl6 = &pinctrl_imem;
31		pinctrl7 = &pinctrl_nfc;
32		pinctrl8 = &pinctrl_peric;
33		pinctrl9 = &pinctrl_touch;
34		serial0 = &serial_0;
35		serial1 = &serial_1;
36		serial2 = &serial_2;
37		serial3 = &serial_3;
38		spi0 = &spi_0;
39		spi1 = &spi_1;
40		spi2 = &spi_2;
41		spi3 = &spi_3;
42		spi4 = &spi_4;
43		mshc0 = &mshc_0;
44		mshc2 = &mshc_2;
45	};
46
47	chosen {
48		stdout-path = &serial_1;
49	};
50
51	memory@20000000 {
52		device_type = "memory";
53		reg = <0x0 0x20000000 0x0 0xc0000000>;
54	};
55
56	gpio-keys {
57		compatible = "gpio-keys";
58
59		power-key {
60			gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
61			linux,code = <KEY_POWER>;
62			label = "power key";
63			debounce-interval = <10>;
64		};
65
66		volume-up-key {
67			gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
68			linux,code = <KEY_VOLUMEUP>;
69			label = "volume-up key";
70			debounce-interval = <10>;
71		};
72
73		volume-down-key {
74			gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
75			linux,code = <KEY_VOLUMEDOWN>;
76			label = "volume-down key";
77			debounce-interval = <10>;
78		};
79
80		homepage-key {
81			gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
82			linux,code = <KEY_MENU>;
83			label = "homepage key";
84			debounce-interval = <10>;
85		};
86	};
87
88	i2c_max98504: i2c-gpio-0 {
89		compatible = "i2c-gpio";
90		gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
91			 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
92		i2c-gpio,delay-us = <2>;
93		#address-cells = <1>;
94		#size-cells = <0>;
95		status = "okay";
96
97		max98504: max98504@31 {
98			compatible = "maxim,max98504";
99			reg = <0x31>;
100			maxim,rx-path = <1>;
101			maxim,tx-path = <1>;
102			maxim,tx-channel-mask = <3>;
103			maxim,tx-channel-source = <2>;
104		};
105	};
106
107	irda_regulator: irda-regulator {
108		compatible = "regulator-fixed";
109		enable-active-high;
110		gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
111		regulator-name = "irda_regulator";
112	};
113
114	sound {
115		compatible = "samsung,tm2-audio";
116		audio-codec = <&wm5110>, <&hdmi>;
117		i2s-controller = <&i2s0 0>, <&i2s1 0>;
118		audio-amplifier = <&max98504>;
119		mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
120		model = "wm5110";
121		samsung,audio-routing =
122			/* Headphone */
123			"HP", "HPOUT1L",
124			"HP", "HPOUT1R",
125
126			/* Speaker */
127			"SPK", "SPKOUT",
128			"SPKOUT", "HPOUT2L",
129			"SPKOUT", "HPOUT2R",
130
131			/* Receiver */
132			"RCV", "HPOUT3L",
133			"RCV", "HPOUT3R";
134		status = "okay";
135	};
136};
137
138&adc {
139	vdd-supply = <&ldo3_reg>;
140	status = "okay";
141
142	thermistor-ap {
143		compatible = "murata,ncp03wf104";
144		pullup-uv = <1800000>;
145		pullup-ohm = <100000>;
146		pulldown-ohm = <0>;
147		io-channels = <&adc 0>;
148	};
149
150	thermistor-battery {
151		compatible = "murata,ncp03wf104";
152		pullup-uv = <1800000>;
153		pullup-ohm = <100000>;
154		pulldown-ohm = <0>;
155		io-channels = <&adc 1>;
156		#thermal-sensor-cells = <0>;
157	};
158
159	thermistor-charger {
160		compatible = "murata,ncp03wf104";
161		pullup-uv = <1800000>;
162		pullup-ohm = <100000>;
163		pulldown-ohm = <0>;
164		io-channels = <&adc 2>;
165	};
166};
167
168&bus_g2d_400 {
169	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
170	vdd-supply = <&buck4_reg>;
171	exynos,saturation-ratio = <10>;
172	status = "okay";
173};
174
175&bus_g2d_266 {
176	devfreq = <&bus_g2d_400>;
177	status = "okay";
178};
179
180&bus_gscl {
181	devfreq = <&bus_g2d_400>;
182	status = "okay";
183};
184
185&bus_hevc {
186	devfreq = <&bus_g2d_400>;
187	status = "okay";
188};
189
190&bus_jpeg {
191	devfreq = <&bus_g2d_400>;
192	status = "okay";
193};
194
195&bus_mfc {
196	devfreq = <&bus_g2d_400>;
197	status = "okay";
198};
199
200&bus_mscl {
201	devfreq = <&bus_g2d_400>;
202	status = "okay";
203};
204
205&bus_noc0 {
206	devfreq = <&bus_g2d_400>;
207	status = "okay";
208};
209
210&bus_noc1 {
211	devfreq = <&bus_g2d_400>;
212	status = "okay";
213};
214
215&bus_noc2 {
216	devfreq = <&bus_g2d_400>;
217	status = "okay";
218};
219
220&cmu_aud {
221	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
222		<&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
223		<&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
224		<&cmu_top CLK_MOUT_AUD_PLL>,
225		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
226		<&cmu_top CLK_MOUT_SCLK_AUDIO0>,
227		<&cmu_top CLK_MOUT_SCLK_AUDIO1>,
228		<&cmu_top CLK_MOUT_SCLK_SPDIF>,
229
230		<&cmu_aud CLK_DIV_AUD_CA5>,
231		<&cmu_aud CLK_DIV_ACLK_AUD>,
232		<&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
233		<&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
234		<&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
235		<&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
236		<&cmu_aud CLK_DIV_SCLK_AUD_UART>,
237		<&cmu_top CLK_DIV_SCLK_AUDIO0>,
238		<&cmu_top CLK_DIV_SCLK_AUDIO1>,
239		<&cmu_top CLK_DIV_SCLK_PCM1>,
240		<&cmu_top CLK_DIV_SCLK_I2S1>;
241
242	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
243		<&cmu_aud CLK_MOUT_AUD_PLL_USER>,
244		<&cmu_aud CLK_MOUT_AUD_PLL_USER>,
245		<&cmu_top CLK_FOUT_AUD_PLL>,
246		<&cmu_top CLK_MOUT_AUD_PLL>,
247		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
248		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
249		<&cmu_top CLK_SCLK_AUDIO0>;
250
251	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
252		<196608001>, <65536001>, <32768001>, <49152001>,
253		<2048001>, <24576001>, <196608001>,
254		<24576001>, <98304001>, <2048001>, <49152001>;
255};
256
257&cmu_fsys {
258	assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
259		<&cmu_top CLK_MOUT_SCLK_USBHOST30>,
260		<&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
261		<&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
262		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
263		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
264		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
265		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
266		<&cmu_top CLK_DIV_SCLK_USBDRD30>,
267		<&cmu_top CLK_DIV_SCLK_USBHOST30>;
268	assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
269		<&cmu_top CLK_MOUT_BUS_PLL_USER>,
270		<&cmu_top CLK_SCLK_USBDRD30_FSYS>,
271		<&cmu_top CLK_SCLK_USBHOST30_FSYS>,
272		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
273		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
274		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
275		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
276	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
277			       <66700000>, <66700000>;
278};
279
280&cmu_gscl {
281	assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
282			  <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
283	assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
284				 <&cmu_top CLK_ACLK_GSCL_333>;
285};
286
287&cmu_mfc {
288	assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
289	assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
290};
291
292&cmu_mif {
293	assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>;
294	assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
295	assigned-clock-rates = <0>, <333000000>;
296};
297
298&cmu_mscl {
299	assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
300			  <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
301			  <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
302			  <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
303	assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
304				 <&cmu_top CLK_SCLK_JPEG_MSCL>,
305				 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
306				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
307};
308
309&cmu_top {
310	assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
311	assigned-clock-rates = <196608001>;
312};
313
314&cpu0 {
315	cpu-supply = <&buck3_reg>;
316};
317
318&cpu4 {
319	cpu-supply = <&buck2_reg>;
320};
321
322&decon {
323	status = "okay";
324};
325
326&decon_tv {
327	status = "okay";
328
329	ports {
330		#address-cells = <1>;
331		#size-cells = <0>;
332
333		port@0 {
334			reg = <0>;
335			tv_to_hdmi: endpoint {
336				remote-endpoint = <&hdmi_to_tv>;
337			};
338		};
339	};
340};
341
342&dsi {
343	status = "okay";
344	vddcore-supply = <&ldo6_reg>;
345	vddio-supply = <&ldo7_reg>;
346	samsung,burst-clock-frequency = <512000000>;
347	samsung,esc-clock-frequency = <16000000>;
348	samsung,pll-clock-frequency = <24000000>;
349	pinctrl-names = "default";
350	pinctrl-0 = <&te_irq>;
351};
352
353&gpu {
354	mali-supply = <&buck6_reg>;
355	status = "okay";
356};
357
358&hdmi {
359	hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
360	status = "okay";
361	vdd-supply = <&ldo6_reg>;
362	vdd_osc-supply = <&ldo7_reg>;
363	vdd_pll-supply = <&ldo6_reg>;
364
365	ports {
366		#address-cells = <1>;
367		#size-cells = <0>;
368
369		port@0 {
370			reg = <0>;
371			hdmi_to_tv: endpoint {
372				remote-endpoint = <&tv_to_hdmi>;
373			};
374		};
375
376		port@1 {
377			reg = <1>;
378			hdmi_to_mhl: endpoint {
379				remote-endpoint = <&mhl_to_hdmi>;
380			};
381		};
382	};
383};
384
385&hsi2c_0 {
386	status = "okay";
387	clock-frequency = <2500000>;
388
389	s2mps13-pmic@66 {
390		compatible = "samsung,s2mps13-pmic";
391		interrupt-parent = <&gpa0>;
392		interrupts = <7 IRQ_TYPE_NONE>;
393		reg = <0x66>;
394		samsung,s2mps11-wrstbi-ground;
395
396		s2mps13_osc: clocks {
397			compatible = "samsung,s2mps13-clk";
398			#clock-cells = <1>;
399			clock-output-names = "s2mps13_ap", "s2mps13_cp",
400				"s2mps13_bt";
401		};
402
403		regulators {
404			ldo1_reg: LDO1 {
405				regulator-name = "VDD_ALIVE_0.9V_AP";
406				regulator-min-microvolt = <900000>;
407				regulator-max-microvolt = <900000>;
408				regulator-always-on;
409			};
410
411			ldo2_reg: LDO2 {
412				regulator-name = "VDDQ_MMC2_2.8V_AP";
413				regulator-min-microvolt = <2800000>;
414				regulator-max-microvolt = <2800000>;
415				regulator-always-on;
416				regulator-state-mem {
417					regulator-off-in-suspend;
418				};
419			};
420
421			ldo3_reg: LDO3 {
422				regulator-name = "VDD1_E_1.8V_AP";
423				regulator-min-microvolt = <1800000>;
424				regulator-max-microvolt = <1800000>;
425				regulator-always-on;
426			};
427
428			ldo4_reg: LDO4 {
429				regulator-name = "VDD10_MIF_PLL_1.0V_AP";
430				regulator-min-microvolt = <1300000>;
431				regulator-max-microvolt = <1300000>;
432				regulator-always-on;
433				regulator-state-mem {
434					regulator-off-in-suspend;
435				};
436			};
437
438			ldo5_reg: LDO5 {
439				regulator-name = "VDD10_DPLL_1.0V_AP";
440				regulator-min-microvolt = <1000000>;
441				regulator-max-microvolt = <1000000>;
442				regulator-always-on;
443				regulator-state-mem {
444					regulator-off-in-suspend;
445				};
446			};
447
448			ldo6_reg: LDO6 {
449				regulator-name = "VDD10_MIPI2L_1.0V_AP";
450				regulator-min-microvolt = <1000000>;
451				regulator-max-microvolt = <1000000>;
452				regulator-state-mem {
453					regulator-off-in-suspend;
454				};
455			};
456
457			ldo7_reg: LDO7 {
458				regulator-name = "VDD18_MIPI2L_1.8V_AP";
459				regulator-min-microvolt = <1800000>;
460				regulator-max-microvolt = <1800000>;
461				regulator-always-on;
462				regulator-state-mem {
463					regulator-off-in-suspend;
464				};
465			};
466
467			ldo8_reg: LDO8 {
468				regulator-name = "VDD18_LLI_1.8V_AP";
469				regulator-min-microvolt = <1800000>;
470				regulator-max-microvolt = <1800000>;
471				regulator-always-on;
472				regulator-state-mem {
473					regulator-off-in-suspend;
474				};
475			};
476
477			ldo9_reg: LDO9 {
478				regulator-name = "VDD18_ABB_ETC_1.8V_AP";
479				regulator-min-microvolt = <1800000>;
480				regulator-max-microvolt = <1800000>;
481				regulator-always-on;
482				regulator-state-mem {
483					regulator-off-in-suspend;
484				};
485			};
486
487			ldo10_reg: LDO10 {
488				regulator-name = "VDD33_USB30_3.0V_AP";
489				regulator-min-microvolt = <3000000>;
490				regulator-max-microvolt = <3000000>;
491				regulator-state-mem {
492					regulator-off-in-suspend;
493				};
494			};
495
496			ldo11_reg: LDO11 {
497				regulator-name = "VDD_INT_M_1.0V_AP";
498				regulator-min-microvolt = <1000000>;
499				regulator-max-microvolt = <1000000>;
500				regulator-always-on;
501				regulator-state-mem {
502					regulator-off-in-suspend;
503				};
504			};
505
506			ldo12_reg: LDO12 {
507				regulator-name = "VDD_KFC_M_1.1V_AP";
508				regulator-min-microvolt = <800000>;
509				regulator-max-microvolt = <1350000>;
510				regulator-always-on;
511			};
512
513			ldo13_reg: LDO13 {
514				regulator-name = "VDD_G3D_M_0.95V_AP";
515				regulator-min-microvolt = <950000>;
516				regulator-max-microvolt = <950000>;
517				regulator-always-on;
518				regulator-state-mem {
519					regulator-off-in-suspend;
520				};
521			};
522
523			ldo14_reg: LDO14 {
524				regulator-name = "VDDQ_M1_LDO_1.2V_AP";
525				regulator-min-microvolt = <1200000>;
526				regulator-max-microvolt = <1200000>;
527				regulator-always-on;
528				regulator-state-mem {
529					regulator-off-in-suspend;
530				};
531			};
532
533			ldo15_reg: LDO15 {
534				regulator-name = "VDDQ_M2_LDO_1.2V_AP";
535				regulator-min-microvolt = <1200000>;
536				regulator-max-microvolt = <1200000>;
537				regulator-always-on;
538				regulator-state-mem {
539					regulator-off-in-suspend;
540				};
541			};
542
543			ldo16_reg: LDO16 {
544				regulator-name = "VDDQ_EFUSE";
545				regulator-min-microvolt = <1400000>;
546				regulator-max-microvolt = <3400000>;
547				regulator-always-on;
548			};
549
550			ldo17_reg: LDO17 {
551				regulator-name = "V_TFLASH_2.8V_AP";
552				regulator-min-microvolt = <2800000>;
553				regulator-max-microvolt = <2800000>;
554			};
555
556			ldo18_reg: LDO18 {
557				regulator-name = "V_CODEC_1.8V_AP";
558				regulator-min-microvolt = <1800000>;
559				regulator-max-microvolt = <1800000>;
560			};
561
562			ldo19_reg: LDO19 {
563				regulator-name = "VDDA_1.8V_COMP";
564				regulator-min-microvolt = <1800000>;
565				regulator-max-microvolt = <1800000>;
566				regulator-always-on;
567			};
568
569			ldo20_reg: LDO20 {
570				regulator-name = "VCC_2.8V_AP";
571				regulator-min-microvolt = <2800000>;
572				regulator-max-microvolt = <2800000>;
573				regulator-always-on;
574			};
575
576			ldo21_reg: LDO21 {
577				regulator-name = "VT_CAM_1.8V";
578				regulator-min-microvolt = <1800000>;
579				regulator-max-microvolt = <1800000>;
580			};
581
582			ldo22_reg: LDO22 {
583				regulator-name = "CAM_IO_1.8V_AP";
584				regulator-min-microvolt = <1800000>;
585				regulator-max-microvolt = <1800000>;
586			};
587
588			ldo23_reg: LDO23 {
589				regulator-name = "CAM_SEN_CORE_1.05V_AP";
590				regulator-min-microvolt = <1050000>;
591				regulator-max-microvolt = <1050000>;
592			};
593
594			ldo24_reg: LDO24 {
595				regulator-name = "VT_CAM_1.2V";
596				regulator-min-microvolt = <1200000>;
597				regulator-max-microvolt = <1200000>;
598			};
599
600			ldo25_reg: LDO25 {
601				regulator-name = "UNUSED_LDO25";
602				regulator-min-microvolt = <2800000>;
603				regulator-max-microvolt = <2800000>;
604			};
605
606			ldo26_reg: LDO26 {
607				regulator-name = "CAM_AF_2.8V_AP";
608				regulator-min-microvolt = <2800000>;
609				regulator-max-microvolt = <2800000>;
610			};
611
612			ldo27_reg: LDO27 {
613				regulator-name = "VCC_3.0V_LCD_AP";
614				regulator-min-microvolt = <3000000>;
615				regulator-max-microvolt = <3000000>;
616			};
617
618			ldo28_reg: LDO28 {
619				regulator-name = "VCC_1.8V_LCD_AP";
620				regulator-min-microvolt = <1800000>;
621				regulator-max-microvolt = <1800000>;
622			};
623
624			ldo29_reg: LDO29 {
625				regulator-name = "VT_CAM_2.8V";
626				regulator-min-microvolt = <3000000>;
627				regulator-max-microvolt = <3000000>;
628			};
629
630			ldo30_reg: LDO30 {
631				regulator-name = "TSP_AVDD_3.3V_AP";
632				regulator-min-microvolt = <3300000>;
633				regulator-max-microvolt = <3300000>;
634			};
635
636			ldo31_reg: LDO31 {
637				/*
638				 * LDO31 differs from target to target,
639				 * its definition is in the .dts
640				 */
641			};
642
643			ldo32_reg: LDO32 {
644				regulator-name = "VTOUCH_1.8V_AP";
645				regulator-min-microvolt = <1800000>;
646				regulator-max-microvolt = <1800000>;
647			};
648
649			ldo33_reg: LDO33 {
650				regulator-name = "VTOUCH_LED_3.3V";
651				regulator-min-microvolt = <2500000>;
652				regulator-max-microvolt = <3300000>;
653				regulator-ramp-delay = <12500>;
654			};
655
656			ldo34_reg: LDO34 {
657				regulator-name = "VCC_1.8V_MHL_AP";
658				regulator-min-microvolt = <1000000>;
659				regulator-max-microvolt = <2100000>;
660			};
661
662			ldo35_reg: LDO35 {
663				regulator-name = "OIS_VM_2.8V";
664				regulator-min-microvolt = <1800000>;
665				regulator-max-microvolt = <2800000>;
666			};
667
668			ldo36_reg: LDO36 {
669				regulator-name = "VSIL_1.0V";
670				regulator-min-microvolt = <1000000>;
671				regulator-max-microvolt = <1000000>;
672			};
673
674			ldo37_reg: LDO37 {
675				regulator-name = "VF_1.8V";
676				regulator-min-microvolt = <1800000>;
677				regulator-max-microvolt = <1800000>;
678			};
679
680			ldo38_reg: LDO38 {
681				/*
682				 * LDO38 differs from target to target,
683				 * its definition is in the .dts
684				 */
685			};
686
687			ldo39_reg: LDO39 {
688				regulator-name = "V_HRM_1.8V";
689				regulator-min-microvolt = <1800000>;
690				regulator-max-microvolt = <1800000>;
691			};
692
693			ldo40_reg: LDO40 {
694				regulator-name = "V_HRM_3.3V";
695				regulator-min-microvolt = <3300000>;
696				regulator-max-microvolt = <3300000>;
697			};
698
699			buck1_reg: BUCK1 {
700				regulator-name = "VDD_MIF_0.9V_AP";
701				regulator-min-microvolt = <600000>;
702				regulator-max-microvolt = <1500000>;
703				regulator-always-on;
704				regulator-state-mem {
705					regulator-off-in-suspend;
706				};
707			};
708
709			buck2_reg: BUCK2 {
710				regulator-name = "VDD_EGL_1.0V_AP";
711				regulator-min-microvolt = <900000>;
712				regulator-max-microvolt = <1300000>;
713				regulator-always-on;
714				regulator-state-mem {
715					regulator-off-in-suspend;
716				};
717			};
718
719			buck3_reg: BUCK3 {
720				regulator-name = "VDD_KFC_1.0V_AP";
721				regulator-min-microvolt = <800000>;
722				regulator-max-microvolt = <1200000>;
723				regulator-always-on;
724				regulator-state-mem {
725					regulator-off-in-suspend;
726				};
727			};
728
729			buck4_reg: BUCK4 {
730				regulator-name = "VDD_INT_0.95V_AP";
731				regulator-min-microvolt = <600000>;
732				regulator-max-microvolt = <1500000>;
733				regulator-always-on;
734				regulator-state-mem {
735					regulator-off-in-suspend;
736				};
737			};
738
739			buck5_reg: BUCK5 {
740				regulator-name = "VDD_DISP_CAM0_0.9V_AP";
741				regulator-min-microvolt = <600000>;
742				regulator-max-microvolt = <1500000>;
743				regulator-always-on;
744				regulator-state-mem {
745					regulator-off-in-suspend;
746				};
747			};
748
749			buck6_reg: BUCK6 {
750				regulator-name = "VDD_G3D_0.9V_AP";
751				regulator-min-microvolt = <600000>;
752				regulator-max-microvolt = <1500000>;
753				regulator-always-on;
754				regulator-state-mem {
755					regulator-off-in-suspend;
756				};
757			};
758
759			buck7_reg: BUCK7 {
760				regulator-name = "VDD_MEM1_1.2V_AP";
761				regulator-min-microvolt = <1200000>;
762				regulator-max-microvolt = <1200000>;
763				regulator-always-on;
764			};
765
766			buck8_reg: BUCK8 {
767				regulator-name = "VDD_LLDO_1.35V_AP";
768				regulator-min-microvolt = <1350000>;
769				regulator-max-microvolt = <3300000>;
770				regulator-always-on;
771			};
772
773			buck9_reg: BUCK9 {
774				regulator-name = "VDD_MLDO_2.0V_AP";
775				regulator-min-microvolt = <1350000>;
776				regulator-max-microvolt = <3300000>;
777				regulator-always-on;
778			};
779
780			buck10_reg: BUCK10 {
781				regulator-name = "vdd_mem2";
782				regulator-min-microvolt = <550000>;
783				regulator-max-microvolt = <1500000>;
784				regulator-always-on;
785			};
786		};
787	};
788};
789
790&hsi2c_4 {
791	status = "okay";
792
793	s3fwrn5: nfc@27 {
794		compatible = "samsung,s3fwrn5-i2c";
795		reg = <0x27>;
796		interrupt-parent = <&gpa1>;
797		interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
798		s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
799		s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
800	};
801};
802
803&hsi2c_5 {
804	status = "okay";
805
806	stmfts: touchscreen@49 {
807		compatible = "st,stmfts";
808		reg = <0x49>;
809		interrupt-parent = <&gpa1>;
810		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
811		avdd-supply = <&ldo30_reg>;
812		vdd-supply = <&ldo31_reg>;
813	};
814};
815
816&hsi2c_7 {
817	status = "okay";
818	clock-frequency = <1000000>;
819
820	sii8620@39 {
821		reg = <0x39>;
822		compatible = "sil,sii8620";
823		cvcc10-supply = <&ldo36_reg>;
824		iovcc18-supply = <&ldo34_reg>;
825		interrupt-parent = <&gpf0>;
826		interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
827		reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
828		clocks = <&pmu_system_controller 0>;
829		clock-names = "xtal";
830
831		ports {
832			#address-cells = <1>;
833			#size-cells = <0>;
834
835			port@0 {
836				reg = <0>;
837				mhl_to_hdmi: endpoint {
838					remote-endpoint = <&hdmi_to_mhl>;
839				};
840			};
841
842			port@1 {
843				reg = <1>;
844				mhl_to_musb_con: endpoint {
845					remote-endpoint = <&musb_con_to_mhl>;
846				};
847			};
848		};
849	};
850};
851
852&hsi2c_8 {
853	status = "okay";
854
855	max77843@66 {
856		compatible = "maxim,max77843";
857		interrupt-parent = <&gpa1>;
858		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
859		reg = <0x66>;
860
861		muic: max77843-muic {
862			compatible = "maxim,max77843-muic";
863
864			musb_con: musb_connector {
865				compatible = "samsung,usb-connector-11pin",
866					     "usb-b-connector";
867				label = "micro-USB";
868				type = "micro";
869
870				ports {
871					#address-cells = <1>;
872					#size-cells = <0>;
873
874					port@3 {
875						reg = <3>;
876						musb_con_to_mhl: endpoint {
877							remote-endpoint = <&mhl_to_musb_con>;
878						};
879					};
880				};
881			};
882
883			ports {
884				port {
885					muic_to_usb: endpoint {
886						remote-endpoint = <&usb_to_muic>;
887					};
888				};
889			};
890		};
891
892		regulators {
893			compatible = "maxim,max77843-regulator";
894			safeout1_reg: SAFEOUT1 {
895				regulator-name = "SAFEOUT1";
896				regulator-min-microvolt = <3300000>;
897				regulator-max-microvolt = <4950000>;
898			};
899
900			safeout2_reg: SAFEOUT2 {
901				regulator-name = "SAFEOUT2";
902				regulator-min-microvolt = <3300000>;
903				regulator-max-microvolt = <4950000>;
904			};
905
906			charger_reg: CHARGER {
907				regulator-name = "CHARGER";
908				regulator-min-microamp = <100000>;
909				regulator-max-microamp = <3150000>;
910			};
911		};
912
913		haptic: max77843-haptic {
914			compatible = "maxim,max77843-haptic";
915			haptic-supply = <&ldo38_reg>;
916			pwms = <&pwm 0 33670 0>;
917			pwm-names = "haptic";
918		};
919	};
920};
921
922&hsi2c_11 {
923	status = "okay";
924};
925
926&i2s0 {
927	status = "okay";
928};
929
930&i2s1 {
931	assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
932	assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
933	status = "okay";
934};
935
936&mshc_0 {
937	status = "okay";
938	mmc-hs200-1_8v;
939	mmc-hs400-1_8v;
940	cap-mmc-highspeed;
941	non-removable;
942	card-detect-delay = <200>;
943	samsung,dw-mshc-ciu-div = <3>;
944	samsung,dw-mshc-sdr-timing = <0 4>;
945	samsung,dw-mshc-ddr-timing = <0 2>;
946	samsung,dw-mshc-hs400-timing = <0 3>;
947	samsung,read-strobe-delay = <90>;
948	fifo-depth = <0x80>;
949	pinctrl-names = "default";
950	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
951			&sd0_bus8 &sd0_rdqs>;
952	bus-width = <8>;
953	assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
954	assigned-clock-rates = <800000000>;
955};
956
957&mshc_2 {
958	status = "okay";
959	cap-sd-highspeed;
960	disable-wp;
961	cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
962	card-detect-delay = <200>;
963	samsung,dw-mshc-ciu-div = <3>;
964	samsung,dw-mshc-sdr-timing = <0 4>;
965	samsung,dw-mshc-ddr-timing = <0 2>;
966	fifo-depth = <0x80>;
967	pinctrl-names = "default";
968	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
969	bus-width = <4>;
970};
971
972&ppmu_d0_general {
973	status = "okay";
974	events {
975		ppmu_event0_d0_general: ppmu-event0-d0-general {
976			event-name = "ppmu-event0-d0-general";
977		};
978	};
979};
980
981&ppmu_d1_general {
982	status = "okay";
983	events {
984		ppmu_event0_d1_general: ppmu-event0-d1-general {
985		       event-name = "ppmu-event0-d1-general";
986	       };
987       };
988};
989
990&pinctrl_alive {
991	pinctrl-names = "default";
992	pinctrl-0 = <&initial_alive>;
993
994	initial_alive: initial-state {
995		PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
996		PIN(INPUT, gpa0-1, NONE, FAST_SR1);
997		PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
998		PIN(INPUT, gpa0-3, NONE, FAST_SR1);
999		PIN(INPUT, gpa0-4, NONE, FAST_SR1);
1000		PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
1001		PIN(INPUT, gpa0-6, NONE, FAST_SR1);
1002		PIN(INPUT, gpa0-7, NONE, FAST_SR1);
1003
1004		PIN(INPUT, gpa1-0, UP, FAST_SR1);
1005		PIN(INPUT, gpa1-1, UP, FAST_SR1);
1006		PIN(INPUT, gpa1-2, NONE, FAST_SR1);
1007		PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
1008		PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
1009		PIN(INPUT, gpa1-5, NONE, FAST_SR1);
1010		PIN(INPUT, gpa1-6, NONE, FAST_SR1);
1011		PIN(INPUT, gpa1-7, NONE, FAST_SR1);
1012
1013		PIN(INPUT, gpa2-0, NONE, FAST_SR1);
1014		PIN(INPUT, gpa2-1, NONE, FAST_SR1);
1015		PIN(INPUT, gpa2-2, NONE, FAST_SR1);
1016		PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
1017		PIN(INPUT, gpa2-4, NONE, FAST_SR1);
1018		PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
1019		PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
1020		PIN(INPUT, gpa2-7, NONE, FAST_SR1);
1021
1022		PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
1023		PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
1024		PIN(INPUT, gpa3-2, NONE, FAST_SR1);
1025		PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
1026		PIN(INPUT, gpa3-4, NONE, FAST_SR1);
1027		PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
1028		PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
1029		PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
1030
1031		PIN(INPUT, gpf1-0, NONE, FAST_SR1);
1032		PIN(INPUT, gpf1-1, NONE, FAST_SR1);
1033		PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
1034		PIN(INPUT, gpf1-4, UP, FAST_SR1);
1035		PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
1036		PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
1037		PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
1038
1039		PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
1040		PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
1041		PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
1042		PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
1043
1044		PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
1045		PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
1046		PIN(INPUT, gpf3-2, NONE, FAST_SR1);
1047		PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
1048
1049		PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
1050		PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
1051		PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
1052		PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
1053		PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
1054		PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
1055		PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
1056		PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
1057
1058		PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
1059		PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
1060		PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
1061		PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
1062		PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
1063		PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
1064		PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
1065		PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
1066	};
1067
1068	te_irq: te_irq {
1069		samsung,pins = "gpf1-3";
1070		samsung,pin-function = <0xf>;
1071	};
1072};
1073
1074&pinctrl_cpif {
1075	pinctrl-names = "default";
1076	pinctrl-0 = <&initial_cpif>;
1077
1078	initial_cpif: initial-state {
1079		PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
1080		PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
1081	};
1082};
1083
1084&pinctrl_ese {
1085	pinctrl-names = "default";
1086	pinctrl-0 = <&initial_ese>;
1087
1088	initial_ese: initial-state {
1089		PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
1090		PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
1091		PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
1092	};
1093};
1094
1095&pinctrl_fsys {
1096	pinctrl-names = "default";
1097	pinctrl-0 = <&initial_fsys>;
1098
1099	initial_fsys: initial-state {
1100		PIN(INPUT, gpr3-0, NONE, FAST_SR1);
1101		PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
1102		PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
1103		PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
1104		PIN(INPUT, gpr3-7, NONE, FAST_SR1);
1105	};
1106};
1107
1108&pinctrl_imem {
1109	pinctrl-names = "default";
1110	pinctrl-0 = <&initial_imem>;
1111
1112	initial_imem: initial-state {
1113		PIN(INPUT, gpf0-0, UP, FAST_SR1);
1114		PIN(INPUT, gpf0-1, UP, FAST_SR1);
1115		PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
1116		PIN(INPUT, gpf0-3, UP, FAST_SR1);
1117		PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
1118		PIN(INPUT, gpf0-5, NONE, FAST_SR1);
1119		PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
1120		PIN(INPUT, gpf0-7, UP, FAST_SR1);
1121	};
1122};
1123
1124&pinctrl_nfc {
1125	pinctrl-names = "default";
1126	pinctrl-0 = <&initial_nfc>;
1127
1128	initial_nfc: initial-state {
1129		PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
1130	};
1131};
1132
1133&pinctrl_peric {
1134	pinctrl-names = "default";
1135	pinctrl-0 = <&initial_peric>;
1136
1137	initial_peric: initial-state {
1138		PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
1139		PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
1140		PIN(INPUT, gpv7-2, NONE, FAST_SR1);
1141		PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
1142		PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
1143		PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
1144
1145		PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
1146
1147		PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
1148		PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
1149		PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
1150
1151		PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
1152
1153		PIN(INPUT, gpc3-4, NONE, FAST_SR1);
1154		PIN(INPUT, gpc3-5, NONE, FAST_SR1);
1155		PIN(INPUT, gpc3-6, NONE, FAST_SR1);
1156		PIN(INPUT, gpc3-7, NONE, FAST_SR1);
1157
1158		PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
1159		PIN(2, gpg0-1, DOWN, FAST_SR1);
1160
1161		PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
1162
1163		PIN(INPUT, gpd4-0, NONE, FAST_SR1);
1164		PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
1165		PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
1166		PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
1167		PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
1168
1169		PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
1170
1171		PIN(INPUT, gpd8-1, UP, FAST_SR1);
1172
1173		PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
1174		PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
1175		PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
1176		PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
1177		PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
1178
1179		PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1180		PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1181
1182		PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1183		PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1184		PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1185	};
1186};
1187
1188&pinctrl_touch {
1189	pinctrl-names = "default";
1190	pinctrl-0 = <&initial_touch>;
1191
1192	initial_touch: initial-state {
1193		PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1194	};
1195};
1196
1197&pwm {
1198	pinctrl-0 = <&pwm0_out>;
1199	pinctrl-names = "default";
1200	status = "okay";
1201};
1202
1203&mic {
1204	status = "okay";
1205};
1206
1207&pmu_system_controller {
1208	assigned-clocks = <&pmu_system_controller 0>;
1209	assigned-clock-parents = <&xxti>;
1210};
1211
1212&serial_1 {
1213	status = "okay";
1214};
1215
1216&serial_3 {
1217	status = "okay";
1218
1219	bluetooth {
1220		compatible = "brcm,bcm43438-bt";
1221		max-speed = <3000000>;
1222		shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
1223		device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
1224		host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
1225		clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
1226		clock-names = "extclk";
1227	};
1228};
1229
1230&spi_1 {
1231	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1232	status = "okay";
1233
1234	wm5110: wm5110-codec@0 {
1235		compatible = "wlf,wm5110";
1236		reg = <0x0>;
1237		spi-max-frequency = <20000000>;
1238		interrupt-parent = <&gpa0>;
1239		interrupts = <4 IRQ_TYPE_NONE>;
1240		clocks = <&pmu_system_controller 0>,
1241			<&s2mps13_osc S2MPS11_CLK_BT>;
1242		clock-names = "mclk1", "mclk2";
1243
1244		gpio-controller;
1245		#gpio-cells = <2>;
1246
1247		wlf,micd-detect-debounce = <300>;
1248		wlf,micd-bias-start-time = <0x1>;
1249		wlf,micd-rate = <0x7>;
1250		wlf,micd-dbtime = <0x1>;
1251		wlf,micd-force-micbias;
1252		wlf,micd-configs = <0x0 1 0>;
1253		wlf,hpdet-channel = <1>;
1254		wlf,gpsw = <0x1>;
1255		wlf,inmode = <2 0 2 0>;
1256
1257		wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1258		wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1259
1260		/* core supplies */
1261		AVDD-supply = <&ldo18_reg>;
1262		DBVDD1-supply = <&ldo18_reg>;
1263		CPVDD-supply = <&ldo18_reg>;
1264		DBVDD2-supply = <&ldo18_reg>;
1265		DBVDD3-supply = <&ldo18_reg>;
1266
1267		controller-data {
1268			samsung,spi-feedback-delay = <0>;
1269		};
1270	};
1271};
1272
1273&spi_3 {
1274	status = "okay";
1275	no-cs-readback;
1276
1277	irled@0 {
1278		compatible = "ir-spi-led";
1279		reg = <0x0>;
1280		spi-max-frequency = <5000000>;
1281		power-supply = <&irda_regulator>;
1282		duty-cycle = <60>;
1283		led-active-low;
1284
1285		controller-data {
1286			samsung,spi-feedback-delay = <0>;
1287		};
1288	};
1289};
1290
1291&timer {
1292	clock-frequency = <24000000>;
1293};
1294
1295&tmu_atlas0 {
1296	vtmu-supply = <&ldo3_reg>;
1297	status = "okay";
1298};
1299
1300&tmu_apollo {
1301	vtmu-supply = <&ldo3_reg>;
1302	status = "okay";
1303};
1304
1305&tmu_g3d {
1306	vtmu-supply = <&ldo3_reg>;
1307	status = "okay";
1308};
1309
1310&usbdrd30 {
1311	vdd33-supply = <&ldo10_reg>;
1312	vdd10-supply = <&ldo6_reg>;
1313	status = "okay";
1314};
1315
1316&usbdrd_dwc3 {
1317	dr_mode = "otg";
1318};
1319
1320&usbdrd30_phy {
1321	vbus-supply = <&safeout1_reg>;
1322	status = "okay";
1323
1324	port {
1325		usb_to_muic: endpoint {
1326			remote-endpoint = <&muic_to_usb>;
1327		};
1328	};
1329};
1330
1331&xxti {
1332	clock-frequency = <24000000>;
1333};
1334