1// SPDX-License-Identifier: GPL-2.0 2/* 3 * SAMSUNG Exynos5433 TM2 board device tree source 4 * 5 * Copyright (c) 2016 Samsung Electronics Co., Ltd. 6 * 7 * Common device tree source file for Samsung's TM2 and TM2E boards 8 * which are based on Samsung Exynos5433 SoC. 9 */ 10 11/dts-v1/; 12#include "exynos5433.dtsi" 13#include <dt-bindings/clock/samsung,s2mps11.h> 14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/input/input.h> 16#include <dt-bindings/interrupt-controller/irq.h> 17#include <dt-bindings/sound/samsung-i2s.h> 18 19/ { 20 aliases { 21 gsc0 = &gsc_0; 22 gsc1 = &gsc_1; 23 gsc2 = &gsc_2; 24 pinctrl0 = &pinctrl_alive; 25 pinctrl1 = &pinctrl_aud; 26 pinctrl2 = &pinctrl_cpif; 27 pinctrl3 = &pinctrl_ese; 28 pinctrl4 = &pinctrl_finger; 29 pinctrl5 = &pinctrl_fsys; 30 pinctrl6 = &pinctrl_imem; 31 pinctrl7 = &pinctrl_nfc; 32 pinctrl8 = &pinctrl_peric; 33 pinctrl9 = &pinctrl_touch; 34 serial0 = &serial_0; 35 serial1 = &serial_1; 36 serial2 = &serial_2; 37 serial3 = &serial_3; 38 spi0 = &spi_0; 39 spi1 = &spi_1; 40 spi2 = &spi_2; 41 spi3 = &spi_3; 42 spi4 = &spi_4; 43 mshc0 = &mshc_0; 44 mshc2 = &mshc_2; 45 }; 46 47 chosen { 48 stdout-path = &serial_1; 49 }; 50 51 memory@20000000 { 52 device_type = "memory"; 53 reg = <0x0 0x20000000 0x0 0xc0000000>; 54 }; 55 56 gpio-keys { 57 compatible = "gpio-keys"; 58 59 power-key { 60 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>; 61 linux,code = <KEY_POWER>; 62 label = "power key"; 63 debounce-interval = <10>; 64 }; 65 66 volume-up-key { 67 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>; 68 linux,code = <KEY_VOLUMEUP>; 69 label = "volume-up key"; 70 debounce-interval = <10>; 71 }; 72 73 volume-down-key { 74 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>; 75 linux,code = <KEY_VOLUMEDOWN>; 76 label = "volume-down key"; 77 debounce-interval = <10>; 78 }; 79 80 homepage-key { 81 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; 82 linux,code = <KEY_MENU>; 83 label = "homepage key"; 84 debounce-interval = <10>; 85 }; 86 }; 87 88 i2c_max98504: i2c-gpio-0 { 89 compatible = "i2c-gpio"; 90 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */ 91 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >; 92 i2c-gpio,delay-us = <2>; 93 #address-cells = <1>; 94 #size-cells = <0>; 95 status = "okay"; 96 97 max98504: max98504@31 { 98 compatible = "maxim,max98504"; 99 reg = <0x31>; 100 maxim,rx-path = <1>; 101 maxim,tx-path = <1>; 102 maxim,tx-channel-mask = <3>; 103 maxim,tx-channel-source = <2>; 104 }; 105 }; 106 107 irda_regulator: irda-regulator { 108 compatible = "regulator-fixed"; 109 enable-active-high; 110 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>; 111 regulator-name = "irda_regulator"; 112 }; 113 114 sound { 115 compatible = "samsung,tm2-audio"; 116 audio-codec = <&wm5110>, <&hdmi>; 117 i2s-controller = <&i2s0 0>, <&i2s1 0>; 118 audio-amplifier = <&max98504>; 119 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>; 120 model = "wm5110"; 121 samsung,audio-routing = 122 /* Headphone */ 123 "HP", "HPOUT1L", 124 "HP", "HPOUT1R", 125 126 /* Speaker */ 127 "SPK", "SPKOUT", 128 "SPKOUT", "HPOUT2L", 129 "SPKOUT", "HPOUT2R", 130 131 /* Receiver */ 132 "RCV", "HPOUT3L", 133 "RCV", "HPOUT3R"; 134 status = "okay"; 135 }; 136}; 137 138&adc { 139 vdd-supply = <&ldo3_reg>; 140 status = "okay"; 141 142 thermistor-ap { 143 compatible = "murata,ncp03wf104"; 144 pullup-uv = <1800000>; 145 pullup-ohm = <100000>; 146 pulldown-ohm = <0>; 147 io-channels = <&adc 0>; 148 }; 149 150 thermistor-battery { 151 compatible = "murata,ncp03wf104"; 152 pullup-uv = <1800000>; 153 pullup-ohm = <100000>; 154 pulldown-ohm = <0>; 155 io-channels = <&adc 1>; 156 #thermal-sensor-cells = <0>; 157 }; 158 159 thermistor-charger { 160 compatible = "murata,ncp03wf104"; 161 pullup-uv = <1800000>; 162 pullup-ohm = <100000>; 163 pulldown-ohm = <0>; 164 io-channels = <&adc 2>; 165 }; 166}; 167 168&bus_g2d_400 { 169 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>; 170 vdd-supply = <&buck4_reg>; 171 exynos,saturation-ratio = <10>; 172 status = "okay"; 173}; 174 175&bus_g2d_266 { 176 devfreq = <&bus_g2d_400>; 177 status = "okay"; 178}; 179 180&bus_gscl { 181 devfreq = <&bus_g2d_400>; 182 status = "okay"; 183}; 184 185&bus_hevc { 186 devfreq = <&bus_g2d_400>; 187 status = "okay"; 188}; 189 190&bus_jpeg { 191 devfreq = <&bus_g2d_400>; 192 status = "okay"; 193}; 194 195&bus_mfc { 196 devfreq = <&bus_g2d_400>; 197 status = "okay"; 198}; 199 200&bus_mscl { 201 devfreq = <&bus_g2d_400>; 202 status = "okay"; 203}; 204 205&bus_noc0 { 206 devfreq = <&bus_g2d_400>; 207 status = "okay"; 208}; 209 210&bus_noc1 { 211 devfreq = <&bus_g2d_400>; 212 status = "okay"; 213}; 214 215&bus_noc2 { 216 devfreq = <&bus_g2d_400>; 217 status = "okay"; 218}; 219 220&cmu_aud { 221 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>, 222 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>, 223 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>, 224 <&cmu_top CLK_MOUT_AUD_PLL>, 225 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, 226 <&cmu_top CLK_MOUT_SCLK_AUDIO0>, 227 <&cmu_top CLK_MOUT_SCLK_AUDIO1>, 228 <&cmu_top CLK_MOUT_SCLK_SPDIF>, 229 230 <&cmu_aud CLK_DIV_AUD_CA5>, 231 <&cmu_aud CLK_DIV_ACLK_AUD>, 232 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>, 233 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>, 234 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>, 235 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>, 236 <&cmu_aud CLK_DIV_SCLK_AUD_UART>, 237 <&cmu_top CLK_DIV_SCLK_AUDIO0>, 238 <&cmu_top CLK_DIV_SCLK_AUDIO1>, 239 <&cmu_top CLK_DIV_SCLK_PCM1>, 240 <&cmu_top CLK_DIV_SCLK_I2S1>; 241 242 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>, 243 <&cmu_aud CLK_MOUT_AUD_PLL_USER>, 244 <&cmu_aud CLK_MOUT_AUD_PLL_USER>, 245 <&cmu_top CLK_FOUT_AUD_PLL>, 246 <&cmu_top CLK_MOUT_AUD_PLL>, 247 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, 248 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, 249 <&cmu_top CLK_SCLK_AUDIO0>; 250 251 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, 252 <196608001>, <65536001>, <32768001>, <49152001>, 253 <2048001>, <24576001>, <196608001>, 254 <24576001>, <98304001>, <2048001>, <49152001>; 255}; 256 257&cmu_fsys { 258 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, 259 <&cmu_top CLK_MOUT_SCLK_USBHOST30>, 260 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, 261 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, 262 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, 263 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, 264 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, 265 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, 266 <&cmu_top CLK_DIV_SCLK_USBDRD30>, 267 <&cmu_top CLK_DIV_SCLK_USBHOST30>; 268 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, 269 <&cmu_top CLK_MOUT_BUS_PLL_USER>, 270 <&cmu_top CLK_SCLK_USBDRD30_FSYS>, 271 <&cmu_top CLK_SCLK_USBHOST30_FSYS>, 272 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, 273 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, 274 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, 275 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; 276 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, 277 <66700000>, <66700000>; 278}; 279 280&cmu_gscl { 281 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, 282 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; 283 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, 284 <&cmu_top CLK_ACLK_GSCL_333>; 285}; 286 287&cmu_mfc { 288 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>; 289 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>; 290}; 291 292&cmu_mif { 293 assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>; 294 assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>; 295 assigned-clock-rates = <0>, <333000000>; 296}; 297 298&cmu_mscl { 299 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, 300 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 301 <&cmu_mscl CLK_MOUT_SCLK_JPEG>, 302 <&cmu_top CLK_MOUT_SCLK_JPEG_A>; 303 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>, 304 <&cmu_top CLK_SCLK_JPEG_MSCL>, 305 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 306 <&cmu_top CLK_MOUT_BUS_PLL_USER>; 307}; 308 309&cmu_top { 310 assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>; 311 assigned-clock-rates = <196608001>; 312}; 313 314&cpu0 { 315 cpu-supply = <&buck3_reg>; 316}; 317 318&cpu4 { 319 cpu-supply = <&buck2_reg>; 320}; 321 322&decon { 323 status = "okay"; 324}; 325 326&decon_tv { 327 status = "okay"; 328 329 ports { 330 #address-cells = <1>; 331 #size-cells = <0>; 332 333 port@0 { 334 reg = <0>; 335 tv_to_hdmi: endpoint { 336 remote-endpoint = <&hdmi_to_tv>; 337 }; 338 }; 339 }; 340}; 341 342&dsi { 343 status = "okay"; 344 vddcore-supply = <&ldo6_reg>; 345 vddio-supply = <&ldo7_reg>; 346 samsung,burst-clock-frequency = <512000000>; 347 samsung,esc-clock-frequency = <16000000>; 348 samsung,pll-clock-frequency = <24000000>; 349 pinctrl-names = "default"; 350 pinctrl-0 = <&te_irq>; 351}; 352 353&hdmi { 354 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>; 355 status = "okay"; 356 vdd-supply = <&ldo6_reg>; 357 vdd_osc-supply = <&ldo7_reg>; 358 vdd_pll-supply = <&ldo6_reg>; 359 360 ports { 361 #address-cells = <1>; 362 #size-cells = <0>; 363 364 port@0 { 365 reg = <0>; 366 hdmi_to_tv: endpoint { 367 remote-endpoint = <&tv_to_hdmi>; 368 }; 369 }; 370 371 port@1 { 372 reg = <1>; 373 hdmi_to_mhl: endpoint { 374 remote-endpoint = <&mhl_to_hdmi>; 375 }; 376 }; 377 }; 378}; 379 380&hsi2c_0 { 381 status = "okay"; 382 clock-frequency = <2500000>; 383 384 s2mps13-pmic@66 { 385 compatible = "samsung,s2mps13-pmic"; 386 interrupt-parent = <&gpa0>; 387 interrupts = <7 IRQ_TYPE_NONE>; 388 reg = <0x66>; 389 samsung,s2mps11-wrstbi-ground; 390 391 s2mps13_osc: clocks { 392 compatible = "samsung,s2mps13-clk"; 393 #clock-cells = <1>; 394 clock-output-names = "s2mps13_ap", "s2mps13_cp", 395 "s2mps13_bt"; 396 }; 397 398 regulators { 399 ldo1_reg: LDO1 { 400 regulator-name = "VDD_ALIVE_0.9V_AP"; 401 regulator-min-microvolt = <900000>; 402 regulator-max-microvolt = <900000>; 403 regulator-always-on; 404 }; 405 406 ldo2_reg: LDO2 { 407 regulator-name = "VDDQ_MMC2_2.8V_AP"; 408 regulator-min-microvolt = <2800000>; 409 regulator-max-microvolt = <2800000>; 410 regulator-always-on; 411 regulator-state-mem { 412 regulator-off-in-suspend; 413 }; 414 }; 415 416 ldo3_reg: LDO3 { 417 regulator-name = "VDD1_E_1.8V_AP"; 418 regulator-min-microvolt = <1800000>; 419 regulator-max-microvolt = <1800000>; 420 regulator-always-on; 421 }; 422 423 ldo4_reg: LDO4 { 424 regulator-name = "VDD10_MIF_PLL_1.0V_AP"; 425 regulator-min-microvolt = <1300000>; 426 regulator-max-microvolt = <1300000>; 427 regulator-always-on; 428 regulator-state-mem { 429 regulator-off-in-suspend; 430 }; 431 }; 432 433 ldo5_reg: LDO5 { 434 regulator-name = "VDD10_DPLL_1.0V_AP"; 435 regulator-min-microvolt = <1000000>; 436 regulator-max-microvolt = <1000000>; 437 regulator-always-on; 438 regulator-state-mem { 439 regulator-off-in-suspend; 440 }; 441 }; 442 443 ldo6_reg: LDO6 { 444 regulator-name = "VDD10_MIPI2L_1.0V_AP"; 445 regulator-min-microvolt = <1000000>; 446 regulator-max-microvolt = <1000000>; 447 regulator-state-mem { 448 regulator-off-in-suspend; 449 }; 450 }; 451 452 ldo7_reg: LDO7 { 453 regulator-name = "VDD18_MIPI2L_1.8V_AP"; 454 regulator-min-microvolt = <1800000>; 455 regulator-max-microvolt = <1800000>; 456 regulator-always-on; 457 regulator-state-mem { 458 regulator-off-in-suspend; 459 }; 460 }; 461 462 ldo8_reg: LDO8 { 463 regulator-name = "VDD18_LLI_1.8V_AP"; 464 regulator-min-microvolt = <1800000>; 465 regulator-max-microvolt = <1800000>; 466 regulator-always-on; 467 regulator-state-mem { 468 regulator-off-in-suspend; 469 }; 470 }; 471 472 ldo9_reg: LDO9 { 473 regulator-name = "VDD18_ABB_ETC_1.8V_AP"; 474 regulator-min-microvolt = <1800000>; 475 regulator-max-microvolt = <1800000>; 476 regulator-always-on; 477 regulator-state-mem { 478 regulator-off-in-suspend; 479 }; 480 }; 481 482 ldo10_reg: LDO10 { 483 regulator-name = "VDD33_USB30_3.0V_AP"; 484 regulator-min-microvolt = <3000000>; 485 regulator-max-microvolt = <3000000>; 486 regulator-state-mem { 487 regulator-off-in-suspend; 488 }; 489 }; 490 491 ldo11_reg: LDO11 { 492 regulator-name = "VDD_INT_M_1.0V_AP"; 493 regulator-min-microvolt = <1000000>; 494 regulator-max-microvolt = <1000000>; 495 regulator-always-on; 496 regulator-state-mem { 497 regulator-off-in-suspend; 498 }; 499 }; 500 501 ldo12_reg: LDO12 { 502 regulator-name = "VDD_KFC_M_1.1V_AP"; 503 regulator-min-microvolt = <800000>; 504 regulator-max-microvolt = <1350000>; 505 regulator-always-on; 506 }; 507 508 ldo13_reg: LDO13 { 509 regulator-name = "VDD_G3D_M_0.95V_AP"; 510 regulator-min-microvolt = <950000>; 511 regulator-max-microvolt = <950000>; 512 regulator-always-on; 513 regulator-state-mem { 514 regulator-off-in-suspend; 515 }; 516 }; 517 518 ldo14_reg: LDO14 { 519 regulator-name = "VDDQ_M1_LDO_1.2V_AP"; 520 regulator-min-microvolt = <1200000>; 521 regulator-max-microvolt = <1200000>; 522 regulator-always-on; 523 regulator-state-mem { 524 regulator-off-in-suspend; 525 }; 526 }; 527 528 ldo15_reg: LDO15 { 529 regulator-name = "VDDQ_M2_LDO_1.2V_AP"; 530 regulator-min-microvolt = <1200000>; 531 regulator-max-microvolt = <1200000>; 532 regulator-always-on; 533 regulator-state-mem { 534 regulator-off-in-suspend; 535 }; 536 }; 537 538 ldo16_reg: LDO16 { 539 regulator-name = "VDDQ_EFUSE"; 540 regulator-min-microvolt = <1400000>; 541 regulator-max-microvolt = <3400000>; 542 regulator-always-on; 543 }; 544 545 ldo17_reg: LDO17 { 546 regulator-name = "V_TFLASH_2.8V_AP"; 547 regulator-min-microvolt = <2800000>; 548 regulator-max-microvolt = <2800000>; 549 }; 550 551 ldo18_reg: LDO18 { 552 regulator-name = "V_CODEC_1.8V_AP"; 553 regulator-min-microvolt = <1800000>; 554 regulator-max-microvolt = <1800000>; 555 }; 556 557 ldo19_reg: LDO19 { 558 regulator-name = "VDDA_1.8V_COMP"; 559 regulator-min-microvolt = <1800000>; 560 regulator-max-microvolt = <1800000>; 561 regulator-always-on; 562 }; 563 564 ldo20_reg: LDO20 { 565 regulator-name = "VCC_2.8V_AP"; 566 regulator-min-microvolt = <2800000>; 567 regulator-max-microvolt = <2800000>; 568 regulator-always-on; 569 }; 570 571 ldo21_reg: LDO21 { 572 regulator-name = "VT_CAM_1.8V"; 573 regulator-min-microvolt = <1800000>; 574 regulator-max-microvolt = <1800000>; 575 }; 576 577 ldo22_reg: LDO22 { 578 regulator-name = "CAM_IO_1.8V_AP"; 579 regulator-min-microvolt = <1800000>; 580 regulator-max-microvolt = <1800000>; 581 }; 582 583 ldo23_reg: LDO23 { 584 regulator-name = "CAM_SEN_CORE_1.05V_AP"; 585 regulator-min-microvolt = <1050000>; 586 regulator-max-microvolt = <1050000>; 587 }; 588 589 ldo24_reg: LDO24 { 590 regulator-name = "VT_CAM_1.2V"; 591 regulator-min-microvolt = <1200000>; 592 regulator-max-microvolt = <1200000>; 593 }; 594 595 ldo25_reg: LDO25 { 596 regulator-name = "UNUSED_LDO25"; 597 regulator-min-microvolt = <2800000>; 598 regulator-max-microvolt = <2800000>; 599 }; 600 601 ldo26_reg: LDO26 { 602 regulator-name = "CAM_AF_2.8V_AP"; 603 regulator-min-microvolt = <2800000>; 604 regulator-max-microvolt = <2800000>; 605 }; 606 607 ldo27_reg: LDO27 { 608 regulator-name = "VCC_3.0V_LCD_AP"; 609 regulator-min-microvolt = <3000000>; 610 regulator-max-microvolt = <3000000>; 611 }; 612 613 ldo28_reg: LDO28 { 614 regulator-name = "VCC_1.8V_LCD_AP"; 615 regulator-min-microvolt = <1800000>; 616 regulator-max-microvolt = <1800000>; 617 }; 618 619 ldo29_reg: LDO29 { 620 regulator-name = "VT_CAM_2.8V"; 621 regulator-min-microvolt = <3000000>; 622 regulator-max-microvolt = <3000000>; 623 }; 624 625 ldo30_reg: LDO30 { 626 regulator-name = "TSP_AVDD_3.3V_AP"; 627 regulator-min-microvolt = <3300000>; 628 regulator-max-microvolt = <3300000>; 629 }; 630 631 ldo31_reg: LDO31 { 632 /* 633 * LDO31 differs from target to target, 634 * its definition is in the .dts 635 */ 636 }; 637 638 ldo32_reg: LDO32 { 639 regulator-name = "VTOUCH_1.8V_AP"; 640 regulator-min-microvolt = <1800000>; 641 regulator-max-microvolt = <1800000>; 642 }; 643 644 ldo33_reg: LDO33 { 645 regulator-name = "VTOUCH_LED_3.3V"; 646 regulator-min-microvolt = <2500000>; 647 regulator-max-microvolt = <3300000>; 648 regulator-ramp-delay = <12500>; 649 }; 650 651 ldo34_reg: LDO34 { 652 regulator-name = "VCC_1.8V_MHL_AP"; 653 regulator-min-microvolt = <1000000>; 654 regulator-max-microvolt = <2100000>; 655 }; 656 657 ldo35_reg: LDO35 { 658 regulator-name = "OIS_VM_2.8V"; 659 regulator-min-microvolt = <1800000>; 660 regulator-max-microvolt = <2800000>; 661 }; 662 663 ldo36_reg: LDO36 { 664 regulator-name = "VSIL_1.0V"; 665 regulator-min-microvolt = <1000000>; 666 regulator-max-microvolt = <1000000>; 667 }; 668 669 ldo37_reg: LDO37 { 670 regulator-name = "VF_1.8V"; 671 regulator-min-microvolt = <1800000>; 672 regulator-max-microvolt = <1800000>; 673 }; 674 675 ldo38_reg: LDO38 { 676 /* 677 * LDO38 differs from target to target, 678 * its definition is in the .dts 679 */ 680 }; 681 682 ldo39_reg: LDO39 { 683 regulator-name = "V_HRM_1.8V"; 684 regulator-min-microvolt = <1800000>; 685 regulator-max-microvolt = <1800000>; 686 }; 687 688 ldo40_reg: LDO40 { 689 regulator-name = "V_HRM_3.3V"; 690 regulator-min-microvolt = <3300000>; 691 regulator-max-microvolt = <3300000>; 692 }; 693 694 buck1_reg: BUCK1 { 695 regulator-name = "VDD_MIF_0.9V_AP"; 696 regulator-min-microvolt = <600000>; 697 regulator-max-microvolt = <1500000>; 698 regulator-always-on; 699 regulator-state-mem { 700 regulator-off-in-suspend; 701 }; 702 }; 703 704 buck2_reg: BUCK2 { 705 regulator-name = "VDD_EGL_1.0V_AP"; 706 regulator-min-microvolt = <900000>; 707 regulator-max-microvolt = <1300000>; 708 regulator-always-on; 709 regulator-state-mem { 710 regulator-off-in-suspend; 711 }; 712 }; 713 714 buck3_reg: BUCK3 { 715 regulator-name = "VDD_KFC_1.0V_AP"; 716 regulator-min-microvolt = <800000>; 717 regulator-max-microvolt = <1200000>; 718 regulator-always-on; 719 regulator-state-mem { 720 regulator-off-in-suspend; 721 }; 722 }; 723 724 buck4_reg: BUCK4 { 725 regulator-name = "VDD_INT_0.95V_AP"; 726 regulator-min-microvolt = <600000>; 727 regulator-max-microvolt = <1500000>; 728 regulator-always-on; 729 regulator-state-mem { 730 regulator-off-in-suspend; 731 }; 732 }; 733 734 buck5_reg: BUCK5 { 735 regulator-name = "VDD_DISP_CAM0_0.9V_AP"; 736 regulator-min-microvolt = <600000>; 737 regulator-max-microvolt = <1500000>; 738 regulator-always-on; 739 regulator-state-mem { 740 regulator-off-in-suspend; 741 }; 742 }; 743 744 buck6_reg: BUCK6 { 745 regulator-name = "VDD_G3D_0.9V_AP"; 746 regulator-min-microvolt = <600000>; 747 regulator-max-microvolt = <1500000>; 748 regulator-always-on; 749 regulator-state-mem { 750 regulator-off-in-suspend; 751 }; 752 }; 753 754 buck7_reg: BUCK7 { 755 regulator-name = "VDD_MEM1_1.2V_AP"; 756 regulator-min-microvolt = <1200000>; 757 regulator-max-microvolt = <1200000>; 758 regulator-always-on; 759 }; 760 761 buck8_reg: BUCK8 { 762 regulator-name = "VDD_LLDO_1.35V_AP"; 763 regulator-min-microvolt = <1350000>; 764 regulator-max-microvolt = <3300000>; 765 regulator-always-on; 766 }; 767 768 buck9_reg: BUCK9 { 769 regulator-name = "VDD_MLDO_2.0V_AP"; 770 regulator-min-microvolt = <1350000>; 771 regulator-max-microvolt = <3300000>; 772 regulator-always-on; 773 }; 774 775 buck10_reg: BUCK10 { 776 regulator-name = "vdd_mem2"; 777 regulator-min-microvolt = <550000>; 778 regulator-max-microvolt = <1500000>; 779 regulator-always-on; 780 }; 781 }; 782 }; 783}; 784 785&hsi2c_4 { 786 status = "okay"; 787 788 s3fwrn5: nfc@27 { 789 compatible = "samsung,s3fwrn5-i2c"; 790 reg = <0x27>; 791 interrupt-parent = <&gpa1>; 792 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; 793 s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; 794 s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; 795 }; 796}; 797 798&hsi2c_5 { 799 status = "okay"; 800 801 stmfts: touchscreen@49 { 802 compatible = "st,stmfts"; 803 reg = <0x49>; 804 interrupt-parent = <&gpa1>; 805 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 806 avdd-supply = <&ldo30_reg>; 807 vdd-supply = <&ldo31_reg>; 808 }; 809}; 810 811&hsi2c_7 { 812 status = "okay"; 813 clock-frequency = <1000000>; 814 815 sii8620@39 { 816 reg = <0x39>; 817 compatible = "sil,sii8620"; 818 cvcc10-supply = <&ldo36_reg>; 819 iovcc18-supply = <&ldo34_reg>; 820 interrupt-parent = <&gpf0>; 821 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 822 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; 823 clocks = <&pmu_system_controller 0>; 824 clock-names = "xtal"; 825 826 ports { 827 #address-cells = <1>; 828 #size-cells = <0>; 829 830 port@0 { 831 reg = <0>; 832 mhl_to_hdmi: endpoint { 833 remote-endpoint = <&hdmi_to_mhl>; 834 }; 835 }; 836 837 port@1 { 838 reg = <1>; 839 mhl_to_musb_con: endpoint { 840 remote-endpoint = <&musb_con_to_mhl>; 841 }; 842 }; 843 }; 844 }; 845}; 846 847&hsi2c_8 { 848 status = "okay"; 849 850 max77843@66 { 851 compatible = "maxim,max77843"; 852 interrupt-parent = <&gpa1>; 853 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 854 reg = <0x66>; 855 856 muic: max77843-muic { 857 compatible = "maxim,max77843-muic"; 858 859 musb_con: musb_connector { 860 compatible = "samsung,usb-connector-11pin", 861 "usb-b-connector"; 862 label = "micro-USB"; 863 type = "micro"; 864 865 ports { 866 #address-cells = <1>; 867 #size-cells = <0>; 868 869 port@3 { 870 reg = <3>; 871 musb_con_to_mhl: endpoint { 872 remote-endpoint = <&mhl_to_musb_con>; 873 }; 874 }; 875 }; 876 }; 877 878 ports { 879 port { 880 muic_to_usb: endpoint { 881 remote-endpoint = <&usb_to_muic>; 882 }; 883 }; 884 }; 885 }; 886 887 regulators { 888 compatible = "maxim,max77843-regulator"; 889 safeout1_reg: SAFEOUT1 { 890 regulator-name = "SAFEOUT1"; 891 regulator-min-microvolt = <3300000>; 892 regulator-max-microvolt = <4950000>; 893 }; 894 895 safeout2_reg: SAFEOUT2 { 896 regulator-name = "SAFEOUT2"; 897 regulator-min-microvolt = <3300000>; 898 regulator-max-microvolt = <4950000>; 899 }; 900 901 charger_reg: CHARGER { 902 regulator-name = "CHARGER"; 903 regulator-min-microamp = <100000>; 904 regulator-max-microamp = <3150000>; 905 }; 906 }; 907 908 haptic: max77843-haptic { 909 compatible = "maxim,max77843-haptic"; 910 haptic-supply = <&ldo38_reg>; 911 pwms = <&pwm 0 33670 0>; 912 pwm-names = "haptic"; 913 }; 914 }; 915}; 916 917&hsi2c_11 { 918 status = "okay"; 919}; 920 921&i2s0 { 922 status = "okay"; 923}; 924 925&i2s1 { 926 assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>; 927 assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>; 928 status = "okay"; 929}; 930 931&mshc_0 { 932 status = "okay"; 933 mmc-hs200-1_8v; 934 mmc-hs400-1_8v; 935 cap-mmc-highspeed; 936 non-removable; 937 card-detect-delay = <200>; 938 samsung,dw-mshc-ciu-div = <3>; 939 samsung,dw-mshc-sdr-timing = <0 4>; 940 samsung,dw-mshc-ddr-timing = <0 2>; 941 samsung,dw-mshc-hs400-timing = <0 3>; 942 samsung,read-strobe-delay = <90>; 943 fifo-depth = <0x80>; 944 pinctrl-names = "default"; 945 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 946 &sd0_bus8 &sd0_rdqs>; 947 bus-width = <8>; 948 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; 949 assigned-clock-rates = <800000000>; 950}; 951 952&mshc_2 { 953 status = "okay"; 954 cap-sd-highspeed; 955 disable-wp; 956 cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>; 957 card-detect-delay = <200>; 958 samsung,dw-mshc-ciu-div = <3>; 959 samsung,dw-mshc-sdr-timing = <0 4>; 960 samsung,dw-mshc-ddr-timing = <0 2>; 961 fifo-depth = <0x80>; 962 pinctrl-names = "default"; 963 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; 964 bus-width = <4>; 965}; 966 967&ppmu_d0_general { 968 status = "okay"; 969 events { 970 ppmu_event0_d0_general: ppmu-event0-d0-general { 971 event-name = "ppmu-event0-d0-general"; 972 }; 973 }; 974}; 975 976&ppmu_d1_general { 977 status = "okay"; 978 events { 979 ppmu_event0_d1_general: ppmu-event0-d1-general { 980 event-name = "ppmu-event0-d1-general"; 981 }; 982 }; 983}; 984 985&pinctrl_alive { 986 pinctrl-names = "default"; 987 pinctrl-0 = <&initial_alive>; 988 989 initial_alive: initial-state { 990 PIN(INPUT, gpa0-0, DOWN, FAST_SR1); 991 PIN(INPUT, gpa0-1, NONE, FAST_SR1); 992 PIN(INPUT, gpa0-2, DOWN, FAST_SR1); 993 PIN(INPUT, gpa0-3, NONE, FAST_SR1); 994 PIN(INPUT, gpa0-4, NONE, FAST_SR1); 995 PIN(INPUT, gpa0-5, DOWN, FAST_SR1); 996 PIN(INPUT, gpa0-6, NONE, FAST_SR1); 997 PIN(INPUT, gpa0-7, NONE, FAST_SR1); 998 999 PIN(INPUT, gpa1-0, UP, FAST_SR1); 1000 PIN(INPUT, gpa1-1, UP, FAST_SR1); 1001 PIN(INPUT, gpa1-2, NONE, FAST_SR1); 1002 PIN(INPUT, gpa1-3, DOWN, FAST_SR1); 1003 PIN(INPUT, gpa1-4, DOWN, FAST_SR1); 1004 PIN(INPUT, gpa1-5, NONE, FAST_SR1); 1005 PIN(INPUT, gpa1-6, NONE, FAST_SR1); 1006 PIN(INPUT, gpa1-7, NONE, FAST_SR1); 1007 1008 PIN(INPUT, gpa2-0, NONE, FAST_SR1); 1009 PIN(INPUT, gpa2-1, NONE, FAST_SR1); 1010 PIN(INPUT, gpa2-2, NONE, FAST_SR1); 1011 PIN(INPUT, gpa2-3, DOWN, FAST_SR1); 1012 PIN(INPUT, gpa2-4, NONE, FAST_SR1); 1013 PIN(INPUT, gpa2-5, DOWN, FAST_SR1); 1014 PIN(INPUT, gpa2-6, DOWN, FAST_SR1); 1015 PIN(INPUT, gpa2-7, NONE, FAST_SR1); 1016 1017 PIN(INPUT, gpa3-0, DOWN, FAST_SR1); 1018 PIN(INPUT, gpa3-1, DOWN, FAST_SR1); 1019 PIN(INPUT, gpa3-2, NONE, FAST_SR1); 1020 PIN(INPUT, gpa3-3, DOWN, FAST_SR1); 1021 PIN(INPUT, gpa3-4, NONE, FAST_SR1); 1022 PIN(INPUT, gpa3-5, DOWN, FAST_SR1); 1023 PIN(INPUT, gpa3-6, DOWN, FAST_SR1); 1024 PIN(INPUT, gpa3-7, DOWN, FAST_SR1); 1025 1026 PIN(INPUT, gpf1-0, NONE, FAST_SR1); 1027 PIN(INPUT, gpf1-1, NONE, FAST_SR1); 1028 PIN(INPUT, gpf1-2, DOWN, FAST_SR1); 1029 PIN(INPUT, gpf1-4, UP, FAST_SR1); 1030 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1); 1031 PIN(INPUT, gpf1-6, DOWN, FAST_SR1); 1032 PIN(INPUT, gpf1-7, DOWN, FAST_SR1); 1033 1034 PIN(INPUT, gpf2-0, DOWN, FAST_SR1); 1035 PIN(INPUT, gpf2-1, DOWN, FAST_SR1); 1036 PIN(INPUT, gpf2-2, DOWN, FAST_SR1); 1037 PIN(INPUT, gpf2-3, DOWN, FAST_SR1); 1038 1039 PIN(INPUT, gpf3-0, DOWN, FAST_SR1); 1040 PIN(INPUT, gpf3-1, DOWN, FAST_SR1); 1041 PIN(INPUT, gpf3-2, NONE, FAST_SR1); 1042 PIN(INPUT, gpf3-3, DOWN, FAST_SR1); 1043 1044 PIN(INPUT, gpf4-0, DOWN, FAST_SR1); 1045 PIN(INPUT, gpf4-1, DOWN, FAST_SR1); 1046 PIN(INPUT, gpf4-2, DOWN, FAST_SR1); 1047 PIN(INPUT, gpf4-3, DOWN, FAST_SR1); 1048 PIN(INPUT, gpf4-4, DOWN, FAST_SR1); 1049 PIN(INPUT, gpf4-5, DOWN, FAST_SR1); 1050 PIN(INPUT, gpf4-6, DOWN, FAST_SR1); 1051 PIN(INPUT, gpf4-7, DOWN, FAST_SR1); 1052 1053 PIN(INPUT, gpf5-0, DOWN, FAST_SR1); 1054 PIN(INPUT, gpf5-1, DOWN, FAST_SR1); 1055 PIN(INPUT, gpf5-2, DOWN, FAST_SR1); 1056 PIN(INPUT, gpf5-3, DOWN, FAST_SR1); 1057 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1); 1058 PIN(INPUT, gpf5-5, DOWN, FAST_SR1); 1059 PIN(INPUT, gpf5-6, DOWN, FAST_SR1); 1060 PIN(INPUT, gpf5-7, DOWN, FAST_SR1); 1061 }; 1062 1063 te_irq: te_irq { 1064 samsung,pins = "gpf1-3"; 1065 samsung,pin-function = <0xf>; 1066 }; 1067}; 1068 1069&pinctrl_cpif { 1070 pinctrl-names = "default"; 1071 pinctrl-0 = <&initial_cpif>; 1072 1073 initial_cpif: initial-state { 1074 PIN(INPUT, gpv6-0, DOWN, FAST_SR1); 1075 PIN(INPUT, gpv6-1, DOWN, FAST_SR1); 1076 }; 1077}; 1078 1079&pinctrl_ese { 1080 pinctrl-names = "default"; 1081 pinctrl-0 = <&initial_ese>; 1082 1083 initial_ese: initial-state { 1084 PIN(INPUT, gpj2-0, DOWN, FAST_SR1); 1085 PIN(INPUT, gpj2-1, DOWN, FAST_SR1); 1086 PIN(INPUT, gpj2-2, DOWN, FAST_SR1); 1087 }; 1088}; 1089 1090&pinctrl_fsys { 1091 pinctrl-names = "default"; 1092 pinctrl-0 = <&initial_fsys>; 1093 1094 initial_fsys: initial-state { 1095 PIN(INPUT, gpr3-0, NONE, FAST_SR1); 1096 PIN(INPUT, gpr3-1, DOWN, FAST_SR1); 1097 PIN(INPUT, gpr3-2, DOWN, FAST_SR1); 1098 PIN(INPUT, gpr3-3, DOWN, FAST_SR1); 1099 PIN(INPUT, gpr3-7, NONE, FAST_SR1); 1100 }; 1101}; 1102 1103&pinctrl_imem { 1104 pinctrl-names = "default"; 1105 pinctrl-0 = <&initial_imem>; 1106 1107 initial_imem: initial-state { 1108 PIN(INPUT, gpf0-0, UP, FAST_SR1); 1109 PIN(INPUT, gpf0-1, UP, FAST_SR1); 1110 PIN(INPUT, gpf0-2, DOWN, FAST_SR1); 1111 PIN(INPUT, gpf0-3, UP, FAST_SR1); 1112 PIN(INPUT, gpf0-4, DOWN, FAST_SR1); 1113 PIN(INPUT, gpf0-5, NONE, FAST_SR1); 1114 PIN(INPUT, gpf0-6, DOWN, FAST_SR1); 1115 PIN(INPUT, gpf0-7, UP, FAST_SR1); 1116 }; 1117}; 1118 1119&pinctrl_nfc { 1120 pinctrl-names = "default"; 1121 pinctrl-0 = <&initial_nfc>; 1122 1123 initial_nfc: initial-state { 1124 PIN(INPUT, gpj0-2, DOWN, FAST_SR1); 1125 }; 1126}; 1127 1128&pinctrl_peric { 1129 pinctrl-names = "default"; 1130 pinctrl-0 = <&initial_peric>; 1131 1132 initial_peric: initial-state { 1133 PIN(INPUT, gpv7-0, DOWN, FAST_SR1); 1134 PIN(INPUT, gpv7-1, DOWN, FAST_SR1); 1135 PIN(INPUT, gpv7-2, NONE, FAST_SR1); 1136 PIN(INPUT, gpv7-3, DOWN, FAST_SR1); 1137 PIN(INPUT, gpv7-4, DOWN, FAST_SR1); 1138 PIN(INPUT, gpv7-5, DOWN, FAST_SR1); 1139 1140 PIN(INPUT, gpb0-4, DOWN, FAST_SR1); 1141 1142 PIN(INPUT, gpc0-2, DOWN, FAST_SR1); 1143 PIN(INPUT, gpc0-5, DOWN, FAST_SR1); 1144 PIN(INPUT, gpc0-7, DOWN, FAST_SR1); 1145 1146 PIN(INPUT, gpc1-1, DOWN, FAST_SR1); 1147 1148 PIN(INPUT, gpc3-4, NONE, FAST_SR1); 1149 PIN(INPUT, gpc3-5, NONE, FAST_SR1); 1150 PIN(INPUT, gpc3-6, NONE, FAST_SR1); 1151 PIN(INPUT, gpc3-7, NONE, FAST_SR1); 1152 1153 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1); 1154 PIN(2, gpg0-1, DOWN, FAST_SR1); 1155 1156 PIN(INPUT, gpd2-5, DOWN, FAST_SR1); 1157 1158 PIN(INPUT, gpd4-0, NONE, FAST_SR1); 1159 PIN(INPUT, gpd4-1, DOWN, FAST_SR1); 1160 PIN(INPUT, gpd4-2, DOWN, FAST_SR1); 1161 PIN(INPUT, gpd4-3, DOWN, FAST_SR1); 1162 PIN(INPUT, gpd4-4, DOWN, FAST_SR1); 1163 1164 PIN(INPUT, gpd6-3, DOWN, FAST_SR1); 1165 1166 PIN(INPUT, gpd8-1, UP, FAST_SR1); 1167 1168 PIN(INPUT, gpg1-0, DOWN, FAST_SR1); 1169 PIN(INPUT, gpg1-1, DOWN, FAST_SR1); 1170 PIN(INPUT, gpg1-2, DOWN, FAST_SR1); 1171 PIN(INPUT, gpg1-3, DOWN, FAST_SR1); 1172 PIN(INPUT, gpg1-4, DOWN, FAST_SR1); 1173 1174 PIN(INPUT, gpg2-0, DOWN, FAST_SR1); 1175 PIN(INPUT, gpg2-1, DOWN, FAST_SR1); 1176 1177 PIN(INPUT, gpg3-0, DOWN, FAST_SR1); 1178 PIN(INPUT, gpg3-1, DOWN, FAST_SR1); 1179 PIN(INPUT, gpg3-5, DOWN, FAST_SR1); 1180 }; 1181}; 1182 1183&pinctrl_touch { 1184 pinctrl-names = "default"; 1185 pinctrl-0 = <&initial_touch>; 1186 1187 initial_touch: initial-state { 1188 PIN(INPUT, gpj1-2, DOWN, FAST_SR1); 1189 }; 1190}; 1191 1192&pwm { 1193 pinctrl-0 = <&pwm0_out>; 1194 pinctrl-names = "default"; 1195 status = "okay"; 1196}; 1197 1198&mic { 1199 status = "okay"; 1200}; 1201 1202&pmu_system_controller { 1203 assigned-clocks = <&pmu_system_controller 0>; 1204 assigned-clock-parents = <&xxti>; 1205}; 1206 1207&serial_1 { 1208 status = "okay"; 1209}; 1210 1211&serial_3 { 1212 status = "okay"; 1213 1214 bluetooth { 1215 compatible = "brcm,bcm43438-bt"; 1216 max-speed = <3000000>; 1217 shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>; 1218 device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>; 1219 host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>; 1220 clocks = <&s2mps13_osc S2MPS11_CLK_BT>; 1221 clock-names = "extclk"; 1222 }; 1223}; 1224 1225&spi_1 { 1226 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; 1227 status = "okay"; 1228 1229 wm5110: wm5110-codec@0 { 1230 compatible = "wlf,wm5110"; 1231 reg = <0x0>; 1232 spi-max-frequency = <20000000>; 1233 interrupt-parent = <&gpa0>; 1234 interrupts = <4 IRQ_TYPE_NONE>; 1235 clocks = <&pmu_system_controller 0>, 1236 <&s2mps13_osc S2MPS11_CLK_BT>; 1237 clock-names = "mclk1", "mclk2"; 1238 1239 gpio-controller; 1240 #gpio-cells = <2>; 1241 1242 wlf,micd-detect-debounce = <300>; 1243 wlf,micd-bias-start-time = <0x1>; 1244 wlf,micd-rate = <0x7>; 1245 wlf,micd-dbtime = <0x1>; 1246 wlf,micd-force-micbias; 1247 wlf,micd-configs = <0x0 1 0>; 1248 wlf,hpdet-channel = <1>; 1249 wlf,gpsw = <0x1>; 1250 wlf,inmode = <2 0 2 0>; 1251 1252 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; 1253 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; 1254 1255 /* core supplies */ 1256 AVDD-supply = <&ldo18_reg>; 1257 DBVDD1-supply = <&ldo18_reg>; 1258 CPVDD-supply = <&ldo18_reg>; 1259 DBVDD2-supply = <&ldo18_reg>; 1260 DBVDD3-supply = <&ldo18_reg>; 1261 1262 controller-data { 1263 samsung,spi-feedback-delay = <0>; 1264 }; 1265 }; 1266}; 1267 1268&spi_3 { 1269 status = "okay"; 1270 no-cs-readback; 1271 1272 irled@0 { 1273 compatible = "ir-spi-led"; 1274 reg = <0x0>; 1275 spi-max-frequency = <5000000>; 1276 power-supply = <&irda_regulator>; 1277 duty-cycle = <60>; 1278 led-active-low; 1279 1280 controller-data { 1281 samsung,spi-feedback-delay = <0>; 1282 }; 1283 }; 1284}; 1285 1286&timer { 1287 clock-frequency = <24000000>; 1288}; 1289 1290&tmu_atlas0 { 1291 vtmu-supply = <&ldo3_reg>; 1292 status = "okay"; 1293}; 1294 1295&tmu_apollo { 1296 vtmu-supply = <&ldo3_reg>; 1297 status = "okay"; 1298}; 1299 1300&tmu_g3d { 1301 vtmu-supply = <&ldo3_reg>; 1302 status = "okay"; 1303}; 1304 1305&usbdrd30 { 1306 vdd33-supply = <&ldo10_reg>; 1307 vdd10-supply = <&ldo6_reg>; 1308 status = "okay"; 1309}; 1310 1311&usbdrd_dwc3 { 1312 dr_mode = "otg"; 1313}; 1314 1315&usbdrd30_phy { 1316 vbus-supply = <&safeout1_reg>; 1317 status = "okay"; 1318 1319 port { 1320 usb_to_muic: endpoint { 1321 remote-endpoint = <&muic_to_usb>; 1322 }; 1323 }; 1324}; 1325 1326&xxti { 1327 clock-frequency = <24000000>; 1328}; 1329