1/* 2 * SAMSUNG Exynos5433 TM2 board device tree source 3 * 4 * Copyright (c) 2016 Samsung Electronics Co., Ltd. 5 * 6 * Common device tree source file for Samsung's TM2 and TM2E boards 7 * which are based on Samsung Exynos5433 SoC. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14/dts-v1/; 15#include "exynos5433.dtsi" 16#include <dt-bindings/clock/samsung,s2mps11.h> 17#include <dt-bindings/gpio/gpio.h> 18#include <dt-bindings/input/input.h> 19#include <dt-bindings/interrupt-controller/irq.h> 20 21/ { 22 aliases { 23 gsc0 = &gsc_0; 24 gsc1 = &gsc_1; 25 gsc2 = &gsc_2; 26 pinctrl0 = &pinctrl_alive; 27 pinctrl1 = &pinctrl_aud; 28 pinctrl2 = &pinctrl_cpif; 29 pinctrl3 = &pinctrl_ese; 30 pinctrl4 = &pinctrl_finger; 31 pinctrl5 = &pinctrl_fsys; 32 pinctrl6 = &pinctrl_imem; 33 pinctrl7 = &pinctrl_nfc; 34 pinctrl8 = &pinctrl_peric; 35 pinctrl9 = &pinctrl_touch; 36 serial0 = &serial_0; 37 serial1 = &serial_1; 38 serial2 = &serial_2; 39 serial3 = &serial_3; 40 spi0 = &spi_0; 41 spi1 = &spi_1; 42 spi2 = &spi_2; 43 spi3 = &spi_3; 44 spi4 = &spi_4; 45 mshc0 = &mshc_0; 46 mshc2 = &mshc_2; 47 }; 48 49 chosen { 50 stdout-path = &serial_1; 51 }; 52 53 memory@20000000 { 54 device_type = "memory"; 55 reg = <0x0 0x20000000 0x0 0xc0000000>; 56 }; 57 58 gpio-keys { 59 compatible = "gpio-keys"; 60 61 power-key { 62 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>; 63 linux,code = <KEY_POWER>; 64 label = "power key"; 65 debounce-interval = <10>; 66 }; 67 68 volume-up-key { 69 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>; 70 linux,code = <KEY_VOLUMEUP>; 71 label = "volume-up key"; 72 debounce-interval = <10>; 73 }; 74 75 volume-down-key { 76 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>; 77 linux,code = <KEY_VOLUMEDOWN>; 78 label = "volume-down key"; 79 debounce-interval = <10>; 80 }; 81 82 homepage-key { 83 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; 84 linux,code = <KEY_MENU>; 85 label = "homepage key"; 86 debounce-interval = <10>; 87 }; 88 }; 89 90 i2c_max98504: i2c-gpio-0 { 91 compatible = "i2c-gpio"; 92 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */ 93 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >; 94 i2c-gpio,delay-us = <2>; 95 #address-cells = <1>; 96 #size-cells = <0>; 97 status = "okay"; 98 99 max98504: max98504@31 { 100 compatible = "maxim,max98504"; 101 reg = <0x31>; 102 maxim,rx-path = <1>; 103 maxim,tx-path = <1>; 104 maxim,tx-channel-mask = <3>; 105 maxim,tx-channel-source = <2>; 106 }; 107 }; 108 109 sound { 110 compatible = "samsung,tm2-audio"; 111 audio-codec = <&wm5110>; 112 i2s-controller = <&i2s0>; 113 audio-amplifier = <&max98504>; 114 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>; 115 model = "wm5110"; 116 samsung,audio-routing = 117 /* Headphone */ 118 "HP", "HPOUT1L", 119 "HP", "HPOUT1R", 120 121 /* Speaker */ 122 "SPK", "SPKOUT", 123 "SPKOUT", "HPOUT2L", 124 "SPKOUT", "HPOUT2R", 125 126 /* Receiver */ 127 "RCV", "HPOUT3L", 128 "RCV", "HPOUT3R"; 129 status = "okay"; 130 }; 131}; 132 133&adc { 134 vdd-supply = <&ldo3_reg>; 135 status = "okay"; 136 137 thermistor-ap { 138 compatible = "murata,ncp03wf104"; 139 pullup-uv = <1800000>; 140 pullup-ohm = <100000>; 141 pulldown-ohm = <0>; 142 io-channels = <&adc 0>; 143 }; 144 145 thermistor-battery { 146 compatible = "murata,ncp03wf104"; 147 pullup-uv = <1800000>; 148 pullup-ohm = <100000>; 149 pulldown-ohm = <0>; 150 io-channels = <&adc 1>; 151 #thermal-sensor-cells = <0>; 152 }; 153 154 thermistor-charger { 155 compatible = "murata,ncp03wf104"; 156 pullup-uv = <1800000>; 157 pullup-ohm = <100000>; 158 pulldown-ohm = <0>; 159 io-channels = <&adc 2>; 160 }; 161}; 162 163&bus_g2d_400 { 164 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>; 165 vdd-supply = <&buck4_reg>; 166 exynos,saturation-ratio = <10>; 167 status = "okay"; 168}; 169 170&bus_g2d_266 { 171 devfreq = <&bus_g2d_400>; 172 status = "okay"; 173}; 174 175&bus_gscl { 176 devfreq = <&bus_g2d_400>; 177 status = "okay"; 178}; 179 180&bus_hevc { 181 devfreq = <&bus_g2d_400>; 182 status = "okay"; 183}; 184 185&bus_jpeg { 186 devfreq = <&bus_g2d_400>; 187 status = "okay"; 188}; 189 190&bus_mfc { 191 devfreq = <&bus_g2d_400>; 192 status = "okay"; 193}; 194 195&bus_mscl { 196 devfreq = <&bus_g2d_400>; 197 status = "okay"; 198}; 199 200&bus_noc0 { 201 devfreq = <&bus_g2d_400>; 202 status = "okay"; 203}; 204 205&bus_noc1 { 206 devfreq = <&bus_g2d_400>; 207 status = "okay"; 208}; 209 210&bus_noc2 { 211 devfreq = <&bus_g2d_400>; 212 status = "okay"; 213}; 214 215&cmu_aud { 216 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>; 217 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>; 218}; 219 220&cmu_disp { 221 assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>, 222 <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>, 223 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, 224 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>; 225 assigned-clock-parents = <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>, 226 <0>, 227 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, 228 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>; 229 assigned-clock-rates = <0>, <400000000>; 230}; 231 232&cmu_fsys { 233 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, 234 <&cmu_top CLK_MOUT_SCLK_USBHOST30>, 235 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, 236 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, 237 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, 238 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, 239 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, 240 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, 241 <&cmu_top CLK_DIV_SCLK_USBDRD30>, 242 <&cmu_top CLK_DIV_SCLK_USBHOST30>; 243 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, 244 <&cmu_top CLK_MOUT_BUS_PLL_USER>, 245 <&cmu_top CLK_SCLK_USBDRD30_FSYS>, 246 <&cmu_top CLK_SCLK_USBHOST30_FSYS>, 247 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, 248 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, 249 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, 250 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; 251 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, 252 <66700000>, <66700000>; 253}; 254 255&cmu_gscl { 256 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, 257 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; 258 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, 259 <&cmu_top CLK_ACLK_GSCL_333>; 260}; 261 262&cmu_mfc { 263 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>; 264 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>; 265}; 266 267&cmu_mscl { 268 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, 269 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 270 <&cmu_mscl CLK_MOUT_SCLK_JPEG>, 271 <&cmu_top CLK_MOUT_SCLK_JPEG_A>; 272 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>, 273 <&cmu_top CLK_SCLK_JPEG_MSCL>, 274 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 275 <&cmu_top CLK_MOUT_BUS_PLL_USER>; 276}; 277 278&cpu0 { 279 cpu-supply = <&buck3_reg>; 280}; 281 282&cpu4 { 283 cpu-supply = <&buck2_reg>; 284}; 285 286&decon { 287 status = "okay"; 288 289 i80-if-timings { 290 }; 291}; 292 293&decon_tv { 294 status = "okay"; 295 296 ports { 297 #address-cells = <1>; 298 #size-cells = <0>; 299 300 port@0 { 301 reg = <0>; 302 tv_to_hdmi: endpoint { 303 remote-endpoint = <&hdmi_to_tv>; 304 }; 305 }; 306 }; 307}; 308 309&dsi { 310 status = "okay"; 311 vddcore-supply = <&ldo6_reg>; 312 vddio-supply = <&ldo7_reg>; 313 samsung,pll-clock-frequency = <24000000>; 314 pinctrl-names = "default"; 315 pinctrl-0 = <&te_irq>; 316 317 ports { 318 #address-cells = <1>; 319 #size-cells = <0>; 320 321 port@1 { 322 reg = <1>; 323 324 dsi_out: endpoint { 325 samsung,burst-clock-frequency = <512000000>; 326 samsung,esc-clock-frequency = <16000000>; 327 }; 328 }; 329 }; 330}; 331 332&hdmi { 333 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>; 334 status = "okay"; 335 vdd-supply = <&ldo6_reg>; 336 vdd_osc-supply = <&ldo7_reg>; 337 vdd_pll-supply = <&ldo6_reg>; 338 339 ports { 340 #address-cells = <1>; 341 #size-cells = <0>; 342 343 port@0 { 344 reg = <0>; 345 hdmi_to_tv: endpoint { 346 remote-endpoint = <&tv_to_hdmi>; 347 }; 348 }; 349 350 port@1 { 351 reg = <1>; 352 hdmi_to_mhl: endpoint { 353 remote-endpoint = <&mhl_to_hdmi>; 354 }; 355 }; 356 }; 357}; 358 359&hsi2c_0 { 360 status = "okay"; 361 clock-frequency = <2500000>; 362 363 s2mps13-pmic@66 { 364 compatible = "samsung,s2mps13-pmic"; 365 interrupt-parent = <&gpa0>; 366 interrupts = <7 IRQ_TYPE_NONE>; 367 reg = <0x66>; 368 samsung,s2mps11-wrstbi-ground; 369 370 s2mps13_osc: clocks { 371 compatible = "samsung,s2mps13-clk"; 372 #clock-cells = <1>; 373 clock-output-names = "s2mps13_ap", "s2mps13_cp", 374 "s2mps13_bt"; 375 }; 376 377 regulators { 378 ldo1_reg: LDO1 { 379 regulator-name = "VDD_ALIVE_0.9V_AP"; 380 regulator-min-microvolt = <900000>; 381 regulator-max-microvolt = <900000>; 382 regulator-always-on; 383 }; 384 385 ldo2_reg: LDO2 { 386 regulator-name = "VDDQ_MMC2_2.8V_AP"; 387 regulator-min-microvolt = <2800000>; 388 regulator-max-microvolt = <2800000>; 389 regulator-always-on; 390 regulator-state-mem { 391 regulator-off-in-suspend; 392 }; 393 }; 394 395 ldo3_reg: LDO3 { 396 regulator-name = "VDD1_E_1.8V_AP"; 397 regulator-min-microvolt = <1800000>; 398 regulator-max-microvolt = <1800000>; 399 regulator-always-on; 400 }; 401 402 ldo4_reg: LDO4 { 403 regulator-name = "VDD10_MIF_PLL_1.0V_AP"; 404 regulator-min-microvolt = <1300000>; 405 regulator-max-microvolt = <1300000>; 406 regulator-always-on; 407 regulator-state-mem { 408 regulator-off-in-suspend; 409 }; 410 }; 411 412 ldo5_reg: LDO5 { 413 regulator-name = "VDD10_DPLL_1.0V_AP"; 414 regulator-min-microvolt = <1000000>; 415 regulator-max-microvolt = <1000000>; 416 regulator-always-on; 417 regulator-state-mem { 418 regulator-off-in-suspend; 419 }; 420 }; 421 422 ldo6_reg: LDO6 { 423 regulator-name = "VDD10_MIPI2L_1.0V_AP"; 424 regulator-min-microvolt = <1000000>; 425 regulator-max-microvolt = <1000000>; 426 regulator-state-mem { 427 regulator-off-in-suspend; 428 }; 429 }; 430 431 ldo7_reg: LDO7 { 432 regulator-name = "VDD18_MIPI2L_1.8V_AP"; 433 regulator-min-microvolt = <1800000>; 434 regulator-max-microvolt = <1800000>; 435 regulator-always-on; 436 regulator-state-mem { 437 regulator-off-in-suspend; 438 }; 439 }; 440 441 ldo8_reg: LDO8 { 442 regulator-name = "VDD18_LLI_1.8V_AP"; 443 regulator-min-microvolt = <1800000>; 444 regulator-max-microvolt = <1800000>; 445 regulator-always-on; 446 regulator-state-mem { 447 regulator-off-in-suspend; 448 }; 449 }; 450 451 ldo9_reg: LDO9 { 452 regulator-name = "VDD18_ABB_ETC_1.8V_AP"; 453 regulator-min-microvolt = <1800000>; 454 regulator-max-microvolt = <1800000>; 455 regulator-always-on; 456 regulator-state-mem { 457 regulator-off-in-suspend; 458 }; 459 }; 460 461 ldo10_reg: LDO10 { 462 regulator-name = "VDD33_USB30_3.0V_AP"; 463 regulator-min-microvolt = <3000000>; 464 regulator-max-microvolt = <3000000>; 465 regulator-state-mem { 466 regulator-off-in-suspend; 467 }; 468 }; 469 470 ldo11_reg: LDO11 { 471 regulator-name = "VDD_INT_M_1.0V_AP"; 472 regulator-min-microvolt = <1000000>; 473 regulator-max-microvolt = <1000000>; 474 regulator-always-on; 475 regulator-state-mem { 476 regulator-off-in-suspend; 477 }; 478 }; 479 480 ldo12_reg: LDO12 { 481 regulator-name = "VDD_KFC_M_1.1V_AP"; 482 regulator-min-microvolt = <800000>; 483 regulator-max-microvolt = <1350000>; 484 regulator-always-on; 485 }; 486 487 ldo13_reg: LDO13 { 488 regulator-name = "VDD_G3D_M_0.95V_AP"; 489 regulator-min-microvolt = <950000>; 490 regulator-max-microvolt = <950000>; 491 regulator-always-on; 492 regulator-state-mem { 493 regulator-off-in-suspend; 494 }; 495 }; 496 497 ldo14_reg: LDO14 { 498 regulator-name = "VDDQ_M1_LDO_1.2V_AP"; 499 regulator-min-microvolt = <1200000>; 500 regulator-max-microvolt = <1200000>; 501 regulator-always-on; 502 regulator-state-mem { 503 regulator-off-in-suspend; 504 }; 505 }; 506 507 ldo15_reg: LDO15 { 508 regulator-name = "VDDQ_M2_LDO_1.2V_AP"; 509 regulator-min-microvolt = <1200000>; 510 regulator-max-microvolt = <1200000>; 511 regulator-always-on; 512 regulator-state-mem { 513 regulator-off-in-suspend; 514 }; 515 }; 516 517 ldo16_reg: LDO16 { 518 regulator-name = "VDDQ_EFUSE"; 519 regulator-min-microvolt = <1400000>; 520 regulator-max-microvolt = <3400000>; 521 regulator-always-on; 522 }; 523 524 ldo17_reg: LDO17 { 525 regulator-name = "V_TFLASH_2.8V_AP"; 526 regulator-min-microvolt = <2800000>; 527 regulator-max-microvolt = <2800000>; 528 }; 529 530 ldo18_reg: LDO18 { 531 regulator-name = "V_CODEC_1.8V_AP"; 532 regulator-min-microvolt = <1800000>; 533 regulator-max-microvolt = <1800000>; 534 }; 535 536 ldo19_reg: LDO19 { 537 regulator-name = "VDDA_1.8V_COMP"; 538 regulator-min-microvolt = <1800000>; 539 regulator-max-microvolt = <1800000>; 540 regulator-always-on; 541 }; 542 543 ldo20_reg: LDO20 { 544 regulator-name = "VCC_2.8V_AP"; 545 regulator-min-microvolt = <2800000>; 546 regulator-max-microvolt = <2800000>; 547 regulator-always-on; 548 }; 549 550 ldo21_reg: LDO21 { 551 regulator-name = "VT_CAM_1.8V"; 552 regulator-min-microvolt = <1800000>; 553 regulator-max-microvolt = <1800000>; 554 }; 555 556 ldo22_reg: LDO22 { 557 regulator-name = "CAM_IO_1.8V_AP"; 558 regulator-min-microvolt = <1800000>; 559 regulator-max-microvolt = <1800000>; 560 }; 561 562 ldo23_reg: LDO23 { 563 regulator-name = "CAM_SEN_CORE_1.05V_AP"; 564 regulator-min-microvolt = <1050000>; 565 regulator-max-microvolt = <1050000>; 566 }; 567 568 ldo24_reg: LDO24 { 569 regulator-name = "VT_CAM_1.2V"; 570 regulator-min-microvolt = <1200000>; 571 regulator-max-microvolt = <1200000>; 572 }; 573 574 ldo25_reg: LDO25 { 575 regulator-name = "UNUSED_LDO25"; 576 regulator-min-microvolt = <2800000>; 577 regulator-max-microvolt = <2800000>; 578 }; 579 580 ldo26_reg: LDO26 { 581 regulator-name = "CAM_AF_2.8V_AP"; 582 regulator-min-microvolt = <2800000>; 583 regulator-max-microvolt = <2800000>; 584 }; 585 586 ldo27_reg: LDO27 { 587 regulator-name = "VCC_3.0V_LCD_AP"; 588 regulator-min-microvolt = <3000000>; 589 regulator-max-microvolt = <3000000>; 590 }; 591 592 ldo28_reg: LDO28 { 593 regulator-name = "VCC_1.8V_LCD_AP"; 594 regulator-min-microvolt = <1800000>; 595 regulator-max-microvolt = <1800000>; 596 }; 597 598 ldo29_reg: LDO29 { 599 regulator-name = "VT_CAM_2.8V"; 600 regulator-min-microvolt = <3000000>; 601 regulator-max-microvolt = <3000000>; 602 }; 603 604 ldo30_reg: LDO30 { 605 regulator-name = "TSP_AVDD_3.3V_AP"; 606 regulator-min-microvolt = <3300000>; 607 regulator-max-microvolt = <3300000>; 608 }; 609 610 ldo31_reg: LDO31 { 611 /* 612 * LDO31 differs from target to target, 613 * its definition is in the .dts 614 */ 615 }; 616 617 ldo32_reg: LDO32 { 618 regulator-name = "VTOUCH_1.8V_AP"; 619 regulator-min-microvolt = <1800000>; 620 regulator-max-microvolt = <1800000>; 621 }; 622 623 ldo33_reg: LDO33 { 624 regulator-name = "VTOUCH_LED_3.3V"; 625 regulator-min-microvolt = <2500000>; 626 regulator-max-microvolt = <3300000>; 627 regulator-ramp-delay = <12500>; 628 }; 629 630 ldo34_reg: LDO34 { 631 regulator-name = "VCC_1.8V_MHL_AP"; 632 regulator-min-microvolt = <1000000>; 633 regulator-max-microvolt = <2100000>; 634 }; 635 636 ldo35_reg: LDO35 { 637 regulator-name = "OIS_VM_2.8V"; 638 regulator-min-microvolt = <1800000>; 639 regulator-max-microvolt = <2800000>; 640 }; 641 642 ldo36_reg: LDO36 { 643 regulator-name = "VSIL_1.0V"; 644 regulator-min-microvolt = <1000000>; 645 regulator-max-microvolt = <1000000>; 646 }; 647 648 ldo37_reg: LDO37 { 649 regulator-name = "VF_1.8V"; 650 regulator-min-microvolt = <1800000>; 651 regulator-max-microvolt = <1800000>; 652 }; 653 654 ldo38_reg: LDO38 { 655 /* 656 * LDO38 differs from target to target, 657 * its definition is in the .dts 658 */ 659 }; 660 661 ldo39_reg: LDO39 { 662 regulator-name = "V_HRM_1.8V"; 663 regulator-min-microvolt = <1800000>; 664 regulator-max-microvolt = <1800000>; 665 }; 666 667 ldo40_reg: LDO40 { 668 regulator-name = "V_HRM_3.3V"; 669 regulator-min-microvolt = <3300000>; 670 regulator-max-microvolt = <3300000>; 671 }; 672 673 buck1_reg: BUCK1 { 674 regulator-name = "VDD_MIF_0.9V_AP"; 675 regulator-min-microvolt = <600000>; 676 regulator-max-microvolt = <1500000>; 677 regulator-always-on; 678 regulator-state-mem { 679 regulator-off-in-suspend; 680 }; 681 }; 682 683 buck2_reg: BUCK2 { 684 regulator-name = "VDD_EGL_1.0V_AP"; 685 regulator-min-microvolt = <900000>; 686 regulator-max-microvolt = <1300000>; 687 regulator-always-on; 688 regulator-state-mem { 689 regulator-off-in-suspend; 690 }; 691 }; 692 693 buck3_reg: BUCK3 { 694 regulator-name = "VDD_KFC_1.0V_AP"; 695 regulator-min-microvolt = <800000>; 696 regulator-max-microvolt = <1200000>; 697 regulator-always-on; 698 regulator-state-mem { 699 regulator-off-in-suspend; 700 }; 701 }; 702 703 buck4_reg: BUCK4 { 704 regulator-name = "VDD_INT_0.95V_AP"; 705 regulator-min-microvolt = <600000>; 706 regulator-max-microvolt = <1500000>; 707 regulator-always-on; 708 regulator-state-mem { 709 regulator-off-in-suspend; 710 }; 711 }; 712 713 buck5_reg: BUCK5 { 714 regulator-name = "VDD_DISP_CAM0_0.9V_AP"; 715 regulator-min-microvolt = <600000>; 716 regulator-max-microvolt = <1500000>; 717 regulator-always-on; 718 regulator-state-mem { 719 regulator-off-in-suspend; 720 }; 721 }; 722 723 buck6_reg: BUCK6 { 724 regulator-name = "VDD_G3D_0.9V_AP"; 725 regulator-min-microvolt = <600000>; 726 regulator-max-microvolt = <1500000>; 727 regulator-always-on; 728 regulator-state-mem { 729 regulator-off-in-suspend; 730 }; 731 }; 732 733 buck7_reg: BUCK7 { 734 regulator-name = "VDD_MEM1_1.2V_AP"; 735 regulator-min-microvolt = <1200000>; 736 regulator-max-microvolt = <1200000>; 737 regulator-always-on; 738 }; 739 740 buck8_reg: BUCK8 { 741 regulator-name = "VDD_LLDO_1.35V_AP"; 742 regulator-min-microvolt = <1350000>; 743 regulator-max-microvolt = <3300000>; 744 regulator-always-on; 745 }; 746 747 buck9_reg: BUCK9 { 748 regulator-name = "VDD_MLDO_2.0V_AP"; 749 regulator-min-microvolt = <1350000>; 750 regulator-max-microvolt = <3300000>; 751 regulator-always-on; 752 }; 753 754 buck10_reg: BUCK10 { 755 regulator-name = "vdd_mem2"; 756 regulator-min-microvolt = <550000>; 757 regulator-max-microvolt = <1500000>; 758 regulator-always-on; 759 }; 760 }; 761 }; 762}; 763 764&hsi2c_7 { 765 status = "okay"; 766 767 sii8620@39 { 768 reg = <0x39>; 769 compatible = "sil,sii8620"; 770 cvcc10-supply = <&ldo36_reg>; 771 iovcc18-supply = <&ldo34_reg>; 772 interrupt-parent = <&gpf0>; 773 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 774 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; 775 clocks = <&pmu_system_controller 0>; 776 clock-names = "xtal"; 777 778 port { 779 mhl_to_hdmi: endpoint { 780 remote-endpoint = <&hdmi_to_mhl>; 781 }; 782 }; 783 }; 784}; 785 786&hsi2c_8 { 787 status = "okay"; 788 789 max77843@66 { 790 compatible = "maxim,max77843"; 791 interrupt-parent = <&gpa1>; 792 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 793 reg = <0x66>; 794 795 muic: max77843-muic { 796 compatible = "maxim,max77843-muic"; 797 }; 798 799 regulators { 800 compatible = "maxim,max77843-regulator"; 801 safeout1_reg: SAFEOUT1 { 802 regulator-name = "SAFEOUT1"; 803 regulator-min-microvolt = <3300000>; 804 regulator-max-microvolt = <4950000>; 805 }; 806 807 safeout2_reg: SAFEOUT2 { 808 regulator-name = "SAFEOUT2"; 809 regulator-min-microvolt = <3300000>; 810 regulator-max-microvolt = <4950000>; 811 }; 812 813 charger_reg: CHARGER { 814 regulator-name = "CHARGER"; 815 regulator-min-microamp = <100000>; 816 regulator-max-microamp = <3150000>; 817 }; 818 }; 819 820 haptic: max77843-haptic { 821 compatible = "maxim,max77843-haptic"; 822 haptic-supply = <&ldo38_reg>; 823 pwms = <&pwm 0 33670 0>; 824 pwm-names = "haptic"; 825 }; 826 }; 827}; 828 829&hsi2c_11 { 830 status = "okay"; 831}; 832 833&i2s0 { 834 status = "okay"; 835}; 836 837&mshc_0 { 838 status = "okay"; 839 num-slots = <1>; 840 mmc-hs200-1_8v; 841 mmc-hs400-1_8v; 842 cap-mmc-highspeed; 843 non-removable; 844 card-detect-delay = <200>; 845 samsung,dw-mshc-ciu-div = <3>; 846 samsung,dw-mshc-sdr-timing = <0 4>; 847 samsung,dw-mshc-ddr-timing = <0 2>; 848 samsung,dw-mshc-hs400-timing = <0 3>; 849 samsung,read-strobe-delay = <90>; 850 fifo-depth = <0x80>; 851 pinctrl-names = "default"; 852 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 853 &sd0_bus8 &sd0_rdqs>; 854 bus-width = <8>; 855 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; 856 assigned-clock-rates = <800000000>; 857}; 858 859&mshc_2 { 860 status = "okay"; 861 num-slots = <1>; 862 cap-sd-highspeed; 863 disable-wp; 864 cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>; 865 cd-inverted; 866 card-detect-delay = <200>; 867 samsung,dw-mshc-ciu-div = <3>; 868 samsung,dw-mshc-sdr-timing = <0 4>; 869 samsung,dw-mshc-ddr-timing = <0 2>; 870 fifo-depth = <0x80>; 871 pinctrl-names = "default"; 872 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; 873 bus-width = <4>; 874}; 875 876&ppmu_d0_general { 877 status = "okay"; 878 events { 879 ppmu_event0_d0_general: ppmu-event0-d0-general { 880 event-name = "ppmu-event0-d0-general"; 881 }; 882 }; 883}; 884 885&ppmu_d1_general { 886 status = "okay"; 887 events { 888 ppmu_event0_d1_general: ppmu-event0-d1-general { 889 event-name = "ppmu-event0-d1-general"; 890 }; 891 }; 892}; 893 894&pinctrl_alive { 895 pinctrl-names = "default"; 896 pinctrl-0 = <&initial_alive>; 897 898 initial_alive: initial-state { 899 PIN(INPUT, gpa0-0, DOWN, FAST_SR1); 900 PIN(INPUT, gpa0-1, NONE, FAST_SR1); 901 PIN(INPUT, gpa0-2, DOWN, FAST_SR1); 902 PIN(INPUT, gpa0-3, NONE, FAST_SR1); 903 PIN(INPUT, gpa0-4, NONE, FAST_SR1); 904 PIN(INPUT, gpa0-5, DOWN, FAST_SR1); 905 PIN(INPUT, gpa0-6, NONE, FAST_SR1); 906 PIN(INPUT, gpa0-7, NONE, FAST_SR1); 907 908 PIN(INPUT, gpa1-0, UP, FAST_SR1); 909 PIN(INPUT, gpa1-1, NONE, FAST_SR1); 910 PIN(INPUT, gpa1-2, NONE, FAST_SR1); 911 PIN(INPUT, gpa1-3, DOWN, FAST_SR1); 912 PIN(INPUT, gpa1-4, DOWN, FAST_SR1); 913 PIN(INPUT, gpa1-5, NONE, FAST_SR1); 914 PIN(INPUT, gpa1-6, NONE, FAST_SR1); 915 PIN(INPUT, gpa1-7, NONE, FAST_SR1); 916 917 PIN(INPUT, gpa2-0, NONE, FAST_SR1); 918 PIN(INPUT, gpa2-1, NONE, FAST_SR1); 919 PIN(INPUT, gpa2-2, NONE, FAST_SR1); 920 PIN(INPUT, gpa2-3, DOWN, FAST_SR1); 921 PIN(INPUT, gpa2-4, NONE, FAST_SR1); 922 PIN(INPUT, gpa2-5, DOWN, FAST_SR1); 923 PIN(INPUT, gpa2-6, DOWN, FAST_SR1); 924 PIN(INPUT, gpa2-7, NONE, FAST_SR1); 925 926 PIN(INPUT, gpa3-0, DOWN, FAST_SR1); 927 PIN(INPUT, gpa3-1, DOWN, FAST_SR1); 928 PIN(INPUT, gpa3-2, NONE, FAST_SR1); 929 PIN(INPUT, gpa3-3, DOWN, FAST_SR1); 930 PIN(INPUT, gpa3-4, NONE, FAST_SR1); 931 PIN(INPUT, gpa3-5, DOWN, FAST_SR1); 932 PIN(INPUT, gpa3-6, DOWN, FAST_SR1); 933 PIN(INPUT, gpa3-7, DOWN, FAST_SR1); 934 935 PIN(INPUT, gpf1-0, NONE, FAST_SR1); 936 PIN(INPUT, gpf1-1, NONE, FAST_SR1); 937 PIN(INPUT, gpf1-2, DOWN, FAST_SR1); 938 PIN(INPUT, gpf1-4, UP, FAST_SR1); 939 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1); 940 PIN(INPUT, gpf1-6, DOWN, FAST_SR1); 941 PIN(INPUT, gpf1-7, DOWN, FAST_SR1); 942 943 PIN(INPUT, gpf2-0, DOWN, FAST_SR1); 944 PIN(INPUT, gpf2-1, DOWN, FAST_SR1); 945 PIN(INPUT, gpf2-2, DOWN, FAST_SR1); 946 PIN(INPUT, gpf2-3, DOWN, FAST_SR1); 947 948 PIN(INPUT, gpf3-0, DOWN, FAST_SR1); 949 PIN(INPUT, gpf3-1, DOWN, FAST_SR1); 950 PIN(INPUT, gpf3-2, NONE, FAST_SR1); 951 PIN(INPUT, gpf3-3, DOWN, FAST_SR1); 952 953 PIN(INPUT, gpf4-0, DOWN, FAST_SR1); 954 PIN(INPUT, gpf4-1, DOWN, FAST_SR1); 955 PIN(INPUT, gpf4-2, DOWN, FAST_SR1); 956 PIN(INPUT, gpf4-3, DOWN, FAST_SR1); 957 PIN(INPUT, gpf4-4, DOWN, FAST_SR1); 958 PIN(INPUT, gpf4-5, DOWN, FAST_SR1); 959 PIN(INPUT, gpf4-6, DOWN, FAST_SR1); 960 PIN(INPUT, gpf4-7, DOWN, FAST_SR1); 961 962 PIN(INPUT, gpf5-0, DOWN, FAST_SR1); 963 PIN(INPUT, gpf5-1, DOWN, FAST_SR1); 964 PIN(INPUT, gpf5-2, DOWN, FAST_SR1); 965 PIN(INPUT, gpf5-3, DOWN, FAST_SR1); 966 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1); 967 PIN(INPUT, gpf5-5, DOWN, FAST_SR1); 968 PIN(INPUT, gpf5-6, DOWN, FAST_SR1); 969 PIN(INPUT, gpf5-7, DOWN, FAST_SR1); 970 }; 971 972 te_irq: te_irq { 973 samsung,pins = "gpf1-3"; 974 samsung,pin-function = <0xf>; 975 }; 976}; 977 978&pinctrl_cpif { 979 pinctrl-names = "default"; 980 pinctrl-0 = <&initial_cpif>; 981 982 initial_cpif: initial-state { 983 PIN(INPUT, gpv6-0, DOWN, FAST_SR1); 984 PIN(INPUT, gpv6-1, DOWN, FAST_SR1); 985 }; 986}; 987 988&pinctrl_ese { 989 pinctrl-names = "default"; 990 pinctrl-0 = <&initial_ese>; 991 992 initial_ese: initial-state { 993 PIN(INPUT, gpj2-0, DOWN, FAST_SR1); 994 PIN(INPUT, gpj2-1, DOWN, FAST_SR1); 995 PIN(INPUT, gpj2-2, DOWN, FAST_SR1); 996 }; 997}; 998 999&pinctrl_fsys { 1000 pinctrl-names = "default"; 1001 pinctrl-0 = <&initial_fsys>; 1002 1003 initial_fsys: initial-state { 1004 PIN(INPUT, gpr3-0, NONE, FAST_SR1); 1005 PIN(INPUT, gpr3-1, DOWN, FAST_SR1); 1006 PIN(INPUT, gpr3-2, DOWN, FAST_SR1); 1007 PIN(INPUT, gpr3-3, DOWN, FAST_SR1); 1008 PIN(INPUT, gpr3-7, NONE, FAST_SR1); 1009 }; 1010}; 1011 1012&pinctrl_imem { 1013 pinctrl-names = "default"; 1014 pinctrl-0 = <&initial_imem>; 1015 1016 initial_imem: initial-state { 1017 PIN(INPUT, gpf0-0, UP, FAST_SR1); 1018 PIN(INPUT, gpf0-1, UP, FAST_SR1); 1019 PIN(INPUT, gpf0-2, DOWN, FAST_SR1); 1020 PIN(INPUT, gpf0-3, UP, FAST_SR1); 1021 PIN(INPUT, gpf0-4, DOWN, FAST_SR1); 1022 PIN(INPUT, gpf0-5, NONE, FAST_SR1); 1023 PIN(INPUT, gpf0-6, DOWN, FAST_SR1); 1024 PIN(INPUT, gpf0-7, UP, FAST_SR1); 1025 }; 1026}; 1027 1028&pinctrl_nfc { 1029 pinctrl-names = "default"; 1030 pinctrl-0 = <&initial_nfc>; 1031 1032 initial_nfc: initial-state { 1033 PIN(INPUT, gpj0-2, DOWN, FAST_SR1); 1034 }; 1035}; 1036 1037&pinctrl_peric { 1038 pinctrl-names = "default"; 1039 pinctrl-0 = <&initial_peric>; 1040 1041 initial_peric: initial-state { 1042 PIN(INPUT, gpv7-0, DOWN, FAST_SR1); 1043 PIN(INPUT, gpv7-1, DOWN, FAST_SR1); 1044 PIN(INPUT, gpv7-2, NONE, FAST_SR1); 1045 PIN(INPUT, gpv7-3, DOWN, FAST_SR1); 1046 PIN(INPUT, gpv7-4, DOWN, FAST_SR1); 1047 PIN(INPUT, gpv7-5, DOWN, FAST_SR1); 1048 1049 PIN(INPUT, gpb0-4, DOWN, FAST_SR1); 1050 1051 PIN(INPUT, gpc0-2, DOWN, FAST_SR1); 1052 PIN(INPUT, gpc0-5, DOWN, FAST_SR1); 1053 PIN(INPUT, gpc0-7, DOWN, FAST_SR1); 1054 1055 PIN(INPUT, gpc1-1, DOWN, FAST_SR1); 1056 1057 PIN(INPUT, gpc3-4, NONE, FAST_SR1); 1058 PIN(INPUT, gpc3-5, NONE, FAST_SR1); 1059 PIN(INPUT, gpc3-6, NONE, FAST_SR1); 1060 PIN(INPUT, gpc3-7, NONE, FAST_SR1); 1061 1062 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1); 1063 PIN(2, gpg0-1, DOWN, FAST_SR1); 1064 1065 PIN(INPUT, gpd2-5, DOWN, FAST_SR1); 1066 1067 PIN(INPUT, gpd4-0, NONE, FAST_SR1); 1068 PIN(INPUT, gpd4-1, DOWN, FAST_SR1); 1069 PIN(INPUT, gpd4-2, DOWN, FAST_SR1); 1070 PIN(INPUT, gpd4-3, DOWN, FAST_SR1); 1071 PIN(INPUT, gpd4-4, DOWN, FAST_SR1); 1072 1073 PIN(INPUT, gpd6-3, DOWN, FAST_SR1); 1074 1075 PIN(INPUT, gpd8-1, UP, FAST_SR1); 1076 1077 PIN(INPUT, gpg1-0, DOWN, FAST_SR1); 1078 PIN(INPUT, gpg1-1, DOWN, FAST_SR1); 1079 PIN(INPUT, gpg1-2, DOWN, FAST_SR1); 1080 PIN(INPUT, gpg1-3, DOWN, FAST_SR1); 1081 PIN(INPUT, gpg1-4, DOWN, FAST_SR1); 1082 1083 PIN(INPUT, gpg2-0, DOWN, FAST_SR1); 1084 PIN(INPUT, gpg2-1, DOWN, FAST_SR1); 1085 1086 PIN(INPUT, gpg3-0, DOWN, FAST_SR1); 1087 PIN(INPUT, gpg3-1, DOWN, FAST_SR1); 1088 PIN(INPUT, gpg3-5, DOWN, FAST_SR1); 1089 PIN(INPUT, gpg3-7, DOWN, FAST_SR1); 1090 }; 1091}; 1092 1093&pinctrl_touch { 1094 pinctrl-names = "default"; 1095 pinctrl-0 = <&initial_touch>; 1096 1097 initial_touch: initial-state { 1098 PIN(INPUT, gpj1-2, DOWN, FAST_SR1); 1099 }; 1100}; 1101 1102&pwm { 1103 pinctrl-0 = <&pwm0_out>; 1104 pinctrl-names = "default"; 1105 status = "okay"; 1106}; 1107 1108&mic { 1109 status = "okay"; 1110 1111 i80-if-timings { 1112 }; 1113}; 1114 1115&pmu_system_controller { 1116 assigned-clocks = <&pmu_system_controller 0>; 1117 assigned-clock-parents = <&xxti>; 1118}; 1119 1120&serial_1 { 1121 status = "okay"; 1122}; 1123 1124&spi_1 { 1125 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; 1126 status = "okay"; 1127 1128 wm5110: wm5110-codec@0 { 1129 compatible = "wlf,wm5110"; 1130 reg = <0x0>; 1131 spi-max-frequency = <20000000>; 1132 interrupt-parent = <&gpa0>; 1133 interrupts = <4 IRQ_TYPE_NONE>; 1134 clocks = <&pmu_system_controller 0>, 1135 <&s2mps13_osc S2MPS11_CLK_BT>; 1136 clock-names = "mclk1", "mclk2"; 1137 1138 gpio-controller; 1139 #gpio-cells = <2>; 1140 1141 wlf,micd-detect-debounce = <300>; 1142 wlf,micd-bias-start-time = <0x1>; 1143 wlf,micd-rate = <0x7>; 1144 wlf,micd-dbtime = <0x1>; 1145 wlf,micd-force-micbias; 1146 wlf,micd-configs = <0x0 1 0>; 1147 wlf,hpdet-channel = <1>; 1148 wlf,gpsw = <0x1>; 1149 wlf,inmode = <2 0 2 0>; 1150 1151 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; 1152 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; 1153 1154 /* core supplies */ 1155 AVDD-supply = <&ldo18_reg>; 1156 DBVDD1-supply = <&ldo18_reg>; 1157 CPVDD-supply = <&ldo18_reg>; 1158 DBVDD2-supply = <&ldo18_reg>; 1159 DBVDD3-supply = <&ldo18_reg>; 1160 1161 controller-data { 1162 samsung,spi-feedback-delay = <0>; 1163 }; 1164 }; 1165}; 1166 1167&timer { 1168 clock-frequency = <24000000>; 1169}; 1170 1171&tmu_atlas0 { 1172 vtmu-supply = <&ldo3_reg>; 1173 status = "okay"; 1174}; 1175 1176&tmu_apollo { 1177 vtmu-supply = <&ldo3_reg>; 1178 status = "okay"; 1179}; 1180 1181&tmu_g3d { 1182 vtmu-supply = <&ldo3_reg>; 1183 status = "okay"; 1184}; 1185 1186&usbdrd30 { 1187 vdd33-supply = <&ldo10_reg>; 1188 vdd10-supply = <&ldo6_reg>; 1189 status = "okay"; 1190}; 1191 1192&usbdrd_dwc3_0 { 1193 dr_mode = "otg"; 1194}; 1195 1196&usbdrd30_phy { 1197 vbus-supply = <&safeout1_reg>; 1198 status = "okay"; 1199}; 1200 1201&xxti { 1202 clock-frequency = <24000000>; 1203}; 1204