1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung Exynos5433 TM2 board device tree source
4 *
5 * Copyright (c) 2016 Samsung Electronics Co., Ltd.
6 *
7 * Common device tree source file for Samsung's TM2 and TM2E boards
8 * which are based on Samsung Exynos5433 SoC.
9 */
10
11/dts-v1/;
12#include "exynos5433.dtsi"
13#include <dt-bindings/clock/samsung,s2mps11.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/sound/samsung-i2s.h>
18
19/ {
20	aliases {
21		gsc0 = &gsc_0;
22		gsc1 = &gsc_1;
23		gsc2 = &gsc_2;
24		pinctrl0 = &pinctrl_alive;
25		pinctrl1 = &pinctrl_aud;
26		pinctrl2 = &pinctrl_cpif;
27		pinctrl3 = &pinctrl_ese;
28		pinctrl4 = &pinctrl_finger;
29		pinctrl5 = &pinctrl_fsys;
30		pinctrl6 = &pinctrl_imem;
31		pinctrl7 = &pinctrl_nfc;
32		pinctrl8 = &pinctrl_peric;
33		pinctrl9 = &pinctrl_touch;
34		serial0 = &serial_0;
35		serial1 = &serial_1;
36		serial2 = &serial_2;
37		serial3 = &serial_3;
38		spi0 = &spi_0;
39		spi1 = &spi_1;
40		spi2 = &spi_2;
41		spi3 = &spi_3;
42		spi4 = &spi_4;
43		mshc0 = &mshc_0;
44		mshc2 = &mshc_2;
45	};
46
47	chosen {
48		stdout-path = &serial_1;
49	};
50
51	memory@20000000 {
52		device_type = "memory";
53		reg = <0x0 0x20000000 0x0 0xc0000000>;
54	};
55
56	gpio-keys {
57		compatible = "gpio-keys";
58
59		power-key {
60			gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
61			linux,code = <KEY_POWER>;
62			label = "power key";
63			debounce-interval = <10>;
64		};
65
66		volume-up-key {
67			gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
68			linux,code = <KEY_VOLUMEUP>;
69			label = "volume-up key";
70			debounce-interval = <10>;
71		};
72
73		volume-down-key {
74			gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
75			linux,code = <KEY_VOLUMEDOWN>;
76			label = "volume-down key";
77			debounce-interval = <10>;
78		};
79
80		homepage-key {
81			gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
82			linux,code = <KEY_MENU>;
83			label = "homepage key";
84			debounce-interval = <10>;
85		};
86	};
87
88	i2c_max98504: i2c-gpio-0 {
89		compatible = "i2c-gpio";
90		sda-gpios = <&gpd0 1 GPIO_ACTIVE_HIGH>;
91		scl-gpios = <&gpd0 0 GPIO_ACTIVE_HIGH>;
92		i2c-gpio,delay-us = <2>;
93		#address-cells = <1>;
94		#size-cells = <0>;
95
96		max98504: amplifier@31 {
97			compatible = "maxim,max98504";
98			reg = <0x31>;
99			maxim,rx-path = <1>;
100			maxim,tx-path = <1>;
101			maxim,tx-channel-mask = <3>;
102			maxim,tx-channel-source = <2>;
103		};
104	};
105
106	irda_regulator: irda-regulator {
107		compatible = "regulator-fixed";
108		enable-active-high;
109		gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
110		regulator-name = "irda_regulator";
111	};
112
113	sound {
114		compatible = "samsung,tm2-audio";
115		audio-codec = <&wm5110>, <&hdmi>;
116		i2s-controller = <&i2s0 0>, <&i2s1 0>;
117		audio-amplifier = <&max98504>;
118		mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
119		model = "wm5110";
120		samsung,audio-routing =
121			/* Headphone */
122			"HP", "HPOUT1L",
123			"HP", "HPOUT1R",
124
125			/* Speaker */
126			"SPK", "SPKOUT",
127			"SPKOUT", "HPOUT2L",
128			"SPKOUT", "HPOUT2R",
129
130			/* Receiver */
131			"RCV", "HPOUT3L",
132			"RCV", "HPOUT3R";
133		status = "okay";
134	};
135};
136
137&adc {
138	vdd-supply = <&ldo3_reg>;
139	status = "okay";
140
141	thermistor-ap {
142		compatible = "murata,ncp03wf104";
143		pullup-uv = <1800000>;
144		pullup-ohm = <100000>;
145		pulldown-ohm = <0>;
146		io-channels = <&adc 0>;
147	};
148
149	thermistor-battery {
150		compatible = "murata,ncp03wf104";
151		pullup-uv = <1800000>;
152		pullup-ohm = <100000>;
153		pulldown-ohm = <0>;
154		io-channels = <&adc 1>;
155		#thermal-sensor-cells = <0>;
156	};
157
158	thermistor-charger {
159		compatible = "murata,ncp03wf104";
160		pullup-uv = <1800000>;
161		pullup-ohm = <100000>;
162		pulldown-ohm = <0>;
163		io-channels = <&adc 2>;
164	};
165};
166
167&bus_g2d_400 {
168	devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
169	vdd-supply = <&buck4_reg>;
170	exynos,saturation-ratio = <10>;
171	status = "okay";
172};
173
174&bus_g2d_266 {
175	devfreq = <&bus_g2d_400>;
176	status = "okay";
177};
178
179&bus_gscl {
180	devfreq = <&bus_g2d_400>;
181	status = "okay";
182};
183
184&bus_hevc {
185	devfreq = <&bus_g2d_400>;
186	status = "okay";
187};
188
189&bus_jpeg {
190	devfreq = <&bus_g2d_400>;
191	status = "okay";
192};
193
194&bus_mfc {
195	devfreq = <&bus_g2d_400>;
196	status = "okay";
197};
198
199&bus_mscl {
200	devfreq = <&bus_g2d_400>;
201	status = "okay";
202};
203
204&bus_noc0 {
205	devfreq = <&bus_g2d_400>;
206	status = "okay";
207};
208
209&bus_noc1 {
210	devfreq = <&bus_g2d_400>;
211	status = "okay";
212};
213
214&bus_noc2 {
215	devfreq = <&bus_g2d_400>;
216	status = "okay";
217};
218
219&cmu_aud {
220	assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
221		<&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
222		<&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
223		<&cmu_top CLK_MOUT_AUD_PLL>,
224		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
225		<&cmu_top CLK_MOUT_SCLK_AUDIO0>,
226		<&cmu_top CLK_MOUT_SCLK_AUDIO1>,
227		<&cmu_top CLK_MOUT_SCLK_SPDIF>,
228
229		<&cmu_aud CLK_DIV_AUD_CA5>,
230		<&cmu_aud CLK_DIV_ACLK_AUD>,
231		<&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
232		<&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
233		<&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
234		<&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
235		<&cmu_aud CLK_DIV_SCLK_AUD_UART>,
236		<&cmu_top CLK_DIV_SCLK_AUDIO0>,
237		<&cmu_top CLK_DIV_SCLK_AUDIO1>,
238		<&cmu_top CLK_DIV_SCLK_PCM1>,
239		<&cmu_top CLK_DIV_SCLK_I2S1>;
240
241	assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
242		<&cmu_aud CLK_MOUT_AUD_PLL_USER>,
243		<&cmu_aud CLK_MOUT_AUD_PLL_USER>,
244		<&cmu_top CLK_FOUT_AUD_PLL>,
245		<&cmu_top CLK_MOUT_AUD_PLL>,
246		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
247		<&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
248		<&cmu_top CLK_SCLK_AUDIO0>;
249
250	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
251		<196608001>, <65536001>, <32768001>, <49152001>,
252		<2048001>, <24576001>, <196608001>,
253		<24576001>, <98304001>, <2048001>, <49152001>;
254};
255
256&cmu_fsys {
257	assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
258		<&cmu_top CLK_MOUT_SCLK_USBHOST30>,
259		<&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
260		<&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
261		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
262		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
263		<&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
264		<&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
265		<&cmu_top CLK_DIV_SCLK_USBDRD30>,
266		<&cmu_top CLK_DIV_SCLK_USBHOST30>;
267	assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
268		<&cmu_top CLK_MOUT_BUS_PLL_USER>,
269		<&cmu_top CLK_SCLK_USBDRD30_FSYS>,
270		<&cmu_top CLK_SCLK_USBHOST30_FSYS>,
271		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
272		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
273		<&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
274		<&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
275	assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
276			       <66700000>, <66700000>;
277};
278
279&cmu_gscl {
280	assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
281			  <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
282	assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
283				 <&cmu_top CLK_ACLK_GSCL_333>;
284};
285
286&cmu_mfc {
287	assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
288	assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
289};
290
291&cmu_mif {
292	assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>;
293	assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
294	assigned-clock-rates = <0>, <333000000>;
295};
296
297&cmu_mscl {
298	assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
299			  <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
300			  <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
301			  <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
302	assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
303				 <&cmu_top CLK_SCLK_JPEG_MSCL>,
304				 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
305				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
306};
307
308&cmu_top {
309	assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
310	assigned-clock-rates = <196608001>;
311};
312
313&cpu0 {
314	cpu-supply = <&buck3_reg>;
315};
316
317&cpu4 {
318	cpu-supply = <&buck2_reg>;
319};
320
321&decon {
322	status = "okay";
323};
324
325&decon_tv {
326	status = "okay";
327
328	ports {
329		#address-cells = <1>;
330		#size-cells = <0>;
331
332		port@0 {
333			reg = <0>;
334			tv_to_hdmi: endpoint {
335				remote-endpoint = <&hdmi_to_tv>;
336			};
337		};
338	};
339};
340
341&dsi {
342	status = "okay";
343	vddcore-supply = <&ldo6_reg>;
344	vddio-supply = <&ldo7_reg>;
345	samsung,burst-clock-frequency = <512000000>;
346	samsung,esc-clock-frequency = <16000000>;
347	samsung,pll-clock-frequency = <24000000>;
348	pinctrl-names = "default";
349	pinctrl-0 = <&te_irq>;
350};
351
352&gpu {
353	mali-supply = <&buck6_reg>;
354	status = "okay";
355};
356
357&hdmi {
358	hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
359	status = "okay";
360	vdd-supply = <&ldo6_reg>;
361	vdd_osc-supply = <&ldo7_reg>;
362	vdd_pll-supply = <&ldo6_reg>;
363
364	ports {
365		#address-cells = <1>;
366		#size-cells = <0>;
367
368		port@0 {
369			reg = <0>;
370			hdmi_to_tv: endpoint {
371				remote-endpoint = <&tv_to_hdmi>;
372			};
373		};
374
375		port@1 {
376			reg = <1>;
377			hdmi_to_mhl: endpoint {
378				remote-endpoint = <&mhl_to_hdmi>;
379			};
380		};
381	};
382};
383
384&hsi2c_0 {
385	status = "okay";
386	clock-frequency = <2500000>;
387
388	pmic@66 {
389		compatible = "samsung,s2mps13-pmic";
390		interrupt-parent = <&gpa0>;
391		interrupts = <7 IRQ_TYPE_NONE>;
392		reg = <0x66>;
393		samsung,s2mps11-wrstbi-ground;
394
395		s2mps13_osc: clocks {
396			compatible = "samsung,s2mps13-clk";
397			#clock-cells = <1>;
398			clock-output-names = "s2mps13_ap", "s2mps13_cp",
399				"s2mps13_bt";
400		};
401
402		regulators {
403			ldo1_reg: LDO1 {
404				regulator-name = "VDD_ALIVE_0.9V_AP";
405				regulator-min-microvolt = <900000>;
406				regulator-max-microvolt = <900000>;
407				regulator-always-on;
408			};
409
410			ldo2_reg: LDO2 {
411				regulator-name = "VDDQ_MMC2_2.8V_AP";
412				regulator-min-microvolt = <2800000>;
413				regulator-max-microvolt = <2800000>;
414				regulator-always-on;
415				regulator-state-mem {
416					regulator-off-in-suspend;
417				};
418			};
419
420			ldo3_reg: LDO3 {
421				regulator-name = "VDD1_E_1.8V_AP";
422				regulator-min-microvolt = <1800000>;
423				regulator-max-microvolt = <1800000>;
424				regulator-always-on;
425			};
426
427			ldo4_reg: LDO4 {
428				regulator-name = "VDD10_MIF_PLL_1.0V_AP";
429				regulator-min-microvolt = <1300000>;
430				regulator-max-microvolt = <1300000>;
431				regulator-always-on;
432				regulator-state-mem {
433					regulator-off-in-suspend;
434				};
435			};
436
437			ldo5_reg: LDO5 {
438				regulator-name = "VDD10_DPLL_1.0V_AP";
439				regulator-min-microvolt = <1000000>;
440				regulator-max-microvolt = <1000000>;
441				regulator-always-on;
442				regulator-state-mem {
443					regulator-off-in-suspend;
444				};
445			};
446
447			ldo6_reg: LDO6 {
448				regulator-name = "VDD10_MIPI2L_1.0V_AP";
449				regulator-min-microvolt = <1000000>;
450				regulator-max-microvolt = <1000000>;
451				regulator-state-mem {
452					regulator-off-in-suspend;
453				};
454			};
455
456			ldo7_reg: LDO7 {
457				regulator-name = "VDD18_MIPI2L_1.8V_AP";
458				regulator-min-microvolt = <1800000>;
459				regulator-max-microvolt = <1800000>;
460				regulator-always-on;
461				regulator-state-mem {
462					regulator-off-in-suspend;
463				};
464			};
465
466			ldo8_reg: LDO8 {
467				regulator-name = "VDD18_LLI_1.8V_AP";
468				regulator-min-microvolt = <1800000>;
469				regulator-max-microvolt = <1800000>;
470				regulator-always-on;
471				regulator-state-mem {
472					regulator-off-in-suspend;
473				};
474			};
475
476			ldo9_reg: LDO9 {
477				regulator-name = "VDD18_ABB_ETC_1.8V_AP";
478				regulator-min-microvolt = <1800000>;
479				regulator-max-microvolt = <1800000>;
480				regulator-always-on;
481				regulator-state-mem {
482					regulator-off-in-suspend;
483				};
484			};
485
486			ldo10_reg: LDO10 {
487				regulator-name = "VDD33_USB30_3.0V_AP";
488				regulator-min-microvolt = <3000000>;
489				regulator-max-microvolt = <3000000>;
490				regulator-state-mem {
491					regulator-off-in-suspend;
492				};
493			};
494
495			ldo11_reg: LDO11 {
496				regulator-name = "VDD_INT_M_1.0V_AP";
497				regulator-min-microvolt = <1000000>;
498				regulator-max-microvolt = <1000000>;
499				regulator-always-on;
500				regulator-state-mem {
501					regulator-off-in-suspend;
502				};
503			};
504
505			ldo12_reg: LDO12 {
506				regulator-name = "VDD_KFC_M_1.1V_AP";
507				regulator-min-microvolt = <800000>;
508				regulator-max-microvolt = <1350000>;
509				regulator-always-on;
510			};
511
512			ldo13_reg: LDO13 {
513				regulator-name = "VDD_G3D_M_0.95V_AP";
514				regulator-min-microvolt = <950000>;
515				regulator-max-microvolt = <950000>;
516				regulator-always-on;
517				regulator-state-mem {
518					regulator-off-in-suspend;
519				};
520			};
521
522			ldo14_reg: LDO14 {
523				regulator-name = "VDDQ_M1_LDO_1.2V_AP";
524				regulator-min-microvolt = <1200000>;
525				regulator-max-microvolt = <1200000>;
526				regulator-always-on;
527				regulator-state-mem {
528					regulator-off-in-suspend;
529				};
530			};
531
532			ldo15_reg: LDO15 {
533				regulator-name = "VDDQ_M2_LDO_1.2V_AP";
534				regulator-min-microvolt = <1200000>;
535				regulator-max-microvolt = <1200000>;
536				regulator-always-on;
537				regulator-state-mem {
538					regulator-off-in-suspend;
539				};
540			};
541
542			ldo16_reg: LDO16 {
543				regulator-name = "VDDQ_EFUSE";
544				regulator-min-microvolt = <1400000>;
545				regulator-max-microvolt = <3400000>;
546				regulator-always-on;
547			};
548
549			ldo17_reg: LDO17 {
550				regulator-name = "V_TFLASH_2.8V_AP";
551				regulator-min-microvolt = <2800000>;
552				regulator-max-microvolt = <2800000>;
553			};
554
555			ldo18_reg: LDO18 {
556				regulator-name = "V_CODEC_1.8V_AP";
557				regulator-min-microvolt = <1800000>;
558				regulator-max-microvolt = <1800000>;
559			};
560
561			ldo19_reg: LDO19 {
562				regulator-name = "VDDA_1.8V_COMP";
563				regulator-min-microvolt = <1800000>;
564				regulator-max-microvolt = <1800000>;
565				regulator-always-on;
566			};
567
568			ldo20_reg: LDO20 {
569				regulator-name = "VCC_2.8V_AP";
570				regulator-min-microvolt = <2800000>;
571				regulator-max-microvolt = <2800000>;
572				regulator-always-on;
573			};
574
575			ldo21_reg: LDO21 {
576				regulator-name = "VT_CAM_1.8V";
577				regulator-min-microvolt = <1800000>;
578				regulator-max-microvolt = <1800000>;
579			};
580
581			ldo22_reg: LDO22 {
582				regulator-name = "CAM_IO_1.8V_AP";
583				regulator-min-microvolt = <1800000>;
584				regulator-max-microvolt = <1800000>;
585			};
586
587			ldo23_reg: LDO23 {
588				regulator-name = "CAM_SEN_CORE_1.05V_AP";
589				regulator-min-microvolt = <1050000>;
590				regulator-max-microvolt = <1050000>;
591			};
592
593			ldo24_reg: LDO24 {
594				regulator-name = "VT_CAM_1.2V";
595				regulator-min-microvolt = <1200000>;
596				regulator-max-microvolt = <1200000>;
597			};
598
599			ldo25_reg: LDO25 {
600				regulator-name = "UNUSED_LDO25";
601				regulator-min-microvolt = <2800000>;
602				regulator-max-microvolt = <2800000>;
603			};
604
605			ldo26_reg: LDO26 {
606				regulator-name = "CAM_AF_2.8V_AP";
607				regulator-min-microvolt = <2800000>;
608				regulator-max-microvolt = <2800000>;
609			};
610
611			ldo27_reg: LDO27 {
612				regulator-name = "VCC_3.0V_LCD_AP";
613				regulator-min-microvolt = <3000000>;
614				regulator-max-microvolt = <3000000>;
615			};
616
617			ldo28_reg: LDO28 {
618				regulator-name = "VCC_1.8V_LCD_AP";
619				regulator-min-microvolt = <1800000>;
620				regulator-max-microvolt = <1800000>;
621			};
622
623			ldo29_reg: LDO29 {
624				regulator-name = "VT_CAM_2.8V";
625				regulator-min-microvolt = <3000000>;
626				regulator-max-microvolt = <3000000>;
627			};
628
629			ldo30_reg: LDO30 {
630				regulator-name = "TSP_AVDD_3.3V_AP";
631				regulator-min-microvolt = <3300000>;
632				regulator-max-microvolt = <3300000>;
633			};
634
635			ldo31_reg: LDO31 {
636				/*
637				 * LDO31 differs from target to target,
638				 * its definition is in the .dts
639				 */
640			};
641
642			ldo32_reg: LDO32 {
643				regulator-name = "VTOUCH_1.8V_AP";
644				regulator-min-microvolt = <1800000>;
645				regulator-max-microvolt = <1800000>;
646			};
647
648			ldo33_reg: LDO33 {
649				regulator-name = "VTOUCH_LED_3.3V";
650				regulator-min-microvolt = <2500000>;
651				regulator-max-microvolt = <3300000>;
652				regulator-ramp-delay = <12500>;
653			};
654
655			ldo34_reg: LDO34 {
656				regulator-name = "VCC_1.8V_MHL_AP";
657				regulator-min-microvolt = <1000000>;
658				regulator-max-microvolt = <2100000>;
659			};
660
661			ldo35_reg: LDO35 {
662				regulator-name = "OIS_VM_2.8V";
663				regulator-min-microvolt = <1800000>;
664				regulator-max-microvolt = <2800000>;
665			};
666
667			ldo36_reg: LDO36 {
668				regulator-name = "VSIL_1.0V";
669				regulator-min-microvolt = <1000000>;
670				regulator-max-microvolt = <1000000>;
671			};
672
673			ldo37_reg: LDO37 {
674				regulator-name = "VF_1.8V";
675				regulator-min-microvolt = <1800000>;
676				regulator-max-microvolt = <1800000>;
677			};
678
679			ldo38_reg: LDO38 {
680				/*
681				 * LDO38 differs from target to target,
682				 * its definition is in the .dts
683				 */
684			};
685
686			ldo39_reg: LDO39 {
687				regulator-name = "V_HRM_1.8V";
688				regulator-min-microvolt = <1800000>;
689				regulator-max-microvolt = <1800000>;
690			};
691
692			ldo40_reg: LDO40 {
693				regulator-name = "V_HRM_3.3V";
694				regulator-min-microvolt = <3300000>;
695				regulator-max-microvolt = <3300000>;
696			};
697
698			buck1_reg: BUCK1 {
699				regulator-name = "VDD_MIF_0.9V_AP";
700				regulator-min-microvolt = <600000>;
701				regulator-max-microvolt = <1500000>;
702				regulator-always-on;
703				regulator-state-mem {
704					regulator-off-in-suspend;
705				};
706			};
707
708			buck2_reg: BUCK2 {
709				regulator-name = "VDD_EGL_1.0V_AP";
710				regulator-min-microvolt = <900000>;
711				regulator-max-microvolt = <1300000>;
712				regulator-always-on;
713				regulator-state-mem {
714					regulator-off-in-suspend;
715				};
716			};
717
718			buck3_reg: BUCK3 {
719				regulator-name = "VDD_KFC_1.0V_AP";
720				regulator-min-microvolt = <800000>;
721				regulator-max-microvolt = <1200000>;
722				regulator-always-on;
723				regulator-state-mem {
724					regulator-off-in-suspend;
725				};
726			};
727
728			buck4_reg: BUCK4 {
729				regulator-name = "VDD_INT_0.95V_AP";
730				regulator-min-microvolt = <600000>;
731				regulator-max-microvolt = <1500000>;
732				regulator-always-on;
733				regulator-state-mem {
734					regulator-off-in-suspend;
735				};
736			};
737
738			buck5_reg: BUCK5 {
739				regulator-name = "VDD_DISP_CAM0_0.9V_AP";
740				regulator-min-microvolt = <600000>;
741				regulator-max-microvolt = <1500000>;
742				regulator-always-on;
743				regulator-state-mem {
744					regulator-off-in-suspend;
745				};
746			};
747
748			buck6_reg: BUCK6 {
749				regulator-name = "VDD_G3D_0.9V_AP";
750				regulator-min-microvolt = <600000>;
751				regulator-max-microvolt = <1500000>;
752				regulator-always-on;
753				regulator-state-mem {
754					regulator-off-in-suspend;
755				};
756			};
757
758			buck7_reg: BUCK7 {
759				regulator-name = "VDD_MEM1_1.2V_AP";
760				regulator-min-microvolt = <1200000>;
761				regulator-max-microvolt = <1200000>;
762				regulator-always-on;
763			};
764
765			buck8_reg: BUCK8 {
766				regulator-name = "VDD_LLDO_1.35V_AP";
767				regulator-min-microvolt = <1350000>;
768				regulator-max-microvolt = <3300000>;
769				regulator-always-on;
770			};
771
772			buck9_reg: BUCK9 {
773				regulator-name = "VDD_MLDO_2.0V_AP";
774				regulator-min-microvolt = <1350000>;
775				regulator-max-microvolt = <3300000>;
776				regulator-always-on;
777			};
778
779			buck10_reg: BUCK10 {
780				regulator-name = "vdd_mem2";
781				regulator-min-microvolt = <550000>;
782				regulator-max-microvolt = <1500000>;
783				regulator-always-on;
784			};
785		};
786	};
787};
788
789&hsi2c_4 {
790	status = "okay";
791
792	s3fwrn5: nfc@27 {
793		compatible = "samsung,s3fwrn5-i2c";
794		reg = <0x27>;
795		interrupt-parent = <&gpa1>;
796		interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
797		en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
798		wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
799	};
800};
801
802&hsi2c_5 {
803	status = "okay";
804
805	stmfts: touchscreen@49 {
806		compatible = "st,stmfts";
807		reg = <0x49>;
808		interrupt-parent = <&gpa1>;
809		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
810		avdd-supply = <&ldo30_reg>;
811		vdd-supply = <&ldo31_reg>;
812	};
813};
814
815&hsi2c_7 {
816	status = "okay";
817	clock-frequency = <1000000>;
818
819	bridge@39 {
820		reg = <0x39>;
821		compatible = "sil,sii8620";
822		cvcc10-supply = <&ldo36_reg>;
823		iovcc18-supply = <&ldo34_reg>;
824		interrupt-parent = <&gpf0>;
825		interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
826		reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
827		clocks = <&pmu_system_controller 0>;
828		clock-names = "xtal";
829
830		ports {
831			#address-cells = <1>;
832			#size-cells = <0>;
833
834			port@0 {
835				reg = <0>;
836				mhl_to_hdmi: endpoint {
837					remote-endpoint = <&hdmi_to_mhl>;
838				};
839			};
840
841			port@1 {
842				reg = <1>;
843				mhl_to_musb_con: endpoint {
844					remote-endpoint = <&musb_con_to_mhl>;
845				};
846			};
847		};
848	};
849};
850
851&hsi2c_8 {
852	status = "okay";
853
854	pmic@66 {
855		compatible = "maxim,max77843";
856		interrupt-parent = <&gpa1>;
857		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
858		reg = <0x66>;
859
860		muic: max77843-muic {
861			compatible = "maxim,max77843-muic";
862
863			musb_con: musb-connector {
864				compatible = "samsung,usb-connector-11pin",
865					     "usb-b-connector";
866				label = "micro-USB";
867				type = "micro";
868
869				ports {
870					#address-cells = <1>;
871					#size-cells = <0>;
872
873					port@3 {
874						reg = <3>;
875						musb_con_to_mhl: endpoint {
876							remote-endpoint = <&mhl_to_musb_con>;
877						};
878					};
879				};
880			};
881
882			ports {
883				port {
884					muic_to_usb: endpoint {
885						remote-endpoint = <&usb_to_muic>;
886					};
887				};
888			};
889		};
890
891		regulators {
892			compatible = "maxim,max77843-regulator";
893			safeout1_reg: SAFEOUT1 {
894				regulator-name = "SAFEOUT1";
895				regulator-min-microvolt = <3300000>;
896				regulator-max-microvolt = <4950000>;
897			};
898
899			safeout2_reg: SAFEOUT2 {
900				regulator-name = "SAFEOUT2";
901				regulator-min-microvolt = <3300000>;
902				regulator-max-microvolt = <4950000>;
903			};
904
905			charger_reg: CHARGER {
906				regulator-name = "CHARGER";
907				regulator-min-microamp = <100000>;
908				regulator-max-microamp = <3150000>;
909			};
910		};
911
912		haptic: max77843-haptic {
913			compatible = "maxim,max77843-haptic";
914			haptic-supply = <&ldo38_reg>;
915			pwms = <&pwm 0 33670 0>;
916			pwm-names = "haptic";
917		};
918	};
919};
920
921&hsi2c_11 {
922	status = "okay";
923};
924
925&i2s0 {
926	status = "okay";
927};
928
929&i2s1 {
930	assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
931	assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
932	status = "okay";
933};
934
935&mshc_0 {
936	status = "okay";
937	mmc-hs200-1_8v;
938	mmc-hs400-1_8v;
939	cap-mmc-highspeed;
940	non-removable;
941	card-detect-delay = <200>;
942	samsung,dw-mshc-ciu-div = <3>;
943	samsung,dw-mshc-sdr-timing = <0 4>;
944	samsung,dw-mshc-ddr-timing = <0 2>;
945	samsung,dw-mshc-hs400-timing = <0 3>;
946	samsung,read-strobe-delay = <90>;
947	fifo-depth = <0x80>;
948	pinctrl-names = "default";
949	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
950			&sd0_bus8 &sd0_rdqs>;
951	bus-width = <8>;
952	assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
953	assigned-clock-rates = <800000000>;
954};
955
956&mshc_2 {
957	status = "okay";
958	cap-sd-highspeed;
959	disable-wp;
960	cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
961	card-detect-delay = <200>;
962	samsung,dw-mshc-ciu-div = <3>;
963	samsung,dw-mshc-sdr-timing = <0 4>;
964	samsung,dw-mshc-ddr-timing = <0 2>;
965	fifo-depth = <0x80>;
966	pinctrl-names = "default";
967	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
968	bus-width = <4>;
969};
970
971&pcie {
972	status = "okay";
973	pinctrl-names = "default";
974	pinctrl-0 = <&pcie_bus &pcie_wlanen>;
975	vdd10-supply = <&ldo6_reg>;
976	vdd18-supply = <&ldo7_reg>;
977	assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
978			  <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
979	assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
980				 <&cmu_top CLK_MOUT_BUS_PLL_USER>;
981	assigned-clock-rates = <0>, <100000000>;
982	interrupt-map-mask = <0 0 0 0>;
983	interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
984};
985
986&pcie_phy {
987	status = "okay";
988};
989
990&ppmu_d0_general {
991	status = "okay";
992	events {
993		ppmu_event0_d0_general: ppmu-event0-d0-general {
994			event-name = "ppmu-event0-d0-general";
995		};
996	};
997};
998
999&ppmu_d1_general {
1000	status = "okay";
1001	events {
1002		ppmu_event0_d1_general: ppmu-event0-d1-general {
1003		       event-name = "ppmu-event0-d1-general";
1004	       };
1005       };
1006};
1007
1008&pinctrl_alive {
1009	pinctrl-names = "default";
1010	pinctrl-0 = <&initial_alive>;
1011
1012	initial_alive: initial-state {
1013		PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
1014		PIN(INPUT, gpa0-1, NONE, FAST_SR1);
1015		PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
1016		PIN(INPUT, gpa0-3, NONE, FAST_SR1);
1017		PIN(INPUT, gpa0-4, NONE, FAST_SR1);
1018		PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
1019		PIN(INPUT, gpa0-6, NONE, FAST_SR1);
1020		PIN(INPUT, gpa0-7, NONE, FAST_SR1);
1021
1022		PIN(INPUT, gpa1-0, UP, FAST_SR1);
1023		PIN(INPUT, gpa1-1, UP, FAST_SR1);
1024		PIN(INPUT, gpa1-2, NONE, FAST_SR1);
1025		PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
1026		PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
1027		PIN(INPUT, gpa1-5, NONE, FAST_SR1);
1028		PIN(INPUT, gpa1-6, NONE, FAST_SR1);
1029		PIN(INPUT, gpa1-7, NONE, FAST_SR1);
1030
1031		PIN(INPUT, gpa2-0, NONE, FAST_SR1);
1032		PIN(INPUT, gpa2-1, NONE, FAST_SR1);
1033		PIN(INPUT, gpa2-2, NONE, FAST_SR1);
1034		PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
1035		PIN(INPUT, gpa2-4, NONE, FAST_SR1);
1036		PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
1037		PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
1038		PIN(INPUT, gpa2-7, NONE, FAST_SR1);
1039
1040		PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
1041		PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
1042		PIN(INPUT, gpa3-2, NONE, FAST_SR1);
1043		PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
1044		PIN(INPUT, gpa3-4, NONE, FAST_SR1);
1045		PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
1046		PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
1047		PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
1048
1049		PIN(INPUT, gpf1-0, NONE, FAST_SR1);
1050		PIN(INPUT, gpf1-1, NONE, FAST_SR1);
1051		PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
1052		PIN(INPUT, gpf1-4, UP, FAST_SR1);
1053		PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
1054		PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
1055		PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
1056
1057		PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
1058		PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
1059		PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
1060		PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
1061
1062		PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
1063		PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
1064		PIN(INPUT, gpf3-2, NONE, FAST_SR1);
1065		PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
1066
1067		PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
1068		PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
1069		PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
1070		PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
1071		PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
1072		PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
1073		PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
1074		PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
1075
1076		PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
1077		PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
1078		PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
1079		PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
1080		PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
1081		PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
1082		PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
1083		PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
1084	};
1085
1086	te_irq: te-irq {
1087		samsung,pins = "gpf1-3";
1088		samsung,pin-function = <0xf>;
1089	};
1090};
1091
1092&pinctrl_cpif {
1093	pinctrl-names = "default";
1094	pinctrl-0 = <&initial_cpif>;
1095
1096	initial_cpif: initial-state {
1097		PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
1098		PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
1099	};
1100};
1101
1102&pinctrl_ese {
1103	pinctrl-names = "default";
1104	pinctrl-0 = <&initial_ese>;
1105
1106	pcie_wlanen: pcie-wlanen {
1107		PIN(INPUT, gpj2-0, UP, FAST_SR4);
1108	};
1109
1110	initial_ese: initial-state {
1111		PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
1112		PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
1113	};
1114};
1115
1116&pinctrl_fsys {
1117	pinctrl-names = "default";
1118	pinctrl-0 = <&initial_fsys>;
1119
1120	initial_fsys: initial-state {
1121		PIN(INPUT, gpr3-0, NONE, FAST_SR1);
1122		PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
1123		PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
1124		PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
1125		PIN(INPUT, gpr3-7, NONE, FAST_SR1);
1126	};
1127};
1128
1129&pinctrl_imem {
1130	pinctrl-names = "default";
1131	pinctrl-0 = <&initial_imem>;
1132
1133	initial_imem: initial-state {
1134		PIN(INPUT, gpf0-0, UP, FAST_SR1);
1135		PIN(INPUT, gpf0-1, UP, FAST_SR1);
1136		PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
1137		PIN(INPUT, gpf0-3, UP, FAST_SR1);
1138		PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
1139		PIN(INPUT, gpf0-5, NONE, FAST_SR1);
1140		PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
1141		PIN(INPUT, gpf0-7, UP, FAST_SR1);
1142	};
1143};
1144
1145&pinctrl_nfc {
1146	pinctrl-names = "default";
1147	pinctrl-0 = <&initial_nfc>;
1148
1149	initial_nfc: initial-state {
1150		PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
1151	};
1152};
1153
1154&pinctrl_peric {
1155	pinctrl-names = "default";
1156	pinctrl-0 = <&initial_peric>;
1157
1158	initial_peric: initial-state {
1159		PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
1160		PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
1161		PIN(INPUT, gpv7-2, NONE, FAST_SR1);
1162		PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
1163		PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
1164		PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
1165
1166		PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
1167
1168		PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
1169		PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
1170		PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
1171
1172		PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
1173
1174		PIN(INPUT, gpc3-4, NONE, FAST_SR1);
1175		PIN(INPUT, gpc3-5, NONE, FAST_SR1);
1176		PIN(INPUT, gpc3-6, NONE, FAST_SR1);
1177		PIN(INPUT, gpc3-7, NONE, FAST_SR1);
1178
1179		PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
1180		PIN(2, gpg0-1, DOWN, FAST_SR1);
1181
1182		PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
1183
1184		PIN(INPUT, gpd4-0, NONE, FAST_SR1);
1185		PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
1186		PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
1187		PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
1188		PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
1189
1190		PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
1191
1192		PIN(INPUT, gpd8-1, UP, FAST_SR1);
1193
1194		PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
1195		PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
1196		PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
1197		PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
1198		PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
1199
1200		PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1201		PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1202
1203		PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1204		PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1205		PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1206	};
1207};
1208
1209&pinctrl_touch {
1210	pinctrl-names = "default";
1211	pinctrl-0 = <&initial_touch>;
1212
1213	initial_touch: initial-state {
1214		PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1215	};
1216};
1217
1218&pwm {
1219	pinctrl-0 = <&pwm0_out>;
1220	pinctrl-names = "default";
1221	status = "okay";
1222};
1223
1224&mic {
1225	status = "okay";
1226};
1227
1228&pmu_system_controller {
1229	assigned-clocks = <&pmu_system_controller 0>;
1230	assigned-clock-parents = <&xxti>;
1231};
1232
1233&serial_1 {
1234	status = "okay";
1235};
1236
1237&serial_3 {
1238	status = "okay";
1239
1240	bluetooth {
1241		compatible = "brcm,bcm43438-bt";
1242		max-speed = <3000000>;
1243		shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
1244		device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
1245		host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
1246		clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
1247		clock-names = "extclk";
1248	};
1249};
1250
1251&spi_1 {
1252	cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1253	status = "okay";
1254
1255	wm5110: audio-codec@0 {
1256		compatible = "wlf,wm5110";
1257		reg = <0x0>;
1258		spi-max-frequency = <20000000>;
1259		interrupt-parent = <&gpa0>;
1260		interrupts = <4 IRQ_TYPE_NONE>;
1261		clocks = <&pmu_system_controller 0>,
1262			<&s2mps13_osc S2MPS11_CLK_BT>;
1263		clock-names = "mclk1", "mclk2";
1264
1265		gpio-controller;
1266		#gpio-cells = <2>;
1267
1268		wlf,micd-detect-debounce = <300>;
1269		wlf,micd-bias-start-time = <0x1>;
1270		wlf,micd-rate = <0x7>;
1271		wlf,micd-dbtime = <0x1>;
1272		wlf,micd-force-micbias;
1273		wlf,micd-configs = <0x0 1 0>;
1274		wlf,hpdet-channel = <1>;
1275		wlf,gpsw = <0x1>;
1276		wlf,inmode = <2 0 2 0>;
1277
1278		wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1279		wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1280
1281		/* core supplies */
1282		AVDD-supply = <&ldo18_reg>;
1283		DBVDD1-supply = <&ldo18_reg>;
1284		CPVDD-supply = <&ldo18_reg>;
1285		DBVDD2-supply = <&ldo18_reg>;
1286		DBVDD3-supply = <&ldo18_reg>;
1287
1288		controller-data {
1289			samsung,spi-feedback-delay = <0>;
1290		};
1291	};
1292};
1293
1294&spi_3 {
1295	status = "okay";
1296	no-cs-readback;
1297
1298	irled@0 {
1299		compatible = "ir-spi-led";
1300		reg = <0x0>;
1301		spi-max-frequency = <5000000>;
1302		power-supply = <&irda_regulator>;
1303		duty-cycle = <60>;
1304		led-active-low;
1305
1306		controller-data {
1307			samsung,spi-feedback-delay = <0>;
1308		};
1309	};
1310};
1311
1312&timer {
1313	clock-frequency = <24000000>;
1314};
1315
1316&tmu_atlas0 {
1317	vtmu-supply = <&ldo3_reg>;
1318	status = "okay";
1319};
1320
1321&tmu_apollo {
1322	vtmu-supply = <&ldo3_reg>;
1323	status = "okay";
1324};
1325
1326&tmu_g3d {
1327	vtmu-supply = <&ldo3_reg>;
1328	status = "okay";
1329};
1330
1331&usbdrd30 {
1332	vdd33-supply = <&ldo10_reg>;
1333	vdd10-supply = <&ldo6_reg>;
1334	status = "okay";
1335};
1336
1337&usbdrd_dwc3 {
1338	dr_mode = "otg";
1339};
1340
1341&usbdrd30_phy {
1342	vbus-supply = <&safeout1_reg>;
1343	status = "okay";
1344
1345	port {
1346		usb_to_muic: endpoint {
1347			remote-endpoint = <&muic_to_usb>;
1348		};
1349	};
1350};
1351
1352&xxti {
1353	clock-frequency = <24000000>;
1354};
1355