1 /* 2 * Devices shared by all Juno boards 3 */ 4 5 memtimer: timer@2a810000 { 6 compatible = "arm,armv7-timer-mem"; 7 reg = <0x0 0x2a810000 0x0 0x10000>; 8 clock-frequency = <50000000>; 9 #address-cells = <2>; 10 #size-cells = <2>; 11 ranges; 12 status = "disabled"; 13 frame@2a830000 { 14 frame-number = <1>; 15 interrupts = <0 60 4>; 16 reg = <0x0 0x2a830000 0x0 0x10000>; 17 }; 18 }; 19 20 mailbox: mhu@2b1f0000 { 21 compatible = "arm,mhu", "arm,primecell"; 22 reg = <0x0 0x2b1f0000 0x0 0x1000>; 23 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 24 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 25 interrupt-names = "mhu_lpri_rx", 26 "mhu_hpri_rx"; 27 #mbox-cells = <1>; 28 clocks = <&soc_refclk100mhz>; 29 clock-names = "apb_pclk"; 30 }; 31 32 gic: interrupt-controller@2c010000 { 33 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 34 reg = <0x0 0x2c010000 0 0x1000>, 35 <0x0 0x2c02f000 0 0x2000>, 36 <0x0 0x2c04f000 0 0x2000>, 37 <0x0 0x2c06f000 0 0x2000>; 38 #address-cells = <2>; 39 #interrupt-cells = <3>; 40 #size-cells = <2>; 41 interrupt-controller; 42 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 43 ranges = <0 0 0 0x2c1c0000 0 0x40000>; 44 v2m_0: v2m@0 { 45 compatible = "arm,gic-v2m-frame"; 46 msi-controller; 47 reg = <0 0 0 0x1000>; 48 }; 49 }; 50 51 timer { 52 compatible = "arm,armv8-timer"; 53 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 54 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 55 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 56 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 57 }; 58 59 sram: sram@2e000000 { 60 compatible = "arm,juno-sram-ns", "mmio-sram"; 61 reg = <0x0 0x2e000000 0x0 0x8000>; 62 63 #address-cells = <1>; 64 #size-cells = <1>; 65 ranges = <0 0x0 0x2e000000 0x8000>; 66 67 cpu_scp_lpri: scp-shmem@0 { 68 compatible = "arm,juno-scp-shmem"; 69 reg = <0x0 0x200>; 70 }; 71 72 cpu_scp_hpri: scp-shmem@200 { 73 compatible = "arm,juno-scp-shmem"; 74 reg = <0x200 0x200>; 75 }; 76 }; 77 78 scpi { 79 compatible = "arm,scpi"; 80 mboxes = <&mailbox 1>; 81 shmem = <&cpu_scp_hpri>; 82 83 clocks { 84 compatible = "arm,scpi-clocks"; 85 86 scpi_dvfs: scpi_clocks@0 { 87 compatible = "arm,scpi-dvfs-clocks"; 88 #clock-cells = <1>; 89 clock-indices = <0>, <1>, <2>; 90 clock-output-names = "atlclk", "aplclk","gpuclk"; 91 }; 92 scpi_clk: scpi_clocks@3 { 93 compatible = "arm,scpi-variable-clocks"; 94 #clock-cells = <1>; 95 clock-indices = <3>, <4>; 96 clock-output-names = "pxlclk0", "pxlclk1"; 97 }; 98 }; 99 100 scpi_sensors0: sensors { 101 compatible = "arm,scpi-sensors"; 102 #thermal-sensor-cells = <1>; 103 }; 104 }; 105 106 /include/ "juno-clocks.dtsi" 107 108 dma@7ff00000 { 109 compatible = "arm,pl330", "arm,primecell"; 110 reg = <0x0 0x7ff00000 0 0x1000>; 111 #dma-cells = <1>; 112 #dma-channels = <8>; 113 #dma-requests = <32>; 114 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 115 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 116 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 117 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 118 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 119 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 120 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 121 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 122 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 123 clocks = <&soc_faxiclk>; 124 clock-names = "apb_pclk"; 125 }; 126 127 soc_uart0: uart@7ff80000 { 128 compatible = "arm,pl011", "arm,primecell"; 129 reg = <0x0 0x7ff80000 0x0 0x1000>; 130 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 131 clocks = <&soc_uartclk>, <&soc_refclk100mhz>; 132 clock-names = "uartclk", "apb_pclk"; 133 }; 134 135 i2c@7ffa0000 { 136 compatible = "snps,designware-i2c"; 137 reg = <0x0 0x7ffa0000 0x0 0x1000>; 138 #address-cells = <1>; 139 #size-cells = <0>; 140 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 141 clock-frequency = <400000>; 142 i2c-sda-hold-time-ns = <500>; 143 clocks = <&soc_smc50mhz>; 144 145 dvi0: dvi-transmitter@70 { 146 compatible = "nxp,tda998x"; 147 reg = <0x70>; 148 }; 149 150 dvi1: dvi-transmitter@71 { 151 compatible = "nxp,tda998x"; 152 reg = <0x71>; 153 }; 154 }; 155 156 ohci@7ffb0000 { 157 compatible = "generic-ohci"; 158 reg = <0x0 0x7ffb0000 0x0 0x10000>; 159 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 160 clocks = <&soc_usb48mhz>; 161 }; 162 163 ehci@7ffc0000 { 164 compatible = "generic-ehci"; 165 reg = <0x0 0x7ffc0000 0x0 0x10000>; 166 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 167 clocks = <&soc_usb48mhz>; 168 }; 169 170 memory-controller@7ffd0000 { 171 compatible = "arm,pl354", "arm,primecell"; 172 reg = <0 0x7ffd0000 0 0x1000>; 173 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 174 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 175 clocks = <&soc_smc50mhz>; 176 clock-names = "apb_pclk"; 177 }; 178 179 memory@80000000 { 180 device_type = "memory"; 181 /* last 16MB of the first memory area is reserved for secure world use by firmware */ 182 reg = <0x00000000 0x80000000 0x0 0x7f000000>, 183 <0x00000008 0x80000000 0x1 0x80000000>; 184 }; 185 186 smb { 187 compatible = "simple-bus"; 188 #address-cells = <2>; 189 #size-cells = <1>; 190 ranges = <0 0 0 0x08000000 0x04000000>, 191 <1 0 0 0x14000000 0x04000000>, 192 <2 0 0 0x18000000 0x04000000>, 193 <3 0 0 0x1c000000 0x04000000>, 194 <4 0 0 0x0c000000 0x04000000>, 195 <5 0 0 0x10000000 0x04000000>; 196 197 #interrupt-cells = <1>; 198 interrupt-map-mask = <0 0 15>; 199 interrupt-map = <0 0 0 &gic 0 0 0 68 IRQ_TYPE_LEVEL_HIGH>, 200 <0 0 1 &gic 0 0 0 69 IRQ_TYPE_LEVEL_HIGH>, 201 <0 0 2 &gic 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>, 202 <0 0 3 &gic 0 0 0 160 IRQ_TYPE_LEVEL_HIGH>, 203 <0 0 4 &gic 0 0 0 161 IRQ_TYPE_LEVEL_HIGH>, 204 <0 0 5 &gic 0 0 0 162 IRQ_TYPE_LEVEL_HIGH>, 205 <0 0 6 &gic 0 0 0 163 IRQ_TYPE_LEVEL_HIGH>, 206 <0 0 7 &gic 0 0 0 164 IRQ_TYPE_LEVEL_HIGH>, 207 <0 0 8 &gic 0 0 0 165 IRQ_TYPE_LEVEL_HIGH>, 208 <0 0 9 &gic 0 0 0 166 IRQ_TYPE_LEVEL_HIGH>, 209 <0 0 10 &gic 0 0 0 167 IRQ_TYPE_LEVEL_HIGH>, 210 <0 0 11 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>, 211 <0 0 12 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>; 212 213 /include/ "juno-motherboard.dtsi" 214 }; 215