1*ac4dfd0dSXianwei Zhao// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*ac4dfd0dSXianwei Zhao/*
3*ac4dfd0dSXianwei Zhao * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
4*ac4dfd0dSXianwei Zhao */
5*ac4dfd0dSXianwei Zhao
6*ac4dfd0dSXianwei Zhao/dts-v1/;
7*ac4dfd0dSXianwei Zhao
8*ac4dfd0dSXianwei Zhao#include "meson-s4.dtsi"
9*ac4dfd0dSXianwei Zhao
10*ac4dfd0dSXianwei Zhao/ {
11*ac4dfd0dSXianwei Zhao	model = "Amlogic Meson S4 AQ222 Development Board";
12*ac4dfd0dSXianwei Zhao	compatible = "amlogic,aq222", "amlogic,s4";
13*ac4dfd0dSXianwei Zhao	interrupt-parent = <&gic>;
14*ac4dfd0dSXianwei Zhao	#address-cells = <2>;
15*ac4dfd0dSXianwei Zhao	#size-cells = <2>;
16*ac4dfd0dSXianwei Zhao
17*ac4dfd0dSXianwei Zhao	aliases {
18*ac4dfd0dSXianwei Zhao		serial0 = &uart_B;
19*ac4dfd0dSXianwei Zhao	};
20*ac4dfd0dSXianwei Zhao
21*ac4dfd0dSXianwei Zhao	memory@0 {
22*ac4dfd0dSXianwei Zhao		device_type = "memory";
23*ac4dfd0dSXianwei Zhao		reg = <0x0 0x0 0x0 0x40000000>;
24*ac4dfd0dSXianwei Zhao	};
25*ac4dfd0dSXianwei Zhao
26*ac4dfd0dSXianwei Zhao};
27*ac4dfd0dSXianwei Zhao
28*ac4dfd0dSXianwei Zhao&uart_B {
29*ac4dfd0dSXianwei Zhao	status = "okay";
30*ac4dfd0dSXianwei Zhao};
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