1ac4dfd0dSXianwei Zhao// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2ac4dfd0dSXianwei Zhao/*
3ac4dfd0dSXianwei Zhao * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
4ac4dfd0dSXianwei Zhao */
5ac4dfd0dSXianwei Zhao
6ac4dfd0dSXianwei Zhao/dts-v1/;
7ac4dfd0dSXianwei Zhao
8ac4dfd0dSXianwei Zhao#include "meson-s4.dtsi"
9ac4dfd0dSXianwei Zhao
10ac4dfd0dSXianwei Zhao/ {
11ac4dfd0dSXianwei Zhao	model = "Amlogic Meson S4 AQ222 Development Board";
12ac4dfd0dSXianwei Zhao	compatible = "amlogic,aq222", "amlogic,s4";
13ac4dfd0dSXianwei Zhao	interrupt-parent = <&gic>;
14ac4dfd0dSXianwei Zhao	#address-cells = <2>;
15ac4dfd0dSXianwei Zhao	#size-cells = <2>;
16ac4dfd0dSXianwei Zhao
17ac4dfd0dSXianwei Zhao	aliases {
18*0112d7f6SXianwei Zhao		serial0 = &uart_b;
19ac4dfd0dSXianwei Zhao	};
20ac4dfd0dSXianwei Zhao
21ac4dfd0dSXianwei Zhao	memory@0 {
22ac4dfd0dSXianwei Zhao		device_type = "memory";
23ac4dfd0dSXianwei Zhao		reg = <0x0 0x0 0x0 0x40000000>;
24ac4dfd0dSXianwei Zhao	};
25ac4dfd0dSXianwei Zhao
26ac4dfd0dSXianwei Zhao};
27ac4dfd0dSXianwei Zhao
28*0112d7f6SXianwei Zhao&uart_b {
29ac4dfd0dSXianwei Zhao	status = "okay";
30ac4dfd0dSXianwei Zhao};
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