1/*
2 * Copyright (c) 2016 Endless Computers, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 *  a) This library is free software; you can redistribute it and/or
11 *     modify it under the terms of the GNU General Public License as
12 *     published by the Free Software Foundation; either version 2 of the
13 *     License, or (at your option) any later version.
14 *
15 *     This library is distributed in the hope that it will be useful,
16 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
17 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18 *     GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 *  b) Permission is hereby granted, free of charge, to any person
23 *     obtaining a copy of this software and associated documentation
24 *     files (the "Software"), to deal in the Software without
25 *     restriction, including without limitation the rights to use,
26 *     copy, modify, merge, publish, distribute, sublicense, and/or
27 *     sell copies of the Software, and to permit persons to whom the
28 *     Software is furnished to do so, subject to the following
29 *     conditions:
30 *
31 *     The above copyright notice and this permission notice shall be
32 *     included in all copies or substantial portions of the Software.
33 *
34 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 *     OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44#include "meson-gx.dtsi"
45#include <dt-bindings/clock/gxbb-clkc.h>
46#include <dt-bindings/gpio/meson-gxbb-gpio.h>
47
48/ {
49	compatible = "amlogic,meson-gxl";
50};
51
52&aobus {
53	pinctrl_aobus: pinctrl@14 {
54		compatible = "amlogic,meson-gxl-aobus-pinctrl";
55		#address-cells = <2>;
56		#size-cells = <2>;
57		ranges;
58
59		gpio_ao: bank@14 {
60			reg = <0x0 0x00014 0x0 0x8>,
61			      <0x0 0x0002c 0x0 0x4>,
62			      <0x0 0x00024 0x0 0x8>;
63			reg-names = "mux", "pull", "gpio";
64			gpio-controller;
65			#gpio-cells = <2>;
66		};
67
68		uart_ao_a_pins: uart_ao_a {
69			mux {
70				groups = "uart_tx_ao_a", "uart_rx_ao_a";
71				function = "uart_ao";
72			};
73		};
74
75		remote_input_ao_pins: remote_input_ao {
76			mux {
77				groups = "remote_input_ao";
78				function = "remote_input_ao";
79			};
80		};
81	};
82};
83
84&periphs {
85	pinctrl_periphs: pinctrl@4b0 {
86		compatible = "amlogic,meson-gxl-periphs-pinctrl";
87		#address-cells = <2>;
88		#size-cells = <2>;
89		ranges;
90
91		gpio: bank@4b0 {
92			reg = <0x0 0x004b0 0x0 0x28>,
93			      <0x0 0x004e8 0x0 0x14>,
94			      <0x0 0x00120 0x0 0x14>,
95			      <0x0 0x00430 0x0 0x40>;
96			reg-names = "mux", "pull", "pull-enable", "gpio";
97			gpio-controller;
98			#gpio-cells = <2>;
99		};
100
101		emmc_pins: emmc {
102			mux {
103				groups = "emmc_nand_d07",
104				       "emmc_cmd",
105				       "emmc_clk",
106				       "emmc_ds";
107				function = "emmc";
108			};
109		};
110
111		sdcard_pins: sdcard {
112			mux {
113				groups = "sdcard_d0",
114				       "sdcard_d1",
115				       "sdcard_d2",
116				       "sdcard_d3",
117				       "sdcard_cmd",
118				       "sdcard_clk";
119				function = "sdcard";
120			};
121		};
122
123		sdio_pins: sdio {
124			mux {
125				groups = "sdio_d0",
126				       "sdio_d1",
127				       "sdio_d2",
128				       "sdio_d3",
129				       "sdio_cmd",
130				       "sdio_clk";
131				function = "sdio";
132			};
133		};
134
135		sdio_irq_pins: sdio_irq {
136			mux {
137				groups = "sdio_irq";
138				function = "sdio";
139			};
140		};
141
142		uart_a_pins: uart_a {
143			mux {
144				groups = "uart_tx_a",
145				       "uart_rx_a";
146				function = "uart_a";
147			};
148		};
149
150		uart_b_pins: uart_b {
151			mux {
152				groups = "uart_tx_b",
153				       "uart_rx_b";
154				function = "uart_b";
155			};
156		};
157
158		uart_c_pins: uart_c {
159			mux {
160				groups = "uart_tx_c",
161				       "uart_rx_c";
162				function = "uart_c";
163			};
164		};
165
166		i2c_a_pins: i2c_a {
167			mux {
168				groups = "i2c_sck_a",
169				     "i2c_sda_a";
170				function = "i2c_a";
171			};
172		};
173
174		i2c_b_pins: i2c_b {
175			mux {
176				groups = "i2c_sck_b",
177				      "i2c_sda_b";
178				function = "i2c_b";
179			};
180		};
181
182		i2c_c_pins: i2c_c {
183			mux {
184				groups = "i2c_sck_c",
185				      "i2c_sda_c";
186				function = "i2c_c";
187			};
188		};
189
190		eth_pins: eth_c {
191			mux {
192				groups = "eth_mdio",
193				       "eth_mdc",
194				       "eth_clk_rx_clk",
195				       "eth_rx_dv",
196				       "eth_rxd0",
197				       "eth_rxd1",
198				       "eth_rxd2",
199				       "eth_rxd3",
200				       "eth_rgmii_tx_clk",
201				       "eth_tx_en",
202				       "eth_txd0",
203				       "eth_txd1",
204				       "eth_txd2",
205				       "eth_txd3";
206				function = "eth";
207			};
208		};
209
210		pwm_e_pins: pwm_e {
211			mux {
212				groups = "pwm_e";
213				function = "pwm_e";
214			};
215		};
216	};
217};
218
219&hiubus {
220	clkc: clock-controller@0 {
221		compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
222		#clock-cells = <1>;
223		reg = <0x0 0x0 0x0 0x3db>;
224	};
225};
226
227&i2c_A {
228	clocks = <&clkc CLKID_I2C>;
229};
230
231&i2c_B {
232	clocks = <&clkc CLKID_I2C>;
233};
234
235&i2c_C {
236	clocks = <&clkc CLKID_I2C>;
237};
238
239&sd_emmc_a {
240	clocks = <&clkc CLKID_SD_EMMC_A>,
241		 <&xtal>,
242		 <&clkc CLKID_FCLK_DIV2>;
243	clock-names = "core", "clkin0", "clkin1";
244};
245
246&sd_emmc_b {
247	clocks = <&clkc CLKID_SD_EMMC_B>,
248		 <&xtal>,
249		 <&clkc CLKID_FCLK_DIV2>;
250       clock-names = "core", "clkin0", "clkin1";
251};
252
253&sd_emmc_c {
254	clocks = <&clkc CLKID_SD_EMMC_C>,
255		 <&xtal>,
256		 <&clkc CLKID_FCLK_DIV2>;
257	clock-names = "core", "clkin0", "clkin1";
258};
259