1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2018 BayLibre, SAS.
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Author: Jerome Brunet <jbrunet@baylibre.com>
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/input/input.h>
11#include <dt-bindings/sound/meson-aiu.h>
12
13#include "meson-gxl-s805x.dtsi"
14
15/ {
16	compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
17		     "amlogic,meson-gxl";
18	model = "Libre Computer AML-S805X-AC";
19
20	aliases {
21		serial0 = &uart_AO;
22		ethernet0 = &ethmac;
23		spi0 = &spifc;
24	};
25
26	chosen {
27		stdout-path = "serial0:115200n8";
28	};
29
30	cvbs-connector {
31		/*
32		 * The pads are present but no connector is soldered on
33		 * 2J2, so keep this off by default.
34		 */
35		status = "disabled";
36		compatible = "composite-video-connector";
37
38		port {
39			cvbs_connector_in: endpoint {
40				remote-endpoint = <&cvbs_vdac_out>;
41			};
42		};
43	};
44
45	dc_5v: regulator-dc_5v {
46		compatible = "regulator-fixed";
47		regulator-name = "DC_5V";
48		regulator-min-microvolt = <5000000>;
49		regulator-max-microvolt = <5000000>;
50		regulator-always-on;
51	};
52
53	emmc_pwrseq: emmc-pwrseq {
54		compatible = "mmc-pwrseq-emmc";
55		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
56	};
57
58	hdmi-connector {
59		compatible = "hdmi-connector";
60		type = "a";
61
62		port {
63			hdmi_connector_in: endpoint {
64				remote-endpoint = <&hdmi_tx_tmds_out>;
65			};
66		};
67	};
68
69	memory@0 {
70		device_type = "memory";
71		reg = <0x0 0x0 0x0 0x20000000>;
72	};
73
74	vcck: regulator-vcck {
75		compatible = "regulator-fixed";
76		regulator-name = "VCCK";
77		regulator-min-microvolt = <3300000>;
78		regulator-max-microvolt = <3300000>;
79		vin-supply = <&dc_5v>;
80
81		/*
82		 * This is controlled by GPIOAO_9 we reserve this but
83		 * claiming it as done below reset the board anyway
84		 * Need to investigate this
85		 *
86		 * gpio = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
87		 * enable-active-high;
88		 */
89		regulator-always-on;
90	};
91
92	vcc_3v3: regulator-vcc_3v3 {
93		compatible = "regulator-fixed";
94		regulator-name = "VCC_3V3";
95		regulator-min-microvolt = <3300000>;
96		regulator-max-microvolt = <3300000>;
97		vin-supply = <&dc_5v>;
98		regulator-always-on;
99	};
100
101	vddio_ao18: regulator-vddio_ao18 {
102		compatible = "regulator-fixed";
103		regulator-name = "VDDIO_AO18";
104		regulator-min-microvolt = <1800000>;
105		regulator-max-microvolt = <1800000>;
106		vin-supply = <&vcc_3v3>;
107		regulator-always-on;
108	};
109
110	vddio_boot: regulator-vddio_boot {
111		compatible = "regulator-fixed";
112		regulator-name = "VDDIO_BOOT";
113		regulator-min-microvolt = <1800000>;
114		regulator-max-microvolt = <1800000>;
115		vin-supply = <&vcc_3v3>;
116		regulator-always-on;
117	};
118
119	sound {
120		compatible = "amlogic,gx-sound-card";
121		model = "LIBRETECH-AC";
122		audio-widgets = "Speaker", "9J5-3 LEFT",
123				"Speaker", "9J5-2 RIGHT";
124		audio-routing = "9J5-3 LEFT", "ACODEC LOLN",
125				"9J5-2 RIGHT", "ACODEC LORN";
126		assigned-clocks = <&clkc CLKID_MPLL0>,
127				  <&clkc CLKID_MPLL1>,
128				  <&clkc CLKID_MPLL2>;
129		assigned-clock-parents = <0>, <0>, <0>;
130		assigned-clock-rates = <294912000>,
131				       <270950400>,
132				       <393216000>;
133
134		dai-link-0 {
135			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
136		};
137
138		dai-link-1 {
139			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
140			dai-format = "i2s";
141			mclk-fs = <256>;
142
143			codec-0 {
144				sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
145			};
146
147			codec-1 {
148				sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
149			};
150		};
151
152		dai-link-2 {
153			sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
154
155			codec-0 {
156				sound-dai = <&hdmi_tx>;
157			};
158		};
159
160		dai-link-3 {
161			sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
162
163			codec-0 {
164				sound-dai = <&acodec>;
165			};
166		};
167	};
168};
169
170&acodec {
171	AVDD-supply = <&vddio_ao18>;
172	status = "okay";
173};
174
175&aiu {
176	status = "okay";
177};
178
179&cec_AO {
180	status = "okay";
181	pinctrl-0 = <&ao_cec_pins>;
182	pinctrl-names = "default";
183	hdmi-phandle = <&hdmi_tx>;
184};
185
186&cvbs_vdac_port {
187	cvbs_vdac_out: endpoint {
188		remote-endpoint = <&cvbs_connector_in>;
189	};
190};
191
192&ethmac {
193	status = "okay";
194};
195
196&internal_phy {
197	pinctrl-0 = <&eth_link_led_pins>, <&eth_act_led_pins>;
198	pinctrl-names = "default";
199};
200
201&ir {
202	status = "okay";
203	pinctrl-0 = <&remote_input_ao_pins>;
204	pinctrl-names = "default";
205};
206
207&hdmi_tx {
208	status = "okay";
209	pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
210	pinctrl-names = "default";
211};
212
213&hdmi_tx_tmds_port {
214	hdmi_tx_tmds_out: endpoint {
215		remote-endpoint = <&hdmi_connector_in>;
216	};
217};
218
219&gpio_ao {
220	gpio-line-names = "UART TX",
221			  "UART RX",
222			  "7J1 Header Pin31",
223			  "", "", "", "",
224			  "IR In",
225			  "HDMI CEC",
226			  "5V VCCK Regulator",
227			  /* GPIO_TEST_N */
228			  "";
229};
230
231&gpio {
232	gpio-line-names = /* Bank GPIOZ */
233			  "", "", "", "", "", "", "",
234			  "", "", "", "", "", "", "",
235			  "Eth Link LED", "Eth Activity LED",
236			  /* Bank GPIOH */
237			  "HDMI HPD", "HDMI SDA", "HDMI SCL",
238			  "", "7J1 Header Pin13",
239			  "7J1 Header Pin15",
240			  "7J1 Header Pin7",
241			  "7J1 Header Pin12",
242			  "7J1 Header Pin16",
243			  "7J1 Header Pin18",
244			  /* Bank BOOT */
245			  "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
246			  "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
247			  "eMMC Clk", "eMMC Reset", "eMMC CMD",
248			  "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",
249			  "", "SPI NOR Chip Select",
250			  /* Bank CARD */
251			  "", "", "", "", "", "", "",
252			  /* Bank GPIODV */
253			  "", "", "", "", "", "", "", "", "", "", "", "",
254			  "", "", "", "", "", "", "", "", "", "", "", "",
255			  "7J1 Header Pin27", "7J1 Header Pin28", "",
256			  "7J1 Header Pin29",
257			  "VCCK Regulator", "VDDEE Regulator",
258			  /* Bank GPIOX */
259			  "7J1 Header Pin22", "7J1 Header Pin26",
260			  "7J1 Header Pin36", "7J1 Header Pin38",
261			  "7J1 Header Pin40", "7J1 Header Pin37",
262			  "7J1 Header Pin33", "7J1 Header Pin35",
263			  "7J1 Header Pin19", "7J1 Header Pin21",
264			  "7J1 Header Pin24", "7J1 Header Pin23",
265			  "7J1 Header Pin8", "7J1 Header Pin10",
266			  "", "", "7J1 Header Pin32", "", "",
267			  /* Bank GPIOCLK */
268			  "", "";
269};
270
271&saradc {
272	status = "okay";
273	vref-supply = <&vddio_boot>;
274};
275
276/* eMMC */
277&sd_emmc_c {
278	status = "okay";
279	pinctrl-0 = <&emmc_pins>;
280	pinctrl-1 = <&emmc_clk_gate_pins>;
281	pinctrl-names = "default", "clk-gate";
282
283	bus-width = <8>;
284	cap-mmc-highspeed;
285	mmc-ddr-1_8v;
286	mmc-hs200-1_8v;
287	max-frequency = <200000000>;
288	disable-wp;
289
290	mmc-pwrseq = <&emmc_pwrseq>;
291	vmmc-supply = <&vcc_3v3>;
292	vqmmc-supply = <&vddio_boot>;
293};
294
295&spifc {
296	status = "okay";
297	pinctrl-0 = <&nor_pins>;
298	pinctrl-names = "default";
299
300	w25q32: flash@0 {
301		#address-cells = <1>;
302		#size-cells = <1>;
303		compatible = "jedec,spi-nor";
304		reg = <0>;
305		spi-max-frequency = <3000000>;
306	};
307};
308
309&uart_AO {
310	status = "okay";
311	pinctrl-0 = <&uart_ao_a_pins>;
312	pinctrl-names = "default";
313};
314
315&usb {
316	status = "okay";
317	dr_mode = "host";
318};
319