1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Andreas Färber
4 *
5 * Copyright (c) 2016 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 *
8 * Copyright (c) 2016 Endless Computers, Inc.
9 * Author: Carlo Caione <carlo@endlessm.com>
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/power/meson-gxbb-power.h>
16#include <dt-bindings/thermal/thermal.h>
17
18/ {
19	interrupt-parent = <&gic>;
20	#address-cells = <2>;
21	#size-cells = <2>;
22
23	aliases {
24		mmc0 = &sd_emmc_b; /* SD card */
25		mmc1 = &sd_emmc_c; /* eMMC */
26		mmc2 = &sd_emmc_a; /* SDIO */
27	};
28
29	reserved-memory {
30		#address-cells = <2>;
31		#size-cells = <2>;
32		ranges;
33
34		/* 16 MiB reserved for Hardware ROM Firmware */
35		hwrom_reserved: hwrom@0 {
36			reg = <0x0 0x0 0x0 0x1000000>;
37			no-map;
38		};
39
40		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
41		secmon_reserved: secmon@10000000 {
42			reg = <0x0 0x10000000 0x0 0x200000>;
43			no-map;
44		};
45
46		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
47		secmon_reserved_alt: secmon@5000000 {
48			reg = <0x0 0x05000000 0x0 0x300000>;
49			no-map;
50		};
51
52		linux,cma {
53			compatible = "shared-dma-pool";
54			reusable;
55			size = <0x0 0x10000000>;
56			alignment = <0x0 0x400000>;
57			linux,cma-default;
58		};
59	};
60
61	chosen {
62		#address-cells = <2>;
63		#size-cells = <2>;
64		ranges;
65
66		simplefb_cvbs: framebuffer-cvbs {
67			compatible = "amlogic,simple-framebuffer",
68				     "simple-framebuffer";
69			amlogic,pipeline = "vpu-cvbs";
70			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
71			status = "disabled";
72		};
73
74		simplefb_hdmi: framebuffer-hdmi {
75			compatible = "amlogic,simple-framebuffer",
76				     "simple-framebuffer";
77			amlogic,pipeline = "vpu-hdmi";
78			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
79			status = "disabled";
80		};
81	};
82
83	cpus {
84		#address-cells = <0x2>;
85		#size-cells = <0x0>;
86
87		cpu0: cpu@0 {
88			device_type = "cpu";
89			compatible = "arm,cortex-a53";
90			reg = <0x0 0x0>;
91			enable-method = "psci";
92			next-level-cache = <&l2>;
93			clocks = <&scpi_dvfs 0>;
94			#cooling-cells = <2>;
95		};
96
97		cpu1: cpu@1 {
98			device_type = "cpu";
99			compatible = "arm,cortex-a53";
100			reg = <0x0 0x1>;
101			enable-method = "psci";
102			next-level-cache = <&l2>;
103			clocks = <&scpi_dvfs 0>;
104			#cooling-cells = <2>;
105		};
106
107		cpu2: cpu@2 {
108			device_type = "cpu";
109			compatible = "arm,cortex-a53";
110			reg = <0x0 0x2>;
111			enable-method = "psci";
112			next-level-cache = <&l2>;
113			clocks = <&scpi_dvfs 0>;
114			#cooling-cells = <2>;
115		};
116
117		cpu3: cpu@3 {
118			device_type = "cpu";
119			compatible = "arm,cortex-a53";
120			reg = <0x0 0x3>;
121			enable-method = "psci";
122			next-level-cache = <&l2>;
123			clocks = <&scpi_dvfs 0>;
124			#cooling-cells = <2>;
125		};
126
127		l2: l2-cache0 {
128			compatible = "cache";
129		};
130	};
131
132	thermal-zones {
133		cpu-thermal {
134			polling-delay-passive = <250>; /* milliseconds */
135			polling-delay = <1000>; /* milliseconds */
136
137			thermal-sensors = <&scpi_sensors 0>;
138
139			trips {
140				cpu_passive: cpu-passive {
141					temperature = <80000>; /* millicelsius */
142					hysteresis = <2000>; /* millicelsius */
143					type = "passive";
144				};
145
146				cpu_hot: cpu-hot {
147					temperature = <90000>; /* millicelsius */
148					hysteresis = <2000>; /* millicelsius */
149					type = "hot";
150				};
151
152				cpu_critical: cpu-critical {
153					temperature = <110000>; /* millicelsius */
154					hysteresis = <2000>; /* millicelsius */
155					type = "critical";
156				};
157			};
158
159			cpu_cooling_maps: cooling-maps {
160				map0 {
161					trip = <&cpu_passive>;
162					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
163							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
164							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
165							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
166				};
167
168				map1 {
169					trip = <&cpu_hot>;
170					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
171							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
172							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
173							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
174				};
175			};
176		};
177	};
178
179	arm-pmu {
180		compatible = "arm,cortex-a53-pmu";
181		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
182			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
183			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
184			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
185		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
186	};
187
188	psci {
189		compatible = "arm,psci-0.2";
190		method = "smc";
191	};
192
193	timer {
194		compatible = "arm,armv8-timer";
195		interrupts = <GIC_PPI 13
196			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
197			     <GIC_PPI 14
198			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
199			     <GIC_PPI 11
200			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
201			     <GIC_PPI 10
202			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
203	};
204
205	xtal: xtal-clk {
206		compatible = "fixed-clock";
207		clock-frequency = <24000000>;
208		clock-output-names = "xtal";
209		#clock-cells = <0>;
210	};
211
212	firmware {
213		sm: secure-monitor {
214			compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
215		};
216	};
217
218	efuse: efuse {
219		compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
220		#address-cells = <1>;
221		#size-cells = <1>;
222		read-only;
223		secure-monitor = <&sm>;
224
225		sn: sn@14 {
226			reg = <0x14 0x10>;
227		};
228
229		eth_mac: eth_mac@34 {
230			reg = <0x34 0x10>;
231		};
232
233		bid: bid@46 {
234			reg = <0x46 0x30>;
235		};
236	};
237
238	scpi {
239		compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
240		mboxes = <&mailbox 1 &mailbox 2>;
241		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
242
243		scpi_clocks: clocks {
244			compatible = "arm,scpi-clocks";
245
246			scpi_dvfs: scpi_clocks@0 {
247				compatible = "arm,scpi-dvfs-clocks";
248				#clock-cells = <1>;
249				clock-indices = <0>;
250				clock-output-names = "vcpu";
251			};
252		};
253
254		scpi_sensors: sensors {
255			compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
256			#thermal-sensor-cells = <1>;
257		};
258	};
259
260	soc {
261		compatible = "simple-bus";
262		#address-cells = <2>;
263		#size-cells = <2>;
264		ranges;
265
266		cbus: bus@c1100000 {
267			compatible = "simple-bus";
268			reg = <0x0 0xc1100000 0x0 0x100000>;
269			#address-cells = <2>;
270			#size-cells = <2>;
271			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
272
273			gpio_intc: interrupt-controller@9880 {
274				compatible = "amlogic,meson-gpio-intc";
275				reg = <0x0 0x9880 0x0 0x10>;
276				interrupt-controller;
277				#interrupt-cells = <2>;
278				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
279				status = "disabled";
280			};
281
282			reset: reset-controller@4404 {
283				compatible = "amlogic,meson-gxbb-reset";
284				reg = <0x0 0x04404 0x0 0x9c>;
285				#reset-cells = <1>;
286			};
287
288			aiu: audio-controller@5400 {
289				compatible = "amlogic,aiu";
290				#sound-dai-cells = <2>;
291				sound-name-prefix = "AIU";
292				reg = <0x0 0x5400 0x0 0x2ac>;
293				interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
294					     <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
295				interrupt-names = "i2s", "spdif";
296				status = "disabled";
297			};
298
299			uart_A: serial@84c0 {
300				compatible = "amlogic,meson-gx-uart";
301				reg = <0x0 0x84c0 0x0 0x18>;
302				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
303				status = "disabled";
304				fifo-size = <128>;
305			};
306
307			uart_B: serial@84dc {
308				compatible = "amlogic,meson-gx-uart";
309				reg = <0x0 0x84dc 0x0 0x18>;
310				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
311				status = "disabled";
312			};
313
314			i2c_A: i2c@8500 {
315				compatible = "amlogic,meson-gxbb-i2c";
316				reg = <0x0 0x08500 0x0 0x20>;
317				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
318				#address-cells = <1>;
319				#size-cells = <0>;
320				status = "disabled";
321			};
322
323			pwm_ab: pwm@8550 {
324				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
325				reg = <0x0 0x08550 0x0 0x10>;
326				#pwm-cells = <3>;
327				status = "disabled";
328			};
329
330			pwm_cd: pwm@8650 {
331				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
332				reg = <0x0 0x08650 0x0 0x10>;
333				#pwm-cells = <3>;
334				status = "disabled";
335			};
336
337			saradc: adc@8680 {
338				compatible = "amlogic,meson-saradc";
339				reg = <0x0 0x8680 0x0 0x34>;
340				#io-channel-cells = <1>;
341				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
342				status = "disabled";
343			};
344
345			pwm_ef: pwm@86c0 {
346				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
347				reg = <0x0 0x086c0 0x0 0x10>;
348				#pwm-cells = <3>;
349				status = "disabled";
350			};
351
352			uart_C: serial@8700 {
353				compatible = "amlogic,meson-gx-uart";
354				reg = <0x0 0x8700 0x0 0x18>;
355				interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
356				status = "disabled";
357			};
358
359			clock-measure@8758 {
360				compatible = "amlogic,meson-gx-clk-measure";
361				reg = <0x0 0x8758 0x0 0x10>;
362			};
363
364			i2c_B: i2c@87c0 {
365				compatible = "amlogic,meson-gxbb-i2c";
366				reg = <0x0 0x087c0 0x0 0x20>;
367				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
368				#address-cells = <1>;
369				#size-cells = <0>;
370				status = "disabled";
371			};
372
373			i2c_C: i2c@87e0 {
374				compatible = "amlogic,meson-gxbb-i2c";
375				reg = <0x0 0x087e0 0x0 0x20>;
376				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
377				#address-cells = <1>;
378				#size-cells = <0>;
379				status = "disabled";
380			};
381
382			spicc: spi@8d80 {
383				compatible = "amlogic,meson-gx-spicc";
384				reg = <0x0 0x08d80 0x0 0x80>;
385				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
386				#address-cells = <1>;
387				#size-cells = <0>;
388				status = "disabled";
389			};
390
391			spifc: spi@8c80 {
392				compatible = "amlogic,meson-gxbb-spifc";
393				reg = <0x0 0x08c80 0x0 0x80>;
394				#address-cells = <1>;
395				#size-cells = <0>;
396				status = "disabled";
397			};
398
399			watchdog@98d0 {
400				compatible = "amlogic,meson-gxbb-wdt";
401				reg = <0x0 0x098d0 0x0 0x10>;
402				clocks = <&xtal>;
403			};
404		};
405
406		gic: interrupt-controller@c4301000 {
407			compatible = "arm,gic-400";
408			reg = <0x0 0xc4301000 0 0x1000>,
409			      <0x0 0xc4302000 0 0x2000>,
410			      <0x0 0xc4304000 0 0x2000>,
411			      <0x0 0xc4306000 0 0x2000>;
412			interrupt-controller;
413			interrupts = <GIC_PPI 9
414				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
415			#interrupt-cells = <3>;
416			#address-cells = <0>;
417		};
418
419		sram: sram@c8000000 {
420			compatible = "mmio-sram";
421			reg = <0x0 0xc8000000 0x0 0x14000>;
422
423			#address-cells = <1>;
424			#size-cells = <1>;
425			ranges = <0 0x0 0xc8000000 0x14000>;
426
427			cpu_scp_lpri: scp-sram@0 {
428				compatible = "amlogic,meson-gxbb-scp-shmem";
429				reg = <0x13000 0x400>;
430			};
431
432			cpu_scp_hpri: scp-sram@200 {
433				compatible = "amlogic,meson-gxbb-scp-shmem";
434				reg = <0x13400 0x400>;
435			};
436		};
437
438		aobus: bus@c8100000 {
439			compatible = "simple-bus";
440			reg = <0x0 0xc8100000 0x0 0x100000>;
441			#address-cells = <2>;
442			#size-cells = <2>;
443			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
444
445			sysctrl_AO: sys-ctrl@0 {
446				compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
447				reg =  <0x0 0x0 0x0 0x100>;
448
449				clkc_AO: clock-controller {
450					compatible = "amlogic,meson-gx-aoclkc";
451					#clock-cells = <1>;
452					#reset-cells = <1>;
453				};
454			};
455
456			cec_AO: cec@100 {
457				compatible = "amlogic,meson-gx-ao-cec";
458				reg = <0x0 0x00100 0x0 0x14>;
459				interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
460				status = "disabled";
461			};
462
463			sec_AO: ao-secure@140 {
464				compatible = "amlogic,meson-gx-ao-secure", "syscon";
465				reg = <0x0 0x140 0x0 0x140>;
466				amlogic,has-chip-id;
467			};
468
469			uart_AO: serial@4c0 {
470				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
471				reg = <0x0 0x004c0 0x0 0x18>;
472				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
473				status = "disabled";
474			};
475
476			uart_AO_B: serial@4e0 {
477				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
478				reg = <0x0 0x004e0 0x0 0x18>;
479				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
480				status = "disabled";
481			};
482
483			i2c_AO: i2c@500 {
484				compatible = "amlogic,meson-gxbb-i2c";
485				reg = <0x0 0x500 0x0 0x20>;
486				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
487				#address-cells = <1>;
488				#size-cells = <0>;
489				status = "disabled";
490			};
491
492			pwm_AO_ab: pwm@550 {
493				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
494				reg = <0x0 0x00550 0x0 0x10>;
495				#pwm-cells = <3>;
496				status = "disabled";
497			};
498
499			ir: ir@580 {
500				compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
501				reg = <0x0 0x00580 0x0 0x40>;
502				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
503				status = "disabled";
504			};
505		};
506
507		vdec: video-codec@c8820000 {
508			compatible = "amlogic,gx-vdec";
509			reg = <0x0 0xc8820000 0x0 0x10000>,
510			      <0x0 0xc110a580 0x0 0xe4>;
511			reg-names = "dos", "esparser";
512
513			interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
514				     <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
515			interrupt-names = "vdec", "esparser";
516
517			amlogic,ao-sysctrl = <&sysctrl_AO>;
518			amlogic,canvas = <&canvas>;
519		};
520
521		periphs: bus@c8834000 {
522			compatible = "simple-bus";
523			reg = <0x0 0xc8834000 0x0 0x2000>;
524			#address-cells = <2>;
525			#size-cells = <2>;
526			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
527
528			hwrng: rng {
529				compatible = "amlogic,meson-rng";
530				reg = <0x0 0x0 0x0 0x4>;
531			};
532		};
533
534		dmcbus: bus@c8838000 {
535			compatible = "simple-bus";
536			reg = <0x0 0xc8838000 0x0 0x400>;
537			#address-cells = <2>;
538			#size-cells = <2>;
539			ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
540
541			canvas: video-lut@48 {
542				compatible = "amlogic,canvas";
543				reg = <0x0 0x48 0x0 0x14>;
544			};
545		};
546
547		hiubus: bus@c883c000 {
548			compatible = "simple-bus";
549			reg = <0x0 0xc883c000 0x0 0x2000>;
550			#address-cells = <2>;
551			#size-cells = <2>;
552			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
553
554			sysctrl: system-controller@0 {
555				compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
556				reg = <0 0 0 0x400>;
557
558				pwrc: power-controller {
559					compatible = "amlogic,meson-gxbb-pwrc";
560					#power-domain-cells = <1>;
561					amlogic,ao-sysctrl = <&sysctrl_AO>;
562				};
563			};
564
565			mailbox: mailbox@404 {
566				compatible = "amlogic,meson-gxbb-mhu";
567				reg = <0 0x404 0 0x4c>;
568				interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
569					     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
570					     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
571				#mbox-cells = <1>;
572			};
573		};
574
575		ethmac: ethernet@c9410000 {
576			compatible = "amlogic,meson-gxbb-dwmac",
577				     "snps,dwmac-3.70a",
578				     "snps,dwmac";
579			reg = <0x0 0xc9410000 0x0 0x10000>,
580			      <0x0 0xc8834540 0x0 0x4>;
581			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
582			interrupt-names = "macirq";
583			rx-fifo-depth = <4096>;
584			tx-fifo-depth = <2048>;
585			power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
586			status = "disabled";
587		};
588
589		apb: apb@d0000000 {
590			compatible = "simple-bus";
591			reg = <0x0 0xd0000000 0x0 0x200000>;
592			#address-cells = <2>;
593			#size-cells = <2>;
594			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
595
596			sd_emmc_a: mmc@70000 {
597				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
598				reg = <0x0 0x70000 0x0 0x800>;
599				interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
600				status = "disabled";
601			};
602
603			sd_emmc_b: mmc@72000 {
604				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
605				reg = <0x0 0x72000 0x0 0x800>;
606				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
607				status = "disabled";
608			};
609
610			sd_emmc_c: mmc@74000 {
611				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
612				reg = <0x0 0x74000 0x0 0x800>;
613				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
614				status = "disabled";
615			};
616		};
617
618		vpu: vpu@d0100000 {
619			compatible = "amlogic,meson-gx-vpu";
620			reg = <0x0 0xd0100000 0x0 0x100000>,
621			      <0x0 0xc883c000 0x0 0x1000>;
622			reg-names = "vpu", "hhi";
623			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
624			#address-cells = <1>;
625			#size-cells = <0>;
626			amlogic,canvas = <&canvas>;
627
628			/* CVBS VDAC output port */
629			cvbs_vdac_port: port@0 {
630				reg = <0>;
631			};
632
633			/* HDMI-TX output port */
634			hdmi_tx_port: port@1 {
635				reg = <1>;
636
637				hdmi_tx_out: endpoint {
638					remote-endpoint = <&hdmi_tx_in>;
639				};
640			};
641		};
642
643		hdmi_tx: hdmi-tx@c883a000 {
644			compatible = "amlogic,meson-gx-dw-hdmi";
645			reg = <0x0 0xc883a000 0x0 0x1c>;
646			interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
647			#address-cells = <1>;
648			#size-cells = <0>;
649			#sound-dai-cells = <0>;
650			sound-name-prefix = "HDMITX";
651			status = "disabled";
652
653			/* VPU VENC Input */
654			hdmi_tx_venc_port: port@0 {
655				reg = <0>;
656
657				hdmi_tx_in: endpoint {
658					remote-endpoint = <&hdmi_tx_out>;
659				};
660			};
661
662			/* TMDS Output */
663			hdmi_tx_tmds_port: port@1 {
664				reg = <1>;
665			};
666		};
667	};
668};
669