1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016 Andreas Färber
4 *
5 * Copyright (c) 2016 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 *
8 * Copyright (c) 2016 Endless Computers, Inc.
9 * Author: Carlo Caione <carlo@endlessm.com>
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/power/meson-gxbb-power.h>
16#include <dt-bindings/thermal/thermal.h>
17
18/ {
19	interrupt-parent = <&gic>;
20	#address-cells = <2>;
21	#size-cells = <2>;
22
23	aliases {
24		mmc0 = &sd_emmc_b; /* SD card */
25		mmc1 = &sd_emmc_c; /* eMMC */
26		mmc2 = &sd_emmc_a; /* SDIO */
27	};
28
29	reserved-memory {
30		#address-cells = <2>;
31		#size-cells = <2>;
32		ranges;
33
34		/* 16 MiB reserved for Hardware ROM Firmware */
35		hwrom_reserved: hwrom@0 {
36			reg = <0x0 0x0 0x0 0x1000000>;
37			no-map;
38		};
39
40		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
41		secmon_reserved: secmon@10000000 {
42			reg = <0x0 0x10000000 0x0 0x200000>;
43			no-map;
44		};
45
46		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
47		secmon_reserved_alt: secmon@5000000 {
48			reg = <0x0 0x05000000 0x0 0x300000>;
49			no-map;
50		};
51
52		/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
53		secmon_reserved_bl32: secmon@5300000 {
54			reg = <0x0 0x05300000 0x0 0x2000000>;
55			no-map;
56		};
57
58		linux,cma {
59			compatible = "shared-dma-pool";
60			reusable;
61			size = <0x0 0x10000000>;
62			alignment = <0x0 0x400000>;
63			linux,cma-default;
64		};
65	};
66
67	chosen {
68		#address-cells = <2>;
69		#size-cells = <2>;
70		ranges;
71
72		simplefb_cvbs: framebuffer-cvbs {
73			compatible = "amlogic,simple-framebuffer",
74				     "simple-framebuffer";
75			amlogic,pipeline = "vpu-cvbs";
76			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
77			status = "disabled";
78		};
79
80		simplefb_hdmi: framebuffer-hdmi {
81			compatible = "amlogic,simple-framebuffer",
82				     "simple-framebuffer";
83			amlogic,pipeline = "vpu-hdmi";
84			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
85			status = "disabled";
86		};
87	};
88
89	cpus {
90		#address-cells = <0x2>;
91		#size-cells = <0x0>;
92
93		cpu0: cpu@0 {
94			device_type = "cpu";
95			compatible = "arm,cortex-a53";
96			reg = <0x0 0x0>;
97			enable-method = "psci";
98			next-level-cache = <&l2>;
99			clocks = <&scpi_dvfs 0>;
100			#cooling-cells = <2>;
101		};
102
103		cpu1: cpu@1 {
104			device_type = "cpu";
105			compatible = "arm,cortex-a53";
106			reg = <0x0 0x1>;
107			enable-method = "psci";
108			next-level-cache = <&l2>;
109			clocks = <&scpi_dvfs 0>;
110			#cooling-cells = <2>;
111		};
112
113		cpu2: cpu@2 {
114			device_type = "cpu";
115			compatible = "arm,cortex-a53";
116			reg = <0x0 0x2>;
117			enable-method = "psci";
118			next-level-cache = <&l2>;
119			clocks = <&scpi_dvfs 0>;
120			#cooling-cells = <2>;
121		};
122
123		cpu3: cpu@3 {
124			device_type = "cpu";
125			compatible = "arm,cortex-a53";
126			reg = <0x0 0x3>;
127			enable-method = "psci";
128			next-level-cache = <&l2>;
129			clocks = <&scpi_dvfs 0>;
130			#cooling-cells = <2>;
131		};
132
133		l2: l2-cache0 {
134			compatible = "cache";
135			cache-level = <2>;
136		};
137	};
138
139	thermal-zones {
140		cpu-thermal {
141			polling-delay-passive = <250>; /* milliseconds */
142			polling-delay = <1000>; /* milliseconds */
143
144			thermal-sensors = <&scpi_sensors 0>;
145
146			trips {
147				cpu_passive: cpu-passive {
148					temperature = <80000>; /* millicelsius */
149					hysteresis = <2000>; /* millicelsius */
150					type = "passive";
151				};
152
153				cpu_hot: cpu-hot {
154					temperature = <90000>; /* millicelsius */
155					hysteresis = <2000>; /* millicelsius */
156					type = "hot";
157				};
158
159				cpu_critical: cpu-critical {
160					temperature = <110000>; /* millicelsius */
161					hysteresis = <2000>; /* millicelsius */
162					type = "critical";
163				};
164			};
165
166			cpu_cooling_maps: cooling-maps {
167				map0 {
168					trip = <&cpu_passive>;
169					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
170							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
171							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
172							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
173				};
174
175				map1 {
176					trip = <&cpu_hot>;
177					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
178							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
179							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
180							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
181				};
182			};
183		};
184	};
185
186	arm-pmu {
187		compatible = "arm,cortex-a53-pmu";
188		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
189			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
190			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
191			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
192		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
193	};
194
195	psci {
196		compatible = "arm,psci-0.2";
197		method = "smc";
198	};
199
200	timer {
201		compatible = "arm,armv8-timer";
202		interrupts = <GIC_PPI 13
203			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
204			     <GIC_PPI 14
205			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
206			     <GIC_PPI 11
207			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
208			     <GIC_PPI 10
209			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
210	};
211
212	xtal: xtal-clk {
213		compatible = "fixed-clock";
214		clock-frequency = <24000000>;
215		clock-output-names = "xtal";
216		#clock-cells = <0>;
217	};
218
219	firmware {
220		sm: secure-monitor {
221			compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
222		};
223	};
224
225	efuse: efuse {
226		compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
227		#address-cells = <1>;
228		#size-cells = <1>;
229		read-only;
230		secure-monitor = <&sm>;
231
232		sn: sn@14 {
233			reg = <0x14 0x10>;
234		};
235
236		eth_mac: eth_mac@34 {
237			reg = <0x34 0x10>;
238		};
239
240		bid: bid@46 {
241			reg = <0x46 0x30>;
242		};
243	};
244
245	scpi {
246		compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
247		mboxes = <&mailbox 1 &mailbox 2>;
248		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
249
250		scpi_clocks: clocks {
251			compatible = "arm,scpi-clocks";
252
253			scpi_dvfs: scpi_clocks@0 {
254				compatible = "arm,scpi-dvfs-clocks";
255				#clock-cells = <1>;
256				clock-indices = <0>;
257				clock-output-names = "vcpu";
258			};
259		};
260
261		scpi_sensors: sensors {
262			compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
263			#thermal-sensor-cells = <1>;
264		};
265	};
266
267	soc {
268		compatible = "simple-bus";
269		#address-cells = <2>;
270		#size-cells = <2>;
271		ranges;
272
273		cbus: bus@c1100000 {
274			compatible = "simple-bus";
275			reg = <0x0 0xc1100000 0x0 0x100000>;
276			#address-cells = <2>;
277			#size-cells = <2>;
278			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
279
280			gpio_intc: interrupt-controller@9880 {
281				compatible = "amlogic,meson-gpio-intc";
282				reg = <0x0 0x9880 0x0 0x10>;
283				interrupt-controller;
284				#interrupt-cells = <2>;
285				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
286				status = "disabled";
287			};
288
289			reset: reset-controller@4404 {
290				compatible = "amlogic,meson-gxbb-reset";
291				reg = <0x0 0x04404 0x0 0x9c>;
292				#reset-cells = <1>;
293			};
294
295			aiu: audio-controller@5400 {
296				compatible = "amlogic,aiu";
297				#sound-dai-cells = <2>;
298				sound-name-prefix = "AIU";
299				reg = <0x0 0x5400 0x0 0x2ac>;
300				interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
301					     <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
302				interrupt-names = "i2s", "spdif";
303				status = "disabled";
304			};
305
306			uart_A: serial@84c0 {
307				compatible = "amlogic,meson-gx-uart";
308				reg = <0x0 0x84c0 0x0 0x18>;
309				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
310				status = "disabled";
311				fifo-size = <128>;
312			};
313
314			uart_B: serial@84dc {
315				compatible = "amlogic,meson-gx-uart";
316				reg = <0x0 0x84dc 0x0 0x18>;
317				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
318				status = "disabled";
319			};
320
321			i2c_A: i2c@8500 {
322				compatible = "amlogic,meson-gxbb-i2c";
323				reg = <0x0 0x08500 0x0 0x20>;
324				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
325				#address-cells = <1>;
326				#size-cells = <0>;
327				status = "disabled";
328			};
329
330			pwm_ab: pwm@8550 {
331				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
332				reg = <0x0 0x08550 0x0 0x10>;
333				#pwm-cells = <3>;
334				status = "disabled";
335			};
336
337			pwm_cd: pwm@8650 {
338				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
339				reg = <0x0 0x08650 0x0 0x10>;
340				#pwm-cells = <3>;
341				status = "disabled";
342			};
343
344			saradc: adc@8680 {
345				compatible = "amlogic,meson-saradc";
346				reg = <0x0 0x8680 0x0 0x34>;
347				#io-channel-cells = <1>;
348				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
349				status = "disabled";
350			};
351
352			pwm_ef: pwm@86c0 {
353				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
354				reg = <0x0 0x086c0 0x0 0x10>;
355				#pwm-cells = <3>;
356				status = "disabled";
357			};
358
359			uart_C: serial@8700 {
360				compatible = "amlogic,meson-gx-uart";
361				reg = <0x0 0x8700 0x0 0x18>;
362				interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
363				status = "disabled";
364			};
365
366			clock-measure@8758 {
367				compatible = "amlogic,meson-gx-clk-measure";
368				reg = <0x0 0x8758 0x0 0x10>;
369			};
370
371			i2c_B: i2c@87c0 {
372				compatible = "amlogic,meson-gxbb-i2c";
373				reg = <0x0 0x087c0 0x0 0x20>;
374				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
375				#address-cells = <1>;
376				#size-cells = <0>;
377				status = "disabled";
378			};
379
380			i2c_C: i2c@87e0 {
381				compatible = "amlogic,meson-gxbb-i2c";
382				reg = <0x0 0x087e0 0x0 0x20>;
383				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
384				#address-cells = <1>;
385				#size-cells = <0>;
386				status = "disabled";
387			};
388
389			spicc: spi@8d80 {
390				compatible = "amlogic,meson-gx-spicc";
391				reg = <0x0 0x08d80 0x0 0x80>;
392				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
393				#address-cells = <1>;
394				#size-cells = <0>;
395				status = "disabled";
396			};
397
398			spifc: spi@8c80 {
399				compatible = "amlogic,meson-gxbb-spifc";
400				reg = <0x0 0x08c80 0x0 0x80>;
401				#address-cells = <1>;
402				#size-cells = <0>;
403				status = "disabled";
404			};
405
406			watchdog@98d0 {
407				compatible = "amlogic,meson-gxbb-wdt";
408				reg = <0x0 0x098d0 0x0 0x10>;
409				clocks = <&xtal>;
410			};
411		};
412
413		gic: interrupt-controller@c4301000 {
414			compatible = "arm,gic-400";
415			reg = <0x0 0xc4301000 0 0x1000>,
416			      <0x0 0xc4302000 0 0x2000>,
417			      <0x0 0xc4304000 0 0x2000>,
418			      <0x0 0xc4306000 0 0x2000>;
419			interrupt-controller;
420			interrupts = <GIC_PPI 9
421				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
422			#interrupt-cells = <3>;
423			#address-cells = <0>;
424		};
425
426		sram: sram@c8000000 {
427			compatible = "mmio-sram";
428			reg = <0x0 0xc8000000 0x0 0x14000>;
429
430			#address-cells = <1>;
431			#size-cells = <1>;
432			ranges = <0 0x0 0xc8000000 0x14000>;
433
434			cpu_scp_lpri: scp-sram@0 {
435				compatible = "amlogic,meson-gxbb-scp-shmem";
436				reg = <0x13000 0x400>;
437			};
438
439			cpu_scp_hpri: scp-sram@200 {
440				compatible = "amlogic,meson-gxbb-scp-shmem";
441				reg = <0x13400 0x400>;
442			};
443		};
444
445		aobus: bus@c8100000 {
446			compatible = "simple-bus";
447			reg = <0x0 0xc8100000 0x0 0x100000>;
448			#address-cells = <2>;
449			#size-cells = <2>;
450			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
451
452			sysctrl_AO: sys-ctrl@0 {
453				compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
454				reg = <0x0 0x0 0x0 0x100>;
455
456				clkc_AO: clock-controller {
457					compatible = "amlogic,meson-gx-aoclkc";
458					#clock-cells = <1>;
459					#reset-cells = <1>;
460				};
461			};
462
463			cec_AO: cec@100 {
464				compatible = "amlogic,meson-gx-ao-cec";
465				reg = <0x0 0x00100 0x0 0x14>;
466				interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
467				status = "disabled";
468			};
469
470			sec_AO: ao-secure@140 {
471				compatible = "amlogic,meson-gx-ao-secure", "syscon";
472				reg = <0x0 0x140 0x0 0x140>;
473				amlogic,has-chip-id;
474			};
475
476			uart_AO: serial@4c0 {
477				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
478				reg = <0x0 0x004c0 0x0 0x18>;
479				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
480				status = "disabled";
481			};
482
483			uart_AO_B: serial@4e0 {
484				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
485				reg = <0x0 0x004e0 0x0 0x18>;
486				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
487				status = "disabled";
488			};
489
490			i2c_AO: i2c@500 {
491				compatible = "amlogic,meson-gxbb-i2c";
492				reg = <0x0 0x500 0x0 0x20>;
493				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
494				#address-cells = <1>;
495				#size-cells = <0>;
496				status = "disabled";
497			};
498
499			pwm_AO_ab: pwm@550 {
500				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
501				reg = <0x0 0x00550 0x0 0x10>;
502				#pwm-cells = <3>;
503				status = "disabled";
504			};
505
506			ir: ir@580 {
507				compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
508				reg = <0x0 0x00580 0x0 0x40>;
509				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
510				status = "disabled";
511			};
512		};
513
514		vdec: video-codec@c8820000 {
515			compatible = "amlogic,gx-vdec";
516			reg = <0x0 0xc8820000 0x0 0x10000>,
517			      <0x0 0xc110a580 0x0 0xe4>;
518			reg-names = "dos", "esparser";
519
520			interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
521				     <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
522			interrupt-names = "vdec", "esparser";
523
524			amlogic,ao-sysctrl = <&sysctrl_AO>;
525			amlogic,canvas = <&canvas>;
526		};
527
528		periphs: bus@c8834000 {
529			compatible = "simple-bus";
530			reg = <0x0 0xc8834000 0x0 0x2000>;
531			#address-cells = <2>;
532			#size-cells = <2>;
533			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
534
535			hwrng: rng {
536				compatible = "amlogic,meson-rng";
537				reg = <0x0 0x0 0x0 0x4>;
538			};
539		};
540
541		dmcbus: bus@c8838000 {
542			compatible = "simple-bus";
543			reg = <0x0 0xc8838000 0x0 0x400>;
544			#address-cells = <2>;
545			#size-cells = <2>;
546			ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
547
548			canvas: video-lut@48 {
549				compatible = "amlogic,canvas";
550				reg = <0x0 0x48 0x0 0x14>;
551			};
552		};
553
554		hiubus: bus@c883c000 {
555			compatible = "simple-bus";
556			reg = <0x0 0xc883c000 0x0 0x2000>;
557			#address-cells = <2>;
558			#size-cells = <2>;
559			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
560
561			sysctrl: system-controller@0 {
562				compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
563				reg = <0 0 0 0x400>;
564
565				pwrc: power-controller {
566					compatible = "amlogic,meson-gxbb-pwrc";
567					#power-domain-cells = <1>;
568					amlogic,ao-sysctrl = <&sysctrl_AO>;
569				};
570			};
571
572			mailbox: mailbox@404 {
573				compatible = "amlogic,meson-gxbb-mhu";
574				reg = <0 0x404 0 0x4c>;
575				interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
576					     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
577					     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
578				#mbox-cells = <1>;
579			};
580		};
581
582		ethmac: ethernet@c9410000 {
583			compatible = "amlogic,meson-gxbb-dwmac",
584				     "snps,dwmac-3.70a",
585				     "snps,dwmac";
586			reg = <0x0 0xc9410000 0x0 0x10000>,
587			      <0x0 0xc8834540 0x0 0x4>;
588			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
589			interrupt-names = "macirq";
590			rx-fifo-depth = <4096>;
591			tx-fifo-depth = <2048>;
592			power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
593			status = "disabled";
594		};
595
596		apb: apb@d0000000 {
597			compatible = "simple-bus";
598			reg = <0x0 0xd0000000 0x0 0x200000>;
599			#address-cells = <2>;
600			#size-cells = <2>;
601			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
602
603			sd_emmc_a: mmc@70000 {
604				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
605				reg = <0x0 0x70000 0x0 0x800>;
606				interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
607				status = "disabled";
608			};
609
610			sd_emmc_b: mmc@72000 {
611				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
612				reg = <0x0 0x72000 0x0 0x800>;
613				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
614				status = "disabled";
615			};
616
617			sd_emmc_c: mmc@74000 {
618				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
619				reg = <0x0 0x74000 0x0 0x800>;
620				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
621				status = "disabled";
622			};
623		};
624
625		vpu: vpu@d0100000 {
626			compatible = "amlogic,meson-gx-vpu";
627			reg = <0x0 0xd0100000 0x0 0x100000>,
628			      <0x0 0xc883c000 0x0 0x1000>;
629			reg-names = "vpu", "hhi";
630			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
631			#address-cells = <1>;
632			#size-cells = <0>;
633			amlogic,canvas = <&canvas>;
634
635			/* CVBS VDAC output port */
636			cvbs_vdac_port: port@0 {
637				reg = <0>;
638			};
639
640			/* HDMI-TX output port */
641			hdmi_tx_port: port@1 {
642				reg = <1>;
643
644				hdmi_tx_out: endpoint {
645					remote-endpoint = <&hdmi_tx_in>;
646				};
647			};
648		};
649
650		hdmi_tx: hdmi-tx@c883a000 {
651			compatible = "amlogic,meson-gx-dw-hdmi";
652			reg = <0x0 0xc883a000 0x0 0x1c>;
653			interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
654			#address-cells = <1>;
655			#size-cells = <0>;
656			#sound-dai-cells = <0>;
657			sound-name-prefix = "HDMITX";
658			status = "disabled";
659
660			/* VPU VENC Input */
661			hdmi_tx_venc_port: port@0 {
662				reg = <0>;
663
664				hdmi_tx_in: endpoint {
665					remote-endpoint = <&hdmi_tx_out>;
666				};
667			};
668
669			/* TMDS Output */
670			hdmi_tx_tmds_port: port@1 {
671				reg = <1>;
672			};
673		};
674	};
675};
676