1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2016 Endless Computers, Inc. 4 * Author: Carlo Caione <carlo@endlessm.com> 5 */ 6 7/* Common DTSI for same Amlogic Q200/Q201 and P230/P231 boards using either 8 * the pin-compatible S912 (GXM) or S905D (GXL) SoCs. 9 */ 10 11/ { 12 aliases { 13 serial0 = &uart_AO; 14 ethernet0 = ðmac; 15 }; 16 17 chosen { 18 stdout-path = "serial0:115200n8"; 19 }; 20 21 memory@0 { 22 device_type = "memory"; 23 reg = <0x0 0x0 0x0 0x80000000>; 24 }; 25 26 hdmi_5v: regulator-hdmi-5v { 27 compatible = "regulator-fixed"; 28 29 regulator-name = "HDMI_5V"; 30 regulator-min-microvolt = <5000000>; 31 regulator-max-microvolt = <5000000>; 32 33 gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>; 34 enable-active-high; 35 regulator-always-on; 36 }; 37 38 vddio_boot: regulator-vddio_boot { 39 compatible = "regulator-fixed"; 40 regulator-name = "VDDIO_BOOT"; 41 regulator-min-microvolt = <1800000>; 42 regulator-max-microvolt = <1800000>; 43 }; 44 45 vddao_3v3: regulator-vddao_3v3 { 46 compatible = "regulator-fixed"; 47 regulator-name = "VDDAO_3V3"; 48 regulator-min-microvolt = <3300000>; 49 regulator-max-microvolt = <3300000>; 50 }; 51 52 vcc_3v3: regulator-vcc_3v3 { 53 compatible = "regulator-fixed"; 54 regulator-name = "VCC_3V3"; 55 regulator-min-microvolt = <3300000>; 56 regulator-max-microvolt = <3300000>; 57 }; 58 59 emmc_pwrseq: emmc-pwrseq { 60 compatible = "mmc-pwrseq-emmc"; 61 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; 62 }; 63 64 wifi32k: wifi32k { 65 compatible = "pwm-clock"; 66 #clock-cells = <0>; 67 clock-frequency = <32768>; 68 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ 69 }; 70 71 sdio_pwrseq: sdio-pwrseq { 72 compatible = "mmc-pwrseq-simple"; 73 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; 74 clocks = <&wifi32k>; 75 clock-names = "ext_clock"; 76 }; 77 78 cvbs-connector { 79 compatible = "composite-video-connector"; 80 81 port { 82 cvbs_connector_in: endpoint { 83 remote-endpoint = <&cvbs_vdac_out>; 84 }; 85 }; 86 }; 87 88 hdmi-connector { 89 compatible = "hdmi-connector"; 90 type = "a"; 91 92 port { 93 hdmi_connector_in: endpoint { 94 remote-endpoint = <&hdmi_tx_tmds_out>; 95 }; 96 }; 97 }; 98}; 99 100&cec_AO { 101 status = "okay"; 102 pinctrl-0 = <&ao_cec_pins>; 103 pinctrl-names = "default"; 104 hdmi-phandle = <&hdmi_tx>; 105}; 106 107&cvbs_vdac_port { 108 cvbs_vdac_out: endpoint { 109 remote-endpoint = <&cvbs_connector_in>; 110 }; 111}; 112 113ðmac { 114 status = "okay"; 115}; 116 117&hdmi_tx { 118 status = "okay"; 119 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; 120 pinctrl-names = "default"; 121}; 122 123&hdmi_tx_tmds_port { 124 hdmi_tx_tmds_out: endpoint { 125 remote-endpoint = <&hdmi_connector_in>; 126 }; 127}; 128 129&ir { 130 status = "okay"; 131 pinctrl-0 = <&remote_input_ao_pins>; 132 pinctrl-names = "default"; 133}; 134 135&pwm_ef { 136 status = "okay"; 137 pinctrl-0 = <&pwm_e_pins>; 138 pinctrl-names = "default"; 139 clocks = <&clkc CLKID_FCLK_DIV4>; 140 clock-names = "clkin0"; 141}; 142 143/* Wireless SDIO Module */ 144&sd_emmc_a { 145 status = "okay"; 146 pinctrl-0 = <&sdio_pins>; 147 pinctrl-1 = <&sdio_clk_gate_pins>; 148 pinctrl-names = "default", "clk-gate"; 149 #address-cells = <1>; 150 #size-cells = <0>; 151 152 bus-width = <4>; 153 cap-sd-highspeed; 154 max-frequency = <100000000>; 155 156 non-removable; 157 disable-wp; 158 159 mmc-pwrseq = <&sdio_pwrseq>; 160 161 vmmc-supply = <&vddao_3v3>; 162 vqmmc-supply = <&vddio_boot>; 163 164 brcmf: wifi@1 { 165 reg = <1>; 166 compatible = "brcm,bcm4329-fmac"; 167 }; 168}; 169 170/* SD card */ 171&sd_emmc_b { 172 status = "okay"; 173 pinctrl-0 = <&sdcard_pins>; 174 pinctrl-1 = <&sdcard_clk_gate_pins>; 175 pinctrl-names = "default", "clk-gate"; 176 177 bus-width = <4>; 178 cap-sd-highspeed; 179 max-frequency = <100000000>; 180 disable-wp; 181 182 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 183 cd-inverted; 184 185 vmmc-supply = <&vddao_3v3>; 186 vqmmc-supply = <&vddio_boot>; 187}; 188 189/* eMMC */ 190&sd_emmc_c { 191 status = "okay"; 192 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; 193 pinctrl-1 = <&emmc_clk_gate_pins>; 194 pinctrl-names = "default", "clk-gate"; 195 196 bus-width = <8>; 197 cap-mmc-highspeed; 198 max-frequency = <200000000>; 199 non-removable; 200 disable-wp; 201 mmc-ddr-1_8v; 202 mmc-hs200-1_8v; 203 204 mmc-pwrseq = <&emmc_pwrseq>; 205 vmmc-supply = <&vcc_3v3>; 206 vqmmc-supply = <&vddio_boot>; 207}; 208 209/* This UART is brought out to the DB9 connector */ 210&uart_AO { 211 status = "okay"; 212 pinctrl-0 = <&uart_ao_a_pins>; 213 pinctrl-names = "default"; 214}; 215 216&usb0 { 217 status = "okay"; 218}; 219