1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Amlogic, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8#include "meson-axg.dtsi" 9 10/ { 11 compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg"; 12 model = "Amlogic Meson AXG S400 Development Board"; 13 14 aliases { 15 serial0 = &uart_AO; 16 serial1 = &uart_A; 17 }; 18 19 vddio_boot: regulator-vddio_boot { 20 compatible = "regulator-fixed"; 21 regulator-name = "VDDIO_BOOT"; 22 regulator-min-microvolt = <1800000>; 23 regulator-max-microvolt = <1800000>; 24 }; 25 26 vddao_3v3: regulator-vddao_3v3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "VDDAO_3V3"; 29 regulator-min-microvolt = <3300000>; 30 regulator-max-microvolt = <3300000>; 31 }; 32 33 vddio_ao18: regulator-vddio_ao18 { 34 compatible = "regulator-fixed"; 35 regulator-name = "VDDIO_AO18"; 36 regulator-min-microvolt = <1800000>; 37 regulator-max-microvolt = <1800000>; 38 }; 39 40 vcc_3v3: regulator-vcc_3v3 { 41 compatible = "regulator-fixed"; 42 regulator-name = "VCC_3V3"; 43 regulator-min-microvolt = <3300000>; 44 regulator-max-microvolt = <3300000>; 45 }; 46 47 emmc_pwrseq: emmc-pwrseq { 48 compatible = "mmc-pwrseq-emmc"; 49 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; 50 }; 51 52 sdio_pwrseq: sdio-pwrseq { 53 compatible = "mmc-pwrseq-simple"; 54 reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>; 55 clocks = <&wifi32k>; 56 clock-names = "ext_clock"; 57 }; 58 59 wifi32k: wifi32k { 60 compatible = "pwm-clock"; 61 #clock-cells = <0>; 62 clock-frequency = <32768>; 63 pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */ 64 }; 65}; 66 67ðmac { 68 status = "okay"; 69 pinctrl-0 = <ð_rgmii_y_pins>; 70 pinctrl-names = "default"; 71 phy-handle = <ð_phy0>; 72 phy-mode = "rgmii"; 73 74 mdio { 75 compatible = "snps,dwmac-mdio"; 76 #address-cells = <1>; 77 #size-cells = <0>; 78 79 eth_phy0: ethernet-phy@0 { 80 /* Realtek RTL8211F (0x001cc916) */ 81 reg = <0>; 82 eee-broken-1000t; 83 }; 84 }; 85}; 86 87&uart_A { 88 status = "okay"; 89 pinctrl-0 = <&uart_a_pins>; 90 pinctrl-names = "default"; 91}; 92 93&uart_AO { 94 status = "okay"; 95 pinctrl-0 = <&uart_ao_a_pins>; 96 pinctrl-names = "default"; 97}; 98 99&ir { 100 status = "okay"; 101 pinctrl-0 = <&remote_input_ao_pins>; 102 pinctrl-names = "default"; 103}; 104 105&i2c1 { 106 status = "okay"; 107 pinctrl-0 = <&i2c1_z_pins>; 108 pinctrl-names = "default"; 109}; 110 111&i2c_AO { 112 status = "okay"; 113 pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>; 114 pinctrl-names = "default"; 115}; 116 117&pwm_ab { 118 status = "okay"; 119 pinctrl-0 = <&pwm_a_x20_pins>; 120 pinctrl-names = "default"; 121}; 122 123/* emmc storage */ 124&sd_emmc_c { 125 status = "okay"; 126 pinctrl-0 = <&emmc_pins>; 127 pinctrl-1 = <&emmc_clk_gate_pins>; 128 pinctrl-names = "default", "clk-gate"; 129 130 bus-width = <8>; 131 cap-sd-highspeed; 132 cap-mmc-highspeed; 133 max-frequency = <180000000>; 134 non-removable; 135 disable-wp; 136 mmc-ddr-1_8v; 137 mmc-hs200-1_8v; 138 139 vmmc-supply = <&vcc_3v3>; 140 vqmmc-supply = <&vddio_boot>; 141}; 142 143/* wifi module */ 144&sd_emmc_b { 145 status = "okay"; 146 #address-cells = <1>; 147 #size-cells = <0>; 148 149 pinctrl-0 = <&sdio_pins>; 150 pinctrl-1 = <&sdio_clk_gate_pins>; 151 pinctrl-names = "default", "clk-gate"; 152 153 bus-width = <4>; 154 cap-sd-highspeed; 155 max-frequency = <100000000>; 156 non-removable; 157 disable-wp; 158 159 mmc-pwrseq = <&sdio_pwrseq>; 160 161 vmmc-supply = <&vddao_3v3>; 162 vqmmc-supply = <&vddio_boot>; 163 164 brcmf: wifi@1 { 165 reg = <1>; 166 compatible = "brcm,bcm4329-fmac"; 167 }; 168}; 169