1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
4 */
5
6#include <dt-bindings/interrupt-controller/irq.h>
7#include <dt-bindings/interrupt-controller/arm-gic.h>
8#include <dt-bindings/gpio/gpio.h>
9
10/ {
11	cpus {
12		#address-cells = <2>;
13		#size-cells = <0>;
14
15		cpu0: cpu@0 {
16			device_type = "cpu";
17			compatible = "arm,cortex-a35";
18			reg = <0x0 0x0>;
19			enable-method = "psci";
20		};
21
22		cpu1: cpu@1 {
23			device_type = "cpu";
24			compatible = "arm,cortex-a35";
25			reg = <0x0 0x1>;
26			enable-method = "psci";
27		};
28	};
29
30	timer {
31		compatible = "arm,armv8-timer";
32		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
33			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
34			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
35			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
36	};
37
38	psci {
39		compatible = "arm,psci-1.0";
40		method = "smc";
41	};
42
43	xtal: xtal-clk {
44		compatible = "fixed-clock";
45		clock-frequency = <24000000>;
46		clock-output-names = "xtal";
47		#clock-cells = <0>;
48	};
49
50	soc {
51		compatible = "simple-bus";
52		#address-cells = <2>;
53		#size-cells = <2>;
54		ranges;
55
56		gic: interrupt-controller@fff01000 {
57			compatible = "arm,gic-400";
58			#interrupt-cells = <3>;
59			#address-cells = <0>;
60			interrupt-controller;
61			reg = <0x0 0xfff01000 0 0x1000>,
62			      <0x0 0xfff02000 0 0x2000>,
63			      <0x0 0xfff04000 0 0x2000>,
64			      <0x0 0xfff06000 0 0x2000>;
65			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
66		};
67
68		apb4: bus@fe000000 {
69			compatible = "simple-bus";
70			reg = <0x0 0xfe000000 0x0 0x480000>;
71			#address-cells = <2>;
72			#size-cells = <2>;
73			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
74
75			uart_b: serial@7a000 {
76				compatible = "amlogic,meson-s4-uart",
77					   "amlogic,meson-ao-uart";
78				reg = <0x0 0x7a000 0x0 0x18>;
79				interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
80				status = "disabled";
81				clocks = <&xtal>, <&xtal>, <&xtal>;
82				clock-names = "xtal", "pclk", "baud";
83			};
84
85		};
86	};
87};
88