1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright Altera Corporation (C) 2015. All rights reserved.
4 */
5
6#include "socfpga_stratix10.dtsi"
7
8/ {
9	model = "SoCFPGA Stratix 10 SoCDK";
10
11	aliases {
12		serial0 = &uart0;
13		ethernet0 = &gmac0;
14		ethernet1 = &gmac1;
15		ethernet2 = &gmac2;
16	};
17
18	chosen {
19		stdout-path = "serial0:115200n8";
20	};
21
22	leds {
23		compatible = "gpio-leds";
24		hps0 {
25			label = "hps_led0";
26			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
27		};
28
29		hps1 {
30			label = "hps_led1";
31			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
32		};
33
34		hps2 {
35			label = "hps_led2";
36			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
37		};
38	};
39
40	memory {
41		device_type = "memory";
42		/* We expect the bootloader to fill in the reg */
43		reg = <0 0 0 0>;
44	};
45
46	ref_033v: 033-v-ref {
47		compatible = "regulator-fixed";
48		regulator-name = "0.33V";
49		regulator-min-microvolt = <330000>;
50		regulator-max-microvolt = <330000>;
51	};
52
53	soc {
54		clocks {
55			osc1 {
56				clock-frequency = <25000000>;
57			};
58		};
59
60		eccmgr {
61			sdmmca-ecc@ff8c8c00 {
62				compatible = "altr,socfpga-s10-sdmmc-ecc",
63					     "altr,socfpga-sdmmc-ecc";
64				reg = <0xff8c8c00 0x100>;
65				altr,ecc-parent = <&mmc>;
66				interrupts = <14 4>,
67					     <15 4>;
68			};
69		};
70	};
71};
72
73&gpio1 {
74	status = "okay";
75};
76
77&gmac2 {
78	status = "okay";
79	phy-mode = "rgmii";
80	phy-handle = <&phy0>;
81
82	max-frame-size = <9000>;
83
84	mdio0 {
85		#address-cells = <1>;
86		#size-cells = <0>;
87		compatible = "snps,dwmac-mdio";
88		phy0: ethernet-phy@0 {
89			reg = <4>;
90
91			txd0-skew-ps = <0>; /* -420ps */
92			txd1-skew-ps = <0>; /* -420ps */
93			txd2-skew-ps = <0>; /* -420ps */
94			txd3-skew-ps = <0>; /* -420ps */
95			rxd0-skew-ps = <420>; /* 0ps */
96			rxd1-skew-ps = <420>; /* 0ps */
97			rxd2-skew-ps = <420>; /* 0ps */
98			rxd3-skew-ps = <420>; /* 0ps */
99			txen-skew-ps = <0>; /* -420ps */
100			txc-skew-ps = <900>; /* 0ps */
101			rxdv-skew-ps = <420>; /* 0ps */
102			rxc-skew-ps = <1680>; /* 780ps */
103		};
104	};
105};
106
107&nand {
108	status = "okay";
109
110	flash@0 {
111		#address-cells = <1>;
112		#size-cells = <1>;
113		reg = <0>;
114		nand-bus-width = <16>;
115
116		partition@0 {
117			label = "u-boot";
118			reg = <0 0x200000>;
119		};
120
121		partition@200000 {
122			label = "root";
123			reg = <0x200000 0x3fe00000>;
124		};
125	};
126};
127
128&uart0 {
129	status = "okay";
130};
131
132&usb0 {
133	status = "okay";
134	disable-over-current;
135};
136
137&watchdog0 {
138	status = "okay";
139};
140
141&i2c2 {
142	status = "okay";
143	clock-frequency = <100000>;
144	i2c-sda-falling-time-ns = <890>;  /* hcnt */
145	i2c-sdl-falling-time-ns = <890>;  /* lcnt */
146
147	adc@14 {
148		compatible = "lltc,ltc2497";
149		reg = <0x14>;
150		vref-supply = <&ref_033v>;
151	};
152
153	temp@4c {
154		compatible = "maxim,max1619";
155		reg = <0x4c>;
156	};
157
158	eeprom@51 {
159		compatible = "atmel,24c32";
160		reg = <0x51>;
161		pagesize = <32>;
162	};
163
164	rtc@68 {
165		compatible = "dallas,ds1339";
166		reg = <0x68>;
167	};
168};
169
170&qspi {
171	status = "okay";
172	flash@0 {
173		#address-cells = <1>;
174		#size-cells = <1>;
175		compatible = "micron,mt25qu02g", "jedec,spi-nor";
176		reg = <0>;
177		spi-max-frequency = <100000000>;
178
179		m25p,fast-read;
180		cdns,page-size = <256>;
181		cdns,block-size = <16>;
182		cdns,read-delay = <1>;
183		cdns,tshsl-ns = <50>;
184		cdns,tsd2d-ns = <50>;
185		cdns,tchsh-ns = <4>;
186		cdns,tslch-ns = <4>;
187
188		partitions {
189			compatible = "fixed-partitions";
190			#address-cells = <1>;
191			#size-cells = <1>;
192
193			qspi_boot: partition@0 {
194				label = "Boot and fpga data";
195				reg = <0x0 0x03FE0000>;
196			};
197
198			qspi_rootfs: partition@3FE0000 {
199				label = "Root Filesystem - JFFS2";
200				reg = <0x03FE0000 0x0C020000>;
201			};
202		};
203	};
204};
205