1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright Altera Corporation (C) 2015. All rights reserved.
4 */
5
6#include "socfpga_stratix10.dtsi"
7
8/ {
9	model = "SoCFPGA Stratix 10 SoCDK";
10	compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
11
12	aliases {
13		serial0 = &uart0;
14		ethernet0 = &gmac0;
15		ethernet1 = &gmac1;
16		ethernet2 = &gmac2;
17	};
18
19	chosen {
20		stdout-path = "serial0:115200n8";
21	};
22
23	leds {
24		compatible = "gpio-leds";
25		hps0 {
26			label = "hps_led0";
27			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
28		};
29
30		hps1 {
31			label = "hps_led1";
32			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
33		};
34
35		hps2 {
36			label = "hps_led2";
37			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
38		};
39	};
40
41	memory {
42		device_type = "memory";
43		/* We expect the bootloader to fill in the reg */
44		reg = <0 0 0 0>;
45	};
46
47	ref_033v: regulator-v-ref {
48		compatible = "regulator-fixed";
49		regulator-name = "0.33V";
50		regulator-min-microvolt = <330000>;
51		regulator-max-microvolt = <330000>;
52	};
53
54	soc {
55		clocks {
56			osc1 {
57				clock-frequency = <25000000>;
58			};
59		};
60
61		eccmgr {
62			sdmmca-ecc@ff8c8c00 {
63				compatible = "altr,socfpga-s10-sdmmc-ecc",
64					     "altr,socfpga-sdmmc-ecc";
65				reg = <0xff8c8c00 0x100>;
66				altr,ecc-parent = <&mmc>;
67				interrupts = <14 4>,
68					     <15 4>;
69			};
70		};
71	};
72};
73
74&gpio1 {
75	status = "okay";
76};
77
78&gmac2 {
79	status = "okay";
80	phy-mode = "rgmii";
81	phy-handle = <&phy0>;
82
83	max-frame-size = <9000>;
84
85	mdio0 {
86		#address-cells = <1>;
87		#size-cells = <0>;
88		compatible = "snps,dwmac-mdio";
89		phy0: ethernet-phy@0 {
90			reg = <4>;
91
92			txd0-skew-ps = <0>; /* -420ps */
93			txd1-skew-ps = <0>; /* -420ps */
94			txd2-skew-ps = <0>; /* -420ps */
95			txd3-skew-ps = <0>; /* -420ps */
96			rxd0-skew-ps = <420>; /* 0ps */
97			rxd1-skew-ps = <420>; /* 0ps */
98			rxd2-skew-ps = <420>; /* 0ps */
99			rxd3-skew-ps = <420>; /* 0ps */
100			txen-skew-ps = <0>; /* -420ps */
101			txc-skew-ps = <900>; /* 0ps */
102			rxdv-skew-ps = <420>; /* 0ps */
103			rxc-skew-ps = <1680>; /* 780ps */
104		};
105	};
106};
107
108&nand {
109	status = "okay";
110
111	flash@0 {
112		#address-cells = <1>;
113		#size-cells = <1>;
114		reg = <0>;
115		nand-bus-width = <16>;
116
117		partition@0 {
118			label = "u-boot";
119			reg = <0 0x200000>;
120		};
121
122		partition@200000 {
123			label = "root";
124			reg = <0x200000 0x3fe00000>;
125		};
126	};
127};
128
129&uart0 {
130	status = "okay";
131};
132
133&usb0 {
134	status = "okay";
135	disable-over-current;
136};
137
138&watchdog0 {
139	status = "okay";
140};
141
142&i2c2 {
143	status = "okay";
144	clock-frequency = <100000>;
145	i2c-sda-falling-time-ns = <890>;  /* hcnt */
146	i2c-sdl-falling-time-ns = <890>;  /* lcnt */
147
148	adc@14 {
149		compatible = "lltc,ltc2497";
150		reg = <0x14>;
151		vref-supply = <&ref_033v>;
152	};
153
154	temp@4c {
155		compatible = "maxim,max1619";
156		reg = <0x4c>;
157	};
158
159	eeprom@51 {
160		compatible = "atmel,24c32";
161		reg = <0x51>;
162		pagesize = <32>;
163	};
164
165	rtc@68 {
166		compatible = "dallas,ds1339";
167		reg = <0x68>;
168	};
169};
170
171&qspi {
172	status = "okay";
173	flash@0 {
174		#address-cells = <1>;
175		#size-cells = <1>;
176		compatible = "micron,mt25qu02g", "jedec,spi-nor";
177		reg = <0>;
178		spi-max-frequency = <100000000>;
179
180		m25p,fast-read;
181		cdns,page-size = <256>;
182		cdns,block-size = <16>;
183		cdns,read-delay = <1>;
184		cdns,tshsl-ns = <50>;
185		cdns,tsd2d-ns = <50>;
186		cdns,tchsh-ns = <4>;
187		cdns,tslch-ns = <4>;
188
189		partitions {
190			compatible = "fixed-partitions";
191			#address-cells = <1>;
192			#size-cells = <1>;
193
194			qspi_boot: partition@0 {
195				label = "Boot and fpga data";
196				reg = <0x0 0x03FE0000>;
197			};
198
199			qspi_rootfs: partition@3FE0000 {
200				label = "Root Filesystem - JFFS2";
201				reg = <0x03FE0000 0x0C020000>;
202			};
203		};
204	};
205};
206