12ff28361SIcenowy Zheng/* 22ff28361SIcenowy Zheng * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz> 32ff28361SIcenowy Zheng * 42ff28361SIcenowy Zheng * Based on sun50i-h5-orangepi-pc2.dts, which is: 52ff28361SIcenowy Zheng * Copyright (C) 2016 ARM Ltd. 62ff28361SIcenowy Zheng * 72ff28361SIcenowy Zheng * This file is dual-licensed: you can use it either under the terms 82ff28361SIcenowy Zheng * of the GPL or the X11 license, at your option. Note that this dual 92ff28361SIcenowy Zheng * licensing only applies to this file, and not this project as a 102ff28361SIcenowy Zheng * whole. 112ff28361SIcenowy Zheng * 122ff28361SIcenowy Zheng * a) This file is free software; you can redistribute it and/or 132ff28361SIcenowy Zheng * modify it under the terms of the GNU General Public License as 142ff28361SIcenowy Zheng * published by the Free Software Foundation; either version 2 of the 152ff28361SIcenowy Zheng * License, or (at your option) any later version. 162ff28361SIcenowy Zheng * 172ff28361SIcenowy Zheng * This file is distributed in the hope that it will be useful, 182ff28361SIcenowy Zheng * but WITHOUT ANY WARRANTY; without even the implied warranty of 192ff28361SIcenowy Zheng * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 202ff28361SIcenowy Zheng * GNU General Public License for more details. 212ff28361SIcenowy Zheng * 222ff28361SIcenowy Zheng * Or, alternatively, 232ff28361SIcenowy Zheng * 242ff28361SIcenowy Zheng * b) Permission is hereby granted, free of charge, to any person 252ff28361SIcenowy Zheng * obtaining a copy of this software and associated documentation 262ff28361SIcenowy Zheng * files (the "Software"), to deal in the Software without 272ff28361SIcenowy Zheng * restriction, including without limitation the rights to use, 282ff28361SIcenowy Zheng * copy, modify, merge, publish, distribute, sublicense, and/or 292ff28361SIcenowy Zheng * sell copies of the Software, and to permit persons to whom the 302ff28361SIcenowy Zheng * Software is furnished to do so, subject to the following 312ff28361SIcenowy Zheng * conditions: 322ff28361SIcenowy Zheng * 332ff28361SIcenowy Zheng * The above copyright notice and this permission notice shall be 342ff28361SIcenowy Zheng * included in all copies or substantial portions of the Software. 352ff28361SIcenowy Zheng * 362ff28361SIcenowy Zheng * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 372ff28361SIcenowy Zheng * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 382ff28361SIcenowy Zheng * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 392ff28361SIcenowy Zheng * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 402ff28361SIcenowy Zheng * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 412ff28361SIcenowy Zheng * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 422ff28361SIcenowy Zheng * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 432ff28361SIcenowy Zheng * OTHER DEALINGS IN THE SOFTWARE. 442ff28361SIcenowy Zheng */ 452ff28361SIcenowy Zheng 462ff28361SIcenowy Zheng/dts-v1/; 472ff28361SIcenowy Zheng#include "sun50i-h5.dtsi" 482ff28361SIcenowy Zheng 492ff28361SIcenowy Zheng#include <dt-bindings/gpio/gpio.h> 502ff28361SIcenowy Zheng#include <dt-bindings/input/input.h> 512ff28361SIcenowy Zheng 522ff28361SIcenowy Zheng/ { 532ff28361SIcenowy Zheng model = "Xunlong Orange Pi Prime"; 542ff28361SIcenowy Zheng compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5"; 552ff28361SIcenowy Zheng 562ff28361SIcenowy Zheng aliases { 5744a94c7eSCorentin Labbe ethernet0 = &emac; 582ff28361SIcenowy Zheng serial0 = &uart0; 592ff28361SIcenowy Zheng }; 602ff28361SIcenowy Zheng 612ff28361SIcenowy Zheng chosen { 622ff28361SIcenowy Zheng stdout-path = "serial0:115200n8"; 632ff28361SIcenowy Zheng }; 642ff28361SIcenowy Zheng 652ff28361SIcenowy Zheng leds { 662ff28361SIcenowy Zheng compatible = "gpio-leds"; 672ff28361SIcenowy Zheng 682ff28361SIcenowy Zheng pwr { 692ff28361SIcenowy Zheng label = "orangepi:green:pwr"; 702ff28361SIcenowy Zheng gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; 712ff28361SIcenowy Zheng default-state = "on"; 722ff28361SIcenowy Zheng }; 732ff28361SIcenowy Zheng 742ff28361SIcenowy Zheng status { 752ff28361SIcenowy Zheng label = "orangepi:red:status"; 762ff28361SIcenowy Zheng gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>; 772ff28361SIcenowy Zheng }; 782ff28361SIcenowy Zheng }; 792ff28361SIcenowy Zheng 802ff28361SIcenowy Zheng r-gpio-keys { 812ff28361SIcenowy Zheng compatible = "gpio-keys"; 822ff28361SIcenowy Zheng 832ff28361SIcenowy Zheng sw4 { 842ff28361SIcenowy Zheng label = "sw4"; 852ff28361SIcenowy Zheng linux,code = <BTN_0>; 862ff28361SIcenowy Zheng gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; 872ff28361SIcenowy Zheng }; 882ff28361SIcenowy Zheng }; 892ff28361SIcenowy Zheng 904b157a5cSIcenowy Zheng reg_gmac_3v3: gmac-3v3 { 914b157a5cSIcenowy Zheng compatible = "regulator-fixed"; 924b157a5cSIcenowy Zheng regulator-name = "gmac-3v3"; 934b157a5cSIcenowy Zheng regulator-min-microvolt = <3300000>; 944b157a5cSIcenowy Zheng regulator-max-microvolt = <3300000>; 954b157a5cSIcenowy Zheng startup-delay-us = <100000>; 964b157a5cSIcenowy Zheng enable-active-high; 974b157a5cSIcenowy Zheng gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; 984b157a5cSIcenowy Zheng }; 994b157a5cSIcenowy Zheng 1009907da07SIcenowy Zheng reg_vcc3v3: vcc3v3 { 1019907da07SIcenowy Zheng compatible = "regulator-fixed"; 1029907da07SIcenowy Zheng regulator-name = "vcc3v3"; 1039907da07SIcenowy Zheng regulator-min-microvolt = <3300000>; 1049907da07SIcenowy Zheng regulator-max-microvolt = <3300000>; 1059907da07SIcenowy Zheng }; 1069907da07SIcenowy Zheng 1072ff28361SIcenowy Zheng reg_usb0_vbus: usb0-vbus { 1082ff28361SIcenowy Zheng compatible = "regulator-fixed"; 1092ff28361SIcenowy Zheng regulator-name = "usb0-vbus"; 1102ff28361SIcenowy Zheng regulator-min-microvolt = <5000000>; 1112ff28361SIcenowy Zheng regulator-max-microvolt = <5000000>; 1122ff28361SIcenowy Zheng enable-active-high; 1132ff28361SIcenowy Zheng gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ 1142ff28361SIcenowy Zheng status = "okay"; 1152ff28361SIcenowy Zheng }; 1162ff28361SIcenowy Zheng 1172ff28361SIcenowy Zheng wifi_pwrseq: wifi_pwrseq { 1182ff28361SIcenowy Zheng compatible = "mmc-pwrseq-simple"; 1192ff28361SIcenowy Zheng reset-gpios = <&pio 2 14 GPIO_ACTIVE_LOW>; /* PC14 */ 1202ff28361SIcenowy Zheng }; 1212ff28361SIcenowy Zheng}; 1222ff28361SIcenowy Zheng 1232ff28361SIcenowy Zheng&codec { 1242ff28361SIcenowy Zheng allwinner,audio-routing = 1252ff28361SIcenowy Zheng "Line Out", "LINEOUT", 1262ff28361SIcenowy Zheng "MIC1", "Mic", 1272ff28361SIcenowy Zheng "Mic", "MBIAS"; 1282ff28361SIcenowy Zheng status = "okay"; 1292ff28361SIcenowy Zheng}; 1302ff28361SIcenowy Zheng 1312ff28361SIcenowy Zheng&ehci0 { 1322ff28361SIcenowy Zheng status = "okay"; 1332ff28361SIcenowy Zheng}; 1342ff28361SIcenowy Zheng 1352ff28361SIcenowy Zheng&ehci1 { 1362ff28361SIcenowy Zheng status = "okay"; 1372ff28361SIcenowy Zheng}; 1382ff28361SIcenowy Zheng 1392ff28361SIcenowy Zheng&ehci2 { 1402ff28361SIcenowy Zheng status = "okay"; 1412ff28361SIcenowy Zheng}; 1422ff28361SIcenowy Zheng 1432ff28361SIcenowy Zheng&ehci3 { 1442ff28361SIcenowy Zheng status = "okay"; 1452ff28361SIcenowy Zheng}; 1462ff28361SIcenowy Zheng 14744a94c7eSCorentin Labbe&emac { 14844a94c7eSCorentin Labbe pinctrl-names = "default"; 14944a94c7eSCorentin Labbe pinctrl-0 = <&emac_rgmii_pins>; 15044a94c7eSCorentin Labbe phy-supply = <®_gmac_3v3>; 15144a94c7eSCorentin Labbe phy-handle = <&ext_rgmii_phy>; 15244a94c7eSCorentin Labbe phy-mode = "rgmii"; 15344a94c7eSCorentin Labbe status = "okay"; 15444a94c7eSCorentin Labbe}; 15544a94c7eSCorentin Labbe 15644a94c7eSCorentin Labbe&external_mdio { 15744a94c7eSCorentin Labbe ext_rgmii_phy: ethernet-phy@1 { 15844a94c7eSCorentin Labbe compatible = "ethernet-phy-ieee802.3-c22"; 15944a94c7eSCorentin Labbe reg = <1>; 16044a94c7eSCorentin Labbe }; 16144a94c7eSCorentin Labbe}; 16244a94c7eSCorentin Labbe 1632ff28361SIcenowy Zheng&ir { 1642ff28361SIcenowy Zheng pinctrl-names = "default"; 1652ff28361SIcenowy Zheng pinctrl-0 = <&ir_pins_a>; 1662ff28361SIcenowy Zheng status = "okay"; 1672ff28361SIcenowy Zheng}; 1682ff28361SIcenowy Zheng 1692ff28361SIcenowy Zheng&mmc0 { 1702ff28361SIcenowy Zheng pinctrl-names = "default"; 1712ff28361SIcenowy Zheng pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 1722ff28361SIcenowy Zheng vmmc-supply = <®_vcc3v3>; 1732ff28361SIcenowy Zheng bus-width = <4>; 1742ff28361SIcenowy Zheng cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 1752ff28361SIcenowy Zheng status = "okay"; 1762ff28361SIcenowy Zheng}; 1772ff28361SIcenowy Zheng 1782ff28361SIcenowy Zheng&mmc1 { 1792ff28361SIcenowy Zheng pinctrl-names = "default"; 1802ff28361SIcenowy Zheng pinctrl-0 = <&mmc1_pins_a>; 1812ff28361SIcenowy Zheng vmmc-supply = <®_vcc3v3>; 1822ff28361SIcenowy Zheng mmc-pwrseq = <&wifi_pwrseq>; 1832ff28361SIcenowy Zheng bus-width = <4>; 1842ff28361SIcenowy Zheng non-removable; 1852ff28361SIcenowy Zheng status = "okay"; 1862ff28361SIcenowy Zheng}; 1872ff28361SIcenowy Zheng 1882ff28361SIcenowy Zheng&ohci0 { 1892ff28361SIcenowy Zheng status = "okay"; 1902ff28361SIcenowy Zheng}; 1912ff28361SIcenowy Zheng 1922ff28361SIcenowy Zheng&ohci1 { 1932ff28361SIcenowy Zheng status = "okay"; 1942ff28361SIcenowy Zheng}; 1952ff28361SIcenowy Zheng 1962ff28361SIcenowy Zheng&ohci2 { 1972ff28361SIcenowy Zheng status = "okay"; 1982ff28361SIcenowy Zheng}; 1992ff28361SIcenowy Zheng 2002ff28361SIcenowy Zheng&ohci3 { 2012ff28361SIcenowy Zheng status = "okay"; 2022ff28361SIcenowy Zheng}; 2032ff28361SIcenowy Zheng 2042ff28361SIcenowy Zheng&uart0 { 2052ff28361SIcenowy Zheng pinctrl-names = "default"; 2062ff28361SIcenowy Zheng pinctrl-0 = <&uart0_pins_a>; 2072ff28361SIcenowy Zheng status = "okay"; 2082ff28361SIcenowy Zheng}; 2092ff28361SIcenowy Zheng 2102ff28361SIcenowy Zheng&uart1 { 2112ff28361SIcenowy Zheng pinctrl-names = "default"; 2122ff28361SIcenowy Zheng pinctrl-0 = <&uart1_pins>; 2132ff28361SIcenowy Zheng status = "disabled"; 2142ff28361SIcenowy Zheng}; 2152ff28361SIcenowy Zheng 2162ff28361SIcenowy Zheng&uart2 { 2172ff28361SIcenowy Zheng pinctrl-names = "default"; 2182ff28361SIcenowy Zheng pinctrl-0 = <&uart2_pins>; 2192ff28361SIcenowy Zheng status = "disabled"; 2202ff28361SIcenowy Zheng}; 2212ff28361SIcenowy Zheng 2222ff28361SIcenowy Zheng&usb_otg { 2232ff28361SIcenowy Zheng dr_mode = "otg"; 2242ff28361SIcenowy Zheng status = "okay"; 2252ff28361SIcenowy Zheng}; 2262ff28361SIcenowy Zheng 2272ff28361SIcenowy Zheng&usbphy { 2282ff28361SIcenowy Zheng /* USB Type-A ports' VBUS is always on */ 2292ff28361SIcenowy Zheng usb0_id_det-gpios = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */ 2302ff28361SIcenowy Zheng usb0_vbus-supply = <®_usb0_vbus>; 2312ff28361SIcenowy Zheng status = "okay"; 2322ff28361SIcenowy Zheng}; 233