1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
3
4/ {
5	cpu_opp_table: cpu-opp-table {
6		compatible = "operating-points-v2";
7		opp-shared;
8
9		opp-408000000 {
10			opp-hz = /bits/ 64 <408000000>;
11			opp-microvolt = <1000000 1000000 1310000>;
12			clock-latency-ns = <244144>; /* 8 32k periods */
13		};
14
15		opp-648000000 {
16			opp-hz = /bits/ 64 <648000000>;
17			opp-microvolt = <1040000 1040000 1310000>;
18			clock-latency-ns = <244144>; /* 8 32k periods */
19		};
20
21		opp-816000000 {
22			opp-hz = /bits/ 64 <816000000>;
23			opp-microvolt = <1080000 1080000 1310000>;
24			clock-latency-ns = <244144>; /* 8 32k periods */
25		};
26
27		opp-912000000 {
28			opp-hz = /bits/ 64 <912000000>;
29			opp-microvolt = <1120000 1120000 1310000>;
30			clock-latency-ns = <244144>; /* 8 32k periods */
31		};
32
33		opp-960000000 {
34			opp-hz = /bits/ 64 <960000000>;
35			opp-microvolt = <1160000 1160000 1310000>;
36			clock-latency-ns = <244144>; /* 8 32k periods */
37		};
38
39		opp-1008000000 {
40			opp-hz = /bits/ 64 <1008000000>;
41			opp-microvolt = <1200000 1200000 1310000>;
42			clock-latency-ns = <244144>; /* 8 32k periods */
43		};
44
45		opp-1056000000 {
46			opp-hz = /bits/ 64 <1056000000>;
47			opp-microvolt = <1240000 1240000 1310000>;
48			clock-latency-ns = <244144>; /* 8 32k periods */
49		};
50
51		opp-1104000000 {
52			opp-hz = /bits/ 64 <1104000000>;
53			opp-microvolt = <1260000 1260000 1310000>;
54			clock-latency-ns = <244144>; /* 8 32k periods */
55		};
56
57		opp-1152000000 {
58			opp-hz = /bits/ 64 <1152000000>;
59			opp-microvolt = <1300000 1300000 1310000>;
60			clock-latency-ns = <244144>; /* 8 32k periods */
61		};
62	};
63};
64
65&cpu0 {
66	operating-points-v2 = <&cpu_opp_table>;
67};
68
69&cpu1 {
70	operating-points-v2 = <&cpu_opp_table>;
71};
72
73&cpu2 {
74	operating-points-v2 = <&cpu_opp_table>;
75};
76
77&cpu3 {
78	operating-points-v2 = <&cpu_opp_table>;
79};
80