xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts (revision 05cf4fe738242183f1237f1b3a28b4479348c0a1) 
1/*
2 * Copyright (C) Harald Geyer <harald@ccbib.org>
3 * based on sun50i-a64-olinuxino.dts by Jagan Teki <jteki@openedev.com>
4 *
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 */
7
8/dts-v1/;
9
10#include "sun50i-a64.dtsi"
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14#include <dt-bindings/pwm/pwm.h>
15
16/ {
17	model = "Olimex A64 Teres-I";
18	compatible = "olimex,a64-teres-i", "allwinner,sun50i-a64";
19
20	aliases {
21		serial0 = &uart0;
22	};
23
24	chosen {
25		stdout-path = "serial0:115200n8";
26
27		framebuffer-lcd {
28			eDP25-supply = <&reg_dldo2>;
29			eDP12-supply = <&reg_dldo3>;
30		};
31	};
32
33	gpio-keys {
34		compatible = "gpio-keys";
35
36		lid-switch {
37			label = "Lid Switch";
38			gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
39			linux,input-type = <EV_SW>;
40			linux,code = <SW_LID>;
41			wakeup-source;
42		};
43	};
44
45	leds {
46		compatible = "gpio-leds";
47
48		capslock {
49			label = "teres-i:green:capslock";
50			gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
51		};
52
53		numlock {
54			label = "teres-i:green:numlock";
55			gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */
56		};
57	};
58
59	reg_usb1_vbus: usb1-vbus {
60		compatible = "regulator-fixed";
61		regulator-name = "usb1-vbus";
62		regulator-min-microvolt = <5000000>;
63		regulator-max-microvolt = <5000000>;
64		enable-active-high;
65		gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
66		status = "okay";
67	};
68
69	wifi_pwrseq: wifi_pwrseq {
70		compatible = "mmc-pwrseq-simple";
71		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
72	};
73};
74
75&ehci1 {
76	status = "okay";
77};
78
79
80/* The ANX6345 eDP-bridge is on i2c0. There is no linux (mainline)
81 * driver for this chip at the moment, the bootloader initializes it.
82 * However it can be accessed with the i2c-dev driver from user space.
83 */
84&i2c0 {
85	clock-frequency = <100000>;
86	pinctrl-names = "default";
87	pinctrl-0 = <&i2c0_pins>;
88	status = "okay";
89};
90
91&mmc0 {
92	pinctrl-names = "default";
93	pinctrl-0 = <&mmc0_pins>;
94	vmmc-supply = <&reg_dcdc1>;
95	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
96	disable-wp;
97	bus-width = <4>;
98	status = "okay";
99};
100
101&mmc1 {
102	pinctrl-names = "default";
103	pinctrl-0 = <&mmc1_pins>;
104	vmmc-supply = <&reg_aldo2>;
105	vqmmc-supply = <&reg_dldo4>;
106	mmc-pwrseq = <&wifi_pwrseq>;
107	bus-width = <4>;
108	non-removable;
109	status = "okay";
110
111	rtl8723bs: wifi@1 {
112		reg = <1>;
113		interrupt-parent = <&r_pio>;
114		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
115		interrupt-names = "host-wake";
116	};
117};
118
119&mmc2 {
120	pinctrl-names = "default";
121	pinctrl-0 = <&mmc2_pins>;
122	vmmc-supply = <&reg_dcdc1>;
123	vqmmc-supply = <&reg_dcdc1>;
124	bus-width = <8>;
125	non-removable;
126	cap-mmc-hw-reset;
127	status = "okay";
128};
129
130&ohci1 {
131	status = "okay";
132};
133
134&r_rsb {
135	status = "okay";
136
137	axp803: pmic@3a3 {
138		compatible = "x-powers,axp803";
139		reg = <0x3a3>;
140		interrupt-parent = <&r_intc>;
141		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
142		wakeup-source;
143	};
144};
145
146#include "axp803.dtsi"
147
148&reg_aldo1 {
149	regulator-always-on;
150	regulator-min-microvolt = <2800000>;
151	regulator-max-microvolt = <2800000>;
152	regulator-name = "vcc-pe";
153};
154
155&reg_aldo2 {
156	regulator-always-on;
157	regulator-min-microvolt = <3300000>;
158	regulator-max-microvolt = <3300000>;
159	regulator-name = "vcc-pl";
160};
161
162&reg_aldo3 {
163	regulator-always-on;
164	regulator-min-microvolt = <3000000>;
165	regulator-max-microvolt = <3000000>;
166	regulator-name = "vcc-pll-avcc";
167};
168
169&reg_dcdc1 {
170	regulator-always-on;
171	regulator-min-microvolt = <3300000>;
172	regulator-max-microvolt = <3300000>;
173	regulator-name = "vcc-3v3";
174};
175
176&reg_dcdc2 {
177	regulator-always-on;
178	regulator-min-microvolt = <1040000>;
179	regulator-max-microvolt = <1300000>;
180	regulator-name = "vdd-cpux";
181};
182
183/* DCDC3 is polyphased with DCDC2 */
184
185&reg_dcdc5 {
186	regulator-always-on;
187	regulator-min-microvolt = <1500000>;
188	regulator-max-microvolt = <1500000>;
189	regulator-name = "vcc-ddr3";
190};
191
192&reg_dcdc6 {
193	regulator-always-on;
194	regulator-min-microvolt = <1100000>;
195	regulator-max-microvolt = <1100000>;
196	regulator-name = "vdd-sys";
197};
198
199&reg_dldo1 {
200	regulator-min-microvolt = <3300000>;
201	regulator-max-microvolt = <3300000>;
202	regulator-name = "vcc-hdmi";
203};
204
205&reg_dldo2 {
206	regulator-min-microvolt = <2500000>;
207	regulator-max-microvolt = <2500000>;
208	regulator-name = "vcc-pd";
209};
210
211&reg_dldo3 {
212	regulator-min-microvolt = <1200000>;
213	regulator-max-microvolt = <1200000>;
214	regulator-name = "vdd-edp";
215};
216
217&reg_dldo4 {
218	regulator-min-microvolt = <3300000>;
219	regulator-max-microvolt = <3300000>;
220	regulator-name = "vcc-wifi-io";
221};
222
223&reg_eldo1 {
224	regulator-min-microvolt = <1800000>;
225	regulator-max-microvolt = <1800000>;
226	regulator-name = "cpvdd";
227};
228
229&reg_eldo2 {
230	regulator-min-microvolt = <1800000>;
231	regulator-max-microvolt = <1800000>;
232	regulator-name = "vcc-dvdd-csi";
233};
234
235&reg_fldo1 {
236	regulator-min-microvolt = <1200000>;
237	regulator-max-microvolt = <1200000>;
238	regulator-name = "vcc-1v2-hsic";
239};
240
241/*
242 * The A64 chip cannot work without this regulator off, although
243 * it seems to be only driving the AR100 core.
244 * Maybe we don't still know well about CPUs domain.
245 */
246&reg_fldo2 {
247	regulator-always-on;
248	regulator-min-microvolt = <1100000>;
249	regulator-max-microvolt = <1100000>;
250	regulator-name = "vdd-cpus";
251};
252
253&reg_rtc_ldo {
254	regulator-name = "vcc-rtc";
255};
256
257&simplefb_hdmi {
258	vcc-hdmi-supply = <&reg_dldo1>;
259};
260
261&uart0 {
262	pinctrl-names = "default";
263	pinctrl-0 = <&uart0_pb_pins>;
264	status = "okay";
265};
266
267&usbphy {
268	usb1_vbus-supply = <&reg_usb1_vbus>;
269	status = "okay";
270};
271