xref: /openbmc/linux/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts (revision 812f77b749a8ae11f58dacf0d3ed65e7ede47458) 
1/*
2 * Copyright (c) 2016 ARM Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44
45#include "sun50i-a64.dtsi"
46
47#include <dt-bindings/gpio/gpio.h>
48
49/ {
50	model = "BananaPi-M64";
51	compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
52
53	aliases {
54		ethernet0 = &emac;
55		serial0 = &uart0;
56		serial1 = &uart1;
57	};
58
59	chosen {
60		stdout-path = "serial0:115200n8";
61	};
62
63	wifi_pwrseq: wifi_pwrseq {
64		compatible = "mmc-pwrseq-simple";
65		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
66	};
67};
68
69&ehci1 {
70	status = "okay";
71};
72
73&emac {
74	pinctrl-names = "default";
75	pinctrl-0 = <&rgmii_pins>;
76	phy-mode = "rgmii";
77	phy-handle = <&ext_rgmii_phy>;
78	status = "okay";
79};
80
81&i2c1 {
82	pinctrl-names = "default";
83	pinctrl-0 = <&i2c1_pins>;
84	status = "okay";
85};
86
87&i2c1_pins {
88	bias-pull-up;
89};
90
91&mdio {
92	ext_rgmii_phy: ethernet-phy@1 {
93		compatible = "ethernet-phy-ieee802.3-c22";
94		reg = <1>;
95	};
96};
97
98&mmc0 {
99	pinctrl-names = "default";
100	pinctrl-0 = <&mmc0_pins>;
101	vmmc-supply = <&reg_dcdc1>;
102	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
103	cd-inverted;
104	disable-wp;
105	bus-width = <4>;
106	status = "okay";
107};
108
109&mmc1 {
110	pinctrl-names = "default";
111	pinctrl-0 = <&mmc1_pins>;
112	vmmc-supply = <&reg_dldo2>;
113	vqmmc-supply = <&reg_dldo4>;
114	mmc-pwrseq = <&wifi_pwrseq>;
115	bus-width = <4>;
116	non-removable;
117	status = "okay";
118
119	brcmf: wifi@1 {
120		reg = <1>;
121		compatible = "brcm,bcm4329-fmac";
122		interrupt-parent = <&r_pio>;
123		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
124		interrupt-names = "host-wake";
125	};
126};
127
128&mmc2 {
129	pinctrl-names = "default";
130	pinctrl-0 = <&mmc2_pins>;
131	vmmc-supply = <&reg_dcdc1>;
132	bus-width = <8>;
133	non-removable;
134	cap-mmc-hw-reset;
135	status = "okay";
136};
137
138&ohci1 {
139	status = "okay";
140};
141
142&r_rsb {
143	status = "okay";
144
145	axp803: pmic@3a3 {
146		compatible = "x-powers,axp803";
147		reg = <0x3a3>;
148		interrupt-parent = <&r_intc>;
149		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
150	};
151};
152
153#include "axp803.dtsi"
154
155&reg_aldo2 {
156	regulator-always-on;
157	regulator-min-microvolt = <1800000>;
158	regulator-max-microvolt = <3300000>;
159	regulator-name = "vcc-pl";
160};
161
162&reg_aldo3 {
163	regulator-always-on;
164	regulator-min-microvolt = <3000000>;
165	regulator-max-microvolt = <3000000>;
166	regulator-name = "vcc-pll-avcc";
167};
168
169&reg_dc1sw {
170	regulator-name = "vcc-phy";
171};
172
173&reg_dcdc1 {
174	regulator-always-on;
175	regulator-min-microvolt = <3300000>;
176	regulator-max-microvolt = <3300000>;
177	regulator-name = "vcc-3v3";
178};
179
180&reg_dcdc2 {
181	regulator-always-on;
182	regulator-min-microvolt = <1040000>;
183	regulator-max-microvolt = <1300000>;
184	regulator-name = "vdd-cpux";
185};
186
187/* DCDC3 is polyphased with DCDC2 */
188
189&reg_dcdc5 {
190	regulator-always-on;
191	regulator-min-microvolt = <1500000>;
192	regulator-max-microvolt = <1500000>;
193	regulator-name = "vcc-dram";
194};
195
196&reg_dcdc6 {
197	regulator-always-on;
198	regulator-min-microvolt = <1100000>;
199	regulator-max-microvolt = <1100000>;
200	regulator-name = "vdd-sys";
201};
202
203&reg_dldo1 {
204	regulator-min-microvolt = <3300000>;
205	regulator-max-microvolt = <3300000>;
206	regulator-name = "vcc-hdmi-dsi";
207};
208
209&reg_dldo2 {
210	regulator-min-microvolt = <3300000>;
211	regulator-max-microvolt = <3300000>;
212	regulator-name = "vcc-wifi";
213};
214
215&reg_dldo4 {
216	regulator-min-microvolt = <1800000>;
217	regulator-max-microvolt = <3300000>;
218	regulator-name = "vcc-wifi-io";
219};
220
221&reg_eldo1 {
222	regulator-min-microvolt = <1800000>;
223	regulator-max-microvolt = <1800000>;
224	regulator-name = "cpvdd";
225};
226
227&reg_fldo1 {
228	regulator-min-microvolt = <1200000>;
229	regulator-max-microvolt = <1200000>;
230	regulator-name = "vcc-1v2-hsic";
231};
232
233/*
234 * The A64 chip cannot work without this regulator off, although
235 * it seems to be only driving the AR100 core.
236 * Maybe we don't still know well about CPUs domain.
237 */
238&reg_fldo2 {
239	regulator-always-on;
240	regulator-min-microvolt = <1100000>;
241	regulator-max-microvolt = <1100000>;
242	regulator-name = "vdd-cpus";
243};
244
245&reg_rtc_ldo {
246	regulator-name = "vcc-rtc";
247};
248
249&uart0 {
250	pinctrl-names = "default";
251	pinctrl-0 = <&uart0_pins_a>;
252	status = "okay";
253};
254
255&uart1 {
256	pinctrl-names = "default";
257	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
258	status = "okay";
259};
260
261&usbphy {
262	status = "okay";
263};
264