1 /* 2 * linux/arch/arm/vfp/vfpmodule.c 3 * 4 * Copyright (C) 2004 ARM Limited. 5 * Written by Deep Blue Solutions Limited. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #include <linux/module.h> 12 #include <linux/types.h> 13 #include <linux/kernel.h> 14 #include <linux/signal.h> 15 #include <linux/sched.h> 16 #include <linux/init.h> 17 18 #include <asm/thread_notify.h> 19 #include <asm/vfp.h> 20 21 #include "vfpinstr.h" 22 #include "vfp.h" 23 24 /* 25 * Our undef handlers (in entry.S) 26 */ 27 void vfp_testing_entry(void); 28 void vfp_support_entry(void); 29 void vfp_null_entry(void); 30 31 void (*vfp_vector)(void) = vfp_null_entry; 32 union vfp_state *last_VFP_context[NR_CPUS]; 33 34 /* 35 * Dual-use variable. 36 * Used in startup: set to non-zero if VFP checks fail 37 * After startup, holds VFP architecture 38 */ 39 unsigned int VFP_arch; 40 41 /* 42 * Per-thread VFP initialization. 43 */ 44 static void vfp_thread_flush(struct thread_info *thread) 45 { 46 union vfp_state *vfp = &thread->vfpstate; 47 unsigned int cpu; 48 49 memset(vfp, 0, sizeof(union vfp_state)); 50 51 vfp->hard.fpexc = FPEXC_EN; 52 vfp->hard.fpscr = FPSCR_ROUND_NEAREST; 53 54 /* 55 * Disable VFP to ensure we initialize it first. We must ensure 56 * that the modification of last_VFP_context[] and hardware disable 57 * are done for the same CPU and without preemption. 58 */ 59 cpu = get_cpu(); 60 if (last_VFP_context[cpu] == vfp) 61 last_VFP_context[cpu] = NULL; 62 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 63 put_cpu(); 64 } 65 66 static void vfp_thread_exit(struct thread_info *thread) 67 { 68 /* release case: Per-thread VFP cleanup. */ 69 union vfp_state *vfp = &thread->vfpstate; 70 unsigned int cpu = get_cpu(); 71 72 if (last_VFP_context[cpu] == vfp) 73 last_VFP_context[cpu] = NULL; 74 put_cpu(); 75 } 76 77 /* 78 * When this function is called with the following 'cmd's, the following 79 * is true while this function is being run: 80 * THREAD_NOFTIFY_SWTICH: 81 * - the previously running thread will not be scheduled onto another CPU. 82 * - the next thread to be run (v) will not be running on another CPU. 83 * - thread->cpu is the local CPU number 84 * - not preemptible as we're called in the middle of a thread switch 85 * THREAD_NOTIFY_FLUSH: 86 * - the thread (v) will be running on the local CPU, so 87 * v === current_thread_info() 88 * - thread->cpu is the local CPU number at the time it is accessed, 89 * but may change at any time. 90 * - we could be preempted if tree preempt rcu is enabled, so 91 * it is unsafe to use thread->cpu. 92 * THREAD_NOTIFY_EXIT 93 * - the thread (v) will be running on the local CPU, so 94 * v === current_thread_info() 95 * - thread->cpu is the local CPU number at the time it is accessed, 96 * but may change at any time. 97 * - we could be preempted if tree preempt rcu is enabled, so 98 * it is unsafe to use thread->cpu. 99 */ 100 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) 101 { 102 struct thread_info *thread = v; 103 104 if (likely(cmd == THREAD_NOTIFY_SWITCH)) { 105 u32 fpexc = fmrx(FPEXC); 106 107 #ifdef CONFIG_SMP 108 unsigned int cpu = thread->cpu; 109 110 /* 111 * On SMP, if VFP is enabled, save the old state in 112 * case the thread migrates to a different CPU. The 113 * restoring is done lazily. 114 */ 115 if ((fpexc & FPEXC_EN) && last_VFP_context[cpu]) { 116 vfp_save_state(last_VFP_context[cpu], fpexc); 117 last_VFP_context[cpu]->hard.cpu = cpu; 118 } 119 /* 120 * Thread migration, just force the reloading of the 121 * state on the new CPU in case the VFP registers 122 * contain stale data. 123 */ 124 if (thread->vfpstate.hard.cpu != cpu) 125 last_VFP_context[cpu] = NULL; 126 #endif 127 128 /* 129 * Always disable VFP so we can lazily save/restore the 130 * old state. 131 */ 132 fmxr(FPEXC, fpexc & ~FPEXC_EN); 133 return NOTIFY_DONE; 134 } 135 136 if (cmd == THREAD_NOTIFY_FLUSH) 137 vfp_thread_flush(thread); 138 else 139 vfp_thread_exit(thread); 140 141 return NOTIFY_DONE; 142 } 143 144 static struct notifier_block vfp_notifier_block = { 145 .notifier_call = vfp_notifier, 146 }; 147 148 /* 149 * Raise a SIGFPE for the current process. 150 * sicode describes the signal being raised. 151 */ 152 void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs) 153 { 154 siginfo_t info; 155 156 memset(&info, 0, sizeof(info)); 157 158 info.si_signo = SIGFPE; 159 info.si_code = sicode; 160 info.si_addr = (void __user *)(instruction_pointer(regs) - 4); 161 162 /* 163 * This is the same as NWFPE, because it's not clear what 164 * this is used for 165 */ 166 current->thread.error_code = 0; 167 current->thread.trap_no = 6; 168 169 send_sig_info(SIGFPE, &info, current); 170 } 171 172 static void vfp_panic(char *reason, u32 inst) 173 { 174 int i; 175 176 printk(KERN_ERR "VFP: Error: %s\n", reason); 177 printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n", 178 fmrx(FPEXC), fmrx(FPSCR), inst); 179 for (i = 0; i < 32; i += 2) 180 printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n", 181 i, vfp_get_float(i), i+1, vfp_get_float(i+1)); 182 } 183 184 /* 185 * Process bitmask of exception conditions. 186 */ 187 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs) 188 { 189 int si_code = 0; 190 191 pr_debug("VFP: raising exceptions %08x\n", exceptions); 192 193 if (exceptions == VFP_EXCEPTION_ERROR) { 194 vfp_panic("unhandled bounce", inst); 195 vfp_raise_sigfpe(0, regs); 196 return; 197 } 198 199 /* 200 * If any of the status flags are set, update the FPSCR. 201 * Comparison instructions always return at least one of 202 * these flags set. 203 */ 204 if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V)) 205 fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); 206 207 fpscr |= exceptions; 208 209 fmxr(FPSCR, fpscr); 210 211 #define RAISE(stat,en,sig) \ 212 if (exceptions & stat && fpscr & en) \ 213 si_code = sig; 214 215 /* 216 * These are arranged in priority order, least to highest. 217 */ 218 RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV); 219 RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES); 220 RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND); 221 RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF); 222 RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV); 223 224 if (si_code) 225 vfp_raise_sigfpe(si_code, regs); 226 } 227 228 /* 229 * Emulate a VFP instruction. 230 */ 231 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) 232 { 233 u32 exceptions = VFP_EXCEPTION_ERROR; 234 235 pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); 236 237 if (INST_CPRTDO(inst)) { 238 if (!INST_CPRT(inst)) { 239 /* 240 * CPDO 241 */ 242 if (vfp_single(inst)) { 243 exceptions = vfp_single_cpdo(inst, fpscr); 244 } else { 245 exceptions = vfp_double_cpdo(inst, fpscr); 246 } 247 } else { 248 /* 249 * A CPRT instruction can not appear in FPINST2, nor 250 * can it cause an exception. Therefore, we do not 251 * have to emulate it. 252 */ 253 } 254 } else { 255 /* 256 * A CPDT instruction can not appear in FPINST2, nor can 257 * it cause an exception. Therefore, we do not have to 258 * emulate it. 259 */ 260 } 261 return exceptions & ~VFP_NAN_FLAG; 262 } 263 264 /* 265 * Package up a bounce condition. 266 */ 267 void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) 268 { 269 u32 fpscr, orig_fpscr, fpsid, exceptions; 270 271 pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc); 272 273 /* 274 * At this point, FPEXC can have the following configuration: 275 * 276 * EX DEX IXE 277 * 0 1 x - synchronous exception 278 * 1 x 0 - asynchronous exception 279 * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later 280 * 0 0 1 - synchronous on VFP9 (non-standard subarch 1 281 * implementation), undefined otherwise 282 * 283 * Clear various bits and enable access to the VFP so we can 284 * handle the bounce. 285 */ 286 fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK)); 287 288 fpsid = fmrx(FPSID); 289 orig_fpscr = fpscr = fmrx(FPSCR); 290 291 /* 292 * Check for the special VFP subarch 1 and FPSCR.IXE bit case 293 */ 294 if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT) 295 && (fpscr & FPSCR_IXE)) { 296 /* 297 * Synchronous exception, emulate the trigger instruction 298 */ 299 goto emulate; 300 } 301 302 if (fpexc & FPEXC_EX) { 303 #ifndef CONFIG_CPU_FEROCEON 304 /* 305 * Asynchronous exception. The instruction is read from FPINST 306 * and the interrupted instruction has to be restarted. 307 */ 308 trigger = fmrx(FPINST); 309 regs->ARM_pc -= 4; 310 #endif 311 } else if (!(fpexc & FPEXC_DEX)) { 312 /* 313 * Illegal combination of bits. It can be caused by an 314 * unallocated VFP instruction but with FPSCR.IXE set and not 315 * on VFP subarch 1. 316 */ 317 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs); 318 goto exit; 319 } 320 321 /* 322 * Modify fpscr to indicate the number of iterations remaining. 323 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates 324 * whether FPEXC.VECITR or FPSCR.LEN is used. 325 */ 326 if (fpexc & (FPEXC_EX | FPEXC_VV)) { 327 u32 len; 328 329 len = fpexc + (1 << FPEXC_LENGTH_BIT); 330 331 fpscr &= ~FPSCR_LENGTH_MASK; 332 fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT); 333 } 334 335 /* 336 * Handle the first FP instruction. We used to take note of the 337 * FPEXC bounce reason, but this appears to be unreliable. 338 * Emulate the bounced instruction instead. 339 */ 340 exceptions = vfp_emulate_instruction(trigger, fpscr, regs); 341 if (exceptions) 342 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); 343 344 /* 345 * If there isn't a second FP instruction, exit now. Note that 346 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. 347 */ 348 if (fpexc ^ (FPEXC_EX | FPEXC_FP2V)) 349 goto exit; 350 351 /* 352 * The barrier() here prevents fpinst2 being read 353 * before the condition above. 354 */ 355 barrier(); 356 trigger = fmrx(FPINST2); 357 358 emulate: 359 exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); 360 if (exceptions) 361 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); 362 exit: 363 preempt_enable(); 364 } 365 366 static void vfp_enable(void *unused) 367 { 368 u32 access = get_copro_access(); 369 370 /* 371 * Enable full access to VFP (cp10 and cp11) 372 */ 373 set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); 374 } 375 376 #ifdef CONFIG_PM 377 #include <linux/sysdev.h> 378 379 static int vfp_pm_suspend(struct sys_device *dev, pm_message_t state) 380 { 381 struct thread_info *ti = current_thread_info(); 382 u32 fpexc = fmrx(FPEXC); 383 384 /* if vfp is on, then save state for resumption */ 385 if (fpexc & FPEXC_EN) { 386 printk(KERN_DEBUG "%s: saving vfp state\n", __func__); 387 vfp_save_state(&ti->vfpstate, fpexc); 388 389 /* disable, just in case */ 390 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 391 } 392 393 /* clear any information we had about last context state */ 394 memset(last_VFP_context, 0, sizeof(last_VFP_context)); 395 396 return 0; 397 } 398 399 static int vfp_pm_resume(struct sys_device *dev) 400 { 401 /* ensure we have access to the vfp */ 402 vfp_enable(NULL); 403 404 /* and disable it to ensure the next usage restores the state */ 405 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 406 407 return 0; 408 } 409 410 static struct sysdev_class vfp_pm_sysclass = { 411 .name = "vfp", 412 .suspend = vfp_pm_suspend, 413 .resume = vfp_pm_resume, 414 }; 415 416 static struct sys_device vfp_pm_sysdev = { 417 .cls = &vfp_pm_sysclass, 418 }; 419 420 static void vfp_pm_init(void) 421 { 422 sysdev_class_register(&vfp_pm_sysclass); 423 sysdev_register(&vfp_pm_sysdev); 424 } 425 426 427 #else 428 static inline void vfp_pm_init(void) { } 429 #endif /* CONFIG_PM */ 430 431 /* 432 * Synchronise the hardware VFP state of a thread other than current with the 433 * saved one. This function is used by the ptrace mechanism. 434 */ 435 #ifdef CONFIG_SMP 436 void vfp_sync_state(struct thread_info *thread) 437 { 438 /* 439 * On SMP systems, the VFP state is automatically saved at every 440 * context switch. We mark the thread VFP state as belonging to a 441 * non-existent CPU so that the saved one will be reloaded when 442 * needed. 443 */ 444 thread->vfpstate.hard.cpu = NR_CPUS; 445 } 446 #else 447 void vfp_sync_state(struct thread_info *thread) 448 { 449 unsigned int cpu = get_cpu(); 450 u32 fpexc = fmrx(FPEXC); 451 452 /* 453 * If VFP is enabled, the previous state was already saved and 454 * last_VFP_context updated. 455 */ 456 if (fpexc & FPEXC_EN) 457 goto out; 458 459 if (!last_VFP_context[cpu]) 460 goto out; 461 462 /* 463 * Save the last VFP state on this CPU. 464 */ 465 fmxr(FPEXC, fpexc | FPEXC_EN); 466 vfp_save_state(last_VFP_context[cpu], fpexc); 467 fmxr(FPEXC, fpexc); 468 469 /* 470 * Set the context to NULL to force a reload the next time the thread 471 * uses the VFP. 472 */ 473 last_VFP_context[cpu] = NULL; 474 475 out: 476 put_cpu(); 477 } 478 #endif 479 480 #include <linux/smp.h> 481 482 /* 483 * VFP support code initialisation. 484 */ 485 static int __init vfp_init(void) 486 { 487 unsigned int vfpsid; 488 unsigned int cpu_arch = cpu_architecture(); 489 490 if (cpu_arch >= CPU_ARCH_ARMv6) 491 vfp_enable(NULL); 492 493 /* 494 * First check that there is a VFP that we can use. 495 * The handler is already setup to just log calls, so 496 * we just need to read the VFPSID register. 497 */ 498 vfp_vector = vfp_testing_entry; 499 barrier(); 500 vfpsid = fmrx(FPSID); 501 barrier(); 502 vfp_vector = vfp_null_entry; 503 504 printk(KERN_INFO "VFP support v0.3: "); 505 if (VFP_arch) 506 printk("not present\n"); 507 else if (vfpsid & FPSID_NODOUBLE) { 508 printk("no double precision support\n"); 509 } else { 510 smp_call_function(vfp_enable, NULL, 1); 511 512 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */ 513 printk("implementor %02x architecture %d part %02x variant %x rev %x\n", 514 (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, 515 (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT, 516 (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT, 517 (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, 518 (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); 519 520 vfp_vector = vfp_support_entry; 521 522 thread_register_notifier(&vfp_notifier_block); 523 vfp_pm_init(); 524 525 /* 526 * We detected VFP, and the support code is 527 * in place; report VFP support to userspace. 528 */ 529 elf_hwcap |= HWCAP_VFP; 530 #ifdef CONFIG_VFPv3 531 if (VFP_arch >= 3) { 532 elf_hwcap |= HWCAP_VFPv3; 533 534 /* 535 * Check for VFPv3 D16. CPUs in this configuration 536 * only have 16 x 64bit registers. 537 */ 538 if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) 539 elf_hwcap |= HWCAP_VFPv3D16; 540 } 541 #endif 542 #ifdef CONFIG_NEON 543 /* 544 * Check for the presence of the Advanced SIMD 545 * load/store instructions, integer and single 546 * precision floating point operations. 547 */ 548 if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100) 549 elf_hwcap |= HWCAP_NEON; 550 #endif 551 } 552 return 0; 553 } 554 555 late_initcall(vfp_init); 556