xref: /openbmc/linux/arch/arm/vfp/vfpmodule.c (revision 9c1f8594)
1 /*
2  *  linux/arch/arm/vfp/vfpmodule.c
3  *
4  *  Copyright (C) 2004 ARM Limited.
5  *  Written by Deep Blue Solutions Limited.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 #include <linux/module.h>
12 #include <linux/types.h>
13 #include <linux/cpu.h>
14 #include <linux/kernel.h>
15 #include <linux/notifier.h>
16 #include <linux/signal.h>
17 #include <linux/sched.h>
18 #include <linux/smp.h>
19 #include <linux/init.h>
20 
21 #include <asm/cputype.h>
22 #include <asm/thread_notify.h>
23 #include <asm/vfp.h>
24 
25 #include "vfpinstr.h"
26 #include "vfp.h"
27 
28 /*
29  * Our undef handlers (in entry.S)
30  */
31 void vfp_testing_entry(void);
32 void vfp_support_entry(void);
33 void vfp_null_entry(void);
34 
35 void (*vfp_vector)(void) = vfp_null_entry;
36 
37 /*
38  * Dual-use variable.
39  * Used in startup: set to non-zero if VFP checks fail
40  * After startup, holds VFP architecture
41  */
42 unsigned int VFP_arch;
43 
44 /*
45  * The pointer to the vfpstate structure of the thread which currently
46  * owns the context held in the VFP hardware, or NULL if the hardware
47  * context is invalid.
48  *
49  * For UP, this is sufficient to tell which thread owns the VFP context.
50  * However, for SMP, we also need to check the CPU number stored in the
51  * saved state too to catch migrations.
52  */
53 union vfp_state *vfp_current_hw_state[NR_CPUS];
54 
55 /*
56  * Is 'thread's most up to date state stored in this CPUs hardware?
57  * Must be called from non-preemptible context.
58  */
59 static bool vfp_state_in_hw(unsigned int cpu, struct thread_info *thread)
60 {
61 #ifdef CONFIG_SMP
62 	if (thread->vfpstate.hard.cpu != cpu)
63 		return false;
64 #endif
65 	return vfp_current_hw_state[cpu] == &thread->vfpstate;
66 }
67 
68 /*
69  * Force a reload of the VFP context from the thread structure.  We do
70  * this by ensuring that access to the VFP hardware is disabled, and
71  * clear last_VFP_context.  Must be called from non-preemptible context.
72  */
73 static void vfp_force_reload(unsigned int cpu, struct thread_info *thread)
74 {
75 	if (vfp_state_in_hw(cpu, thread)) {
76 		fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
77 		vfp_current_hw_state[cpu] = NULL;
78 	}
79 #ifdef CONFIG_SMP
80 	thread->vfpstate.hard.cpu = NR_CPUS;
81 #endif
82 }
83 
84 /*
85  * Per-thread VFP initialization.
86  */
87 static void vfp_thread_flush(struct thread_info *thread)
88 {
89 	union vfp_state *vfp = &thread->vfpstate;
90 	unsigned int cpu;
91 
92 	/*
93 	 * Disable VFP to ensure we initialize it first.  We must ensure
94 	 * that the modification of vfp_current_hw_state[] and hardware
95 	 * disable are done for the same CPU and without preemption.
96 	 *
97 	 * Do this first to ensure that preemption won't overwrite our
98 	 * state saving should access to the VFP be enabled at this point.
99 	 */
100 	cpu = get_cpu();
101 	if (vfp_current_hw_state[cpu] == vfp)
102 		vfp_current_hw_state[cpu] = NULL;
103 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
104 	put_cpu();
105 
106 	memset(vfp, 0, sizeof(union vfp_state));
107 
108 	vfp->hard.fpexc = FPEXC_EN;
109 	vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
110 #ifdef CONFIG_SMP
111 	vfp->hard.cpu = NR_CPUS;
112 #endif
113 }
114 
115 static void vfp_thread_exit(struct thread_info *thread)
116 {
117 	/* release case: Per-thread VFP cleanup. */
118 	union vfp_state *vfp = &thread->vfpstate;
119 	unsigned int cpu = get_cpu();
120 
121 	if (vfp_current_hw_state[cpu] == vfp)
122 		vfp_current_hw_state[cpu] = NULL;
123 	put_cpu();
124 }
125 
126 static void vfp_thread_copy(struct thread_info *thread)
127 {
128 	struct thread_info *parent = current_thread_info();
129 
130 	vfp_sync_hwstate(parent);
131 	thread->vfpstate = parent->vfpstate;
132 #ifdef CONFIG_SMP
133 	thread->vfpstate.hard.cpu = NR_CPUS;
134 #endif
135 }
136 
137 /*
138  * When this function is called with the following 'cmd's, the following
139  * is true while this function is being run:
140  *  THREAD_NOFTIFY_SWTICH:
141  *   - the previously running thread will not be scheduled onto another CPU.
142  *   - the next thread to be run (v) will not be running on another CPU.
143  *   - thread->cpu is the local CPU number
144  *   - not preemptible as we're called in the middle of a thread switch
145  *  THREAD_NOTIFY_FLUSH:
146  *   - the thread (v) will be running on the local CPU, so
147  *	v === current_thread_info()
148  *   - thread->cpu is the local CPU number at the time it is accessed,
149  *	but may change at any time.
150  *   - we could be preempted if tree preempt rcu is enabled, so
151  *	it is unsafe to use thread->cpu.
152  *  THREAD_NOTIFY_EXIT
153  *   - the thread (v) will be running on the local CPU, so
154  *	v === current_thread_info()
155  *   - thread->cpu is the local CPU number at the time it is accessed,
156  *	but may change at any time.
157  *   - we could be preempted if tree preempt rcu is enabled, so
158  *	it is unsafe to use thread->cpu.
159  */
160 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
161 {
162 	struct thread_info *thread = v;
163 	u32 fpexc;
164 #ifdef CONFIG_SMP
165 	unsigned int cpu;
166 #endif
167 
168 	switch (cmd) {
169 	case THREAD_NOTIFY_SWITCH:
170 		fpexc = fmrx(FPEXC);
171 
172 #ifdef CONFIG_SMP
173 		cpu = thread->cpu;
174 
175 		/*
176 		 * On SMP, if VFP is enabled, save the old state in
177 		 * case the thread migrates to a different CPU. The
178 		 * restoring is done lazily.
179 		 */
180 		if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu])
181 			vfp_save_state(vfp_current_hw_state[cpu], fpexc);
182 #endif
183 
184 		/*
185 		 * Always disable VFP so we can lazily save/restore the
186 		 * old state.
187 		 */
188 		fmxr(FPEXC, fpexc & ~FPEXC_EN);
189 		break;
190 
191 	case THREAD_NOTIFY_FLUSH:
192 		vfp_thread_flush(thread);
193 		break;
194 
195 	case THREAD_NOTIFY_EXIT:
196 		vfp_thread_exit(thread);
197 		break;
198 
199 	case THREAD_NOTIFY_COPY:
200 		vfp_thread_copy(thread);
201 		break;
202 	}
203 
204 	return NOTIFY_DONE;
205 }
206 
207 static struct notifier_block vfp_notifier_block = {
208 	.notifier_call	= vfp_notifier,
209 };
210 
211 /*
212  * Raise a SIGFPE for the current process.
213  * sicode describes the signal being raised.
214  */
215 static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
216 {
217 	siginfo_t info;
218 
219 	memset(&info, 0, sizeof(info));
220 
221 	info.si_signo = SIGFPE;
222 	info.si_code = sicode;
223 	info.si_addr = (void __user *)(instruction_pointer(regs) - 4);
224 
225 	/*
226 	 * This is the same as NWFPE, because it's not clear what
227 	 * this is used for
228 	 */
229 	current->thread.error_code = 0;
230 	current->thread.trap_no = 6;
231 
232 	send_sig_info(SIGFPE, &info, current);
233 }
234 
235 static void vfp_panic(char *reason, u32 inst)
236 {
237 	int i;
238 
239 	printk(KERN_ERR "VFP: Error: %s\n", reason);
240 	printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
241 		fmrx(FPEXC), fmrx(FPSCR), inst);
242 	for (i = 0; i < 32; i += 2)
243 		printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
244 		       i, vfp_get_float(i), i+1, vfp_get_float(i+1));
245 }
246 
247 /*
248  * Process bitmask of exception conditions.
249  */
250 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
251 {
252 	int si_code = 0;
253 
254 	pr_debug("VFP: raising exceptions %08x\n", exceptions);
255 
256 	if (exceptions == VFP_EXCEPTION_ERROR) {
257 		vfp_panic("unhandled bounce", inst);
258 		vfp_raise_sigfpe(0, regs);
259 		return;
260 	}
261 
262 	/*
263 	 * If any of the status flags are set, update the FPSCR.
264 	 * Comparison instructions always return at least one of
265 	 * these flags set.
266 	 */
267 	if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
268 		fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
269 
270 	fpscr |= exceptions;
271 
272 	fmxr(FPSCR, fpscr);
273 
274 #define RAISE(stat,en,sig)				\
275 	if (exceptions & stat && fpscr & en)		\
276 		si_code = sig;
277 
278 	/*
279 	 * These are arranged in priority order, least to highest.
280 	 */
281 	RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV);
282 	RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
283 	RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
284 	RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
285 	RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
286 
287 	if (si_code)
288 		vfp_raise_sigfpe(si_code, regs);
289 }
290 
291 /*
292  * Emulate a VFP instruction.
293  */
294 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
295 {
296 	u32 exceptions = VFP_EXCEPTION_ERROR;
297 
298 	pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
299 
300 	if (INST_CPRTDO(inst)) {
301 		if (!INST_CPRT(inst)) {
302 			/*
303 			 * CPDO
304 			 */
305 			if (vfp_single(inst)) {
306 				exceptions = vfp_single_cpdo(inst, fpscr);
307 			} else {
308 				exceptions = vfp_double_cpdo(inst, fpscr);
309 			}
310 		} else {
311 			/*
312 			 * A CPRT instruction can not appear in FPINST2, nor
313 			 * can it cause an exception.  Therefore, we do not
314 			 * have to emulate it.
315 			 */
316 		}
317 	} else {
318 		/*
319 		 * A CPDT instruction can not appear in FPINST2, nor can
320 		 * it cause an exception.  Therefore, we do not have to
321 		 * emulate it.
322 		 */
323 	}
324 	return exceptions & ~VFP_NAN_FLAG;
325 }
326 
327 /*
328  * Package up a bounce condition.
329  */
330 void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
331 {
332 	u32 fpscr, orig_fpscr, fpsid, exceptions;
333 
334 	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
335 
336 	/*
337 	 * At this point, FPEXC can have the following configuration:
338 	 *
339 	 *  EX DEX IXE
340 	 *  0   1   x   - synchronous exception
341 	 *  1   x   0   - asynchronous exception
342 	 *  1   x   1   - sychronous on VFP subarch 1 and asynchronous on later
343 	 *  0   0   1   - synchronous on VFP9 (non-standard subarch 1
344 	 *                implementation), undefined otherwise
345 	 *
346 	 * Clear various bits and enable access to the VFP so we can
347 	 * handle the bounce.
348 	 */
349 	fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
350 
351 	fpsid = fmrx(FPSID);
352 	orig_fpscr = fpscr = fmrx(FPSCR);
353 
354 	/*
355 	 * Check for the special VFP subarch 1 and FPSCR.IXE bit case
356 	 */
357 	if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT)
358 	    && (fpscr & FPSCR_IXE)) {
359 		/*
360 		 * Synchronous exception, emulate the trigger instruction
361 		 */
362 		goto emulate;
363 	}
364 
365 	if (fpexc & FPEXC_EX) {
366 #ifndef CONFIG_CPU_FEROCEON
367 		/*
368 		 * Asynchronous exception. The instruction is read from FPINST
369 		 * and the interrupted instruction has to be restarted.
370 		 */
371 		trigger = fmrx(FPINST);
372 		regs->ARM_pc -= 4;
373 #endif
374 	} else if (!(fpexc & FPEXC_DEX)) {
375 		/*
376 		 * Illegal combination of bits. It can be caused by an
377 		 * unallocated VFP instruction but with FPSCR.IXE set and not
378 		 * on VFP subarch 1.
379 		 */
380 		 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
381 		goto exit;
382 	}
383 
384 	/*
385 	 * Modify fpscr to indicate the number of iterations remaining.
386 	 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
387 	 * whether FPEXC.VECITR or FPSCR.LEN is used.
388 	 */
389 	if (fpexc & (FPEXC_EX | FPEXC_VV)) {
390 		u32 len;
391 
392 		len = fpexc + (1 << FPEXC_LENGTH_BIT);
393 
394 		fpscr &= ~FPSCR_LENGTH_MASK;
395 		fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
396 	}
397 
398 	/*
399 	 * Handle the first FP instruction.  We used to take note of the
400 	 * FPEXC bounce reason, but this appears to be unreliable.
401 	 * Emulate the bounced instruction instead.
402 	 */
403 	exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
404 	if (exceptions)
405 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
406 
407 	/*
408 	 * If there isn't a second FP instruction, exit now. Note that
409 	 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
410 	 */
411 	if (fpexc ^ (FPEXC_EX | FPEXC_FP2V))
412 		goto exit;
413 
414 	/*
415 	 * The barrier() here prevents fpinst2 being read
416 	 * before the condition above.
417 	 */
418 	barrier();
419 	trigger = fmrx(FPINST2);
420 
421  emulate:
422 	exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
423 	if (exceptions)
424 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
425  exit:
426 	preempt_enable();
427 }
428 
429 static void vfp_enable(void *unused)
430 {
431 	u32 access = get_copro_access();
432 
433 	/*
434 	 * Enable full access to VFP (cp10 and cp11)
435 	 */
436 	set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
437 }
438 
439 #ifdef CONFIG_PM
440 #include <linux/syscore_ops.h>
441 
442 static int vfp_pm_suspend(void)
443 {
444 	struct thread_info *ti = current_thread_info();
445 	u32 fpexc = fmrx(FPEXC);
446 
447 	/* if vfp is on, then save state for resumption */
448 	if (fpexc & FPEXC_EN) {
449 		printk(KERN_DEBUG "%s: saving vfp state\n", __func__);
450 		vfp_save_state(&ti->vfpstate, fpexc);
451 
452 		/* disable, just in case */
453 		fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
454 	}
455 
456 	/* clear any information we had about last context state */
457 	memset(vfp_current_hw_state, 0, sizeof(vfp_current_hw_state));
458 
459 	return 0;
460 }
461 
462 static void vfp_pm_resume(void)
463 {
464 	/* ensure we have access to the vfp */
465 	vfp_enable(NULL);
466 
467 	/* and disable it to ensure the next usage restores the state */
468 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
469 }
470 
471 static struct syscore_ops vfp_pm_syscore_ops = {
472 	.suspend	= vfp_pm_suspend,
473 	.resume		= vfp_pm_resume,
474 };
475 
476 static void vfp_pm_init(void)
477 {
478 	register_syscore_ops(&vfp_pm_syscore_ops);
479 }
480 
481 #else
482 static inline void vfp_pm_init(void) { }
483 #endif /* CONFIG_PM */
484 
485 /*
486  * Ensure that the VFP state stored in 'thread->vfpstate' is up to date
487  * with the hardware state.
488  */
489 void vfp_sync_hwstate(struct thread_info *thread)
490 {
491 	unsigned int cpu = get_cpu();
492 
493 	if (vfp_state_in_hw(cpu, thread)) {
494 		u32 fpexc = fmrx(FPEXC);
495 
496 		/*
497 		 * Save the last VFP state on this CPU.
498 		 */
499 		fmxr(FPEXC, fpexc | FPEXC_EN);
500 		vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN);
501 		fmxr(FPEXC, fpexc);
502 	}
503 
504 	put_cpu();
505 }
506 
507 /* Ensure that the thread reloads the hardware VFP state on the next use. */
508 void vfp_flush_hwstate(struct thread_info *thread)
509 {
510 	unsigned int cpu = get_cpu();
511 
512 	vfp_force_reload(cpu, thread);
513 
514 	put_cpu();
515 }
516 
517 /*
518  * VFP hardware can lose all context when a CPU goes offline.
519  * As we will be running in SMP mode with CPU hotplug, we will save the
520  * hardware state at every thread switch.  We clear our held state when
521  * a CPU has been killed, indicating that the VFP hardware doesn't contain
522  * a threads VFP state.  When a CPU starts up, we re-enable access to the
523  * VFP hardware.
524  *
525  * Both CPU_DYING and CPU_STARTING are called on the CPU which
526  * is being offlined/onlined.
527  */
528 static int vfp_hotplug(struct notifier_block *b, unsigned long action,
529 	void *hcpu)
530 {
531 	if (action == CPU_DYING || action == CPU_DYING_FROZEN) {
532 		vfp_force_reload((long)hcpu, current_thread_info());
533 	} else if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
534 		vfp_enable(NULL);
535 	return NOTIFY_OK;
536 }
537 
538 /*
539  * VFP support code initialisation.
540  */
541 static int __init vfp_init(void)
542 {
543 	unsigned int vfpsid;
544 	unsigned int cpu_arch = cpu_architecture();
545 
546 	if (cpu_arch >= CPU_ARCH_ARMv6)
547 		vfp_enable(NULL);
548 
549 	/*
550 	 * First check that there is a VFP that we can use.
551 	 * The handler is already setup to just log calls, so
552 	 * we just need to read the VFPSID register.
553 	 */
554 	vfp_vector = vfp_testing_entry;
555 	barrier();
556 	vfpsid = fmrx(FPSID);
557 	barrier();
558 	vfp_vector = vfp_null_entry;
559 
560 	printk(KERN_INFO "VFP support v0.3: ");
561 	if (VFP_arch)
562 		printk("not present\n");
563 	else if (vfpsid & FPSID_NODOUBLE) {
564 		printk("no double precision support\n");
565 	} else {
566 		hotcpu_notifier(vfp_hotplug, 0);
567 
568 		smp_call_function(vfp_enable, NULL, 1);
569 
570 		VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT;  /* Extract the architecture version */
571 		printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
572 			(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
573 			(vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT,
574 			(vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
575 			(vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
576 			(vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
577 
578 		vfp_vector = vfp_support_entry;
579 
580 		thread_register_notifier(&vfp_notifier_block);
581 		vfp_pm_init();
582 
583 		/*
584 		 * We detected VFP, and the support code is
585 		 * in place; report VFP support to userspace.
586 		 */
587 		elf_hwcap |= HWCAP_VFP;
588 #ifdef CONFIG_VFPv3
589 		if (VFP_arch >= 2) {
590 			elf_hwcap |= HWCAP_VFPv3;
591 
592 			/*
593 			 * Check for VFPv3 D16. CPUs in this configuration
594 			 * only have 16 x 64bit registers.
595 			 */
596 			if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
597 				elf_hwcap |= HWCAP_VFPv3D16;
598 		}
599 #endif
600 		/*
601 		 * Check for the presence of the Advanced SIMD
602 		 * load/store instructions, integer and single
603 		 * precision floating point operations. Only check
604 		 * for NEON if the hardware has the MVFR registers.
605 		 */
606 		if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
607 #ifdef CONFIG_NEON
608 			if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
609 				elf_hwcap |= HWCAP_NEON;
610 #endif
611 			if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
612 				elf_hwcap |= HWCAP_VFPv4;
613 		}
614 	}
615 	return 0;
616 }
617 
618 late_initcall(vfp_init);
619