1 /* 2 * linux/arch/arm/vfp/vfpmodule.c 3 * 4 * Copyright (C) 2004 ARM Limited. 5 * Written by Deep Blue Solutions Limited. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #include <linux/types.h> 12 #include <linux/cpu.h> 13 #include <linux/cpu_pm.h> 14 #include <linux/hardirq.h> 15 #include <linux/kernel.h> 16 #include <linux/notifier.h> 17 #include <linux/signal.h> 18 #include <linux/sched/signal.h> 19 #include <linux/smp.h> 20 #include <linux/init.h> 21 #include <linux/uaccess.h> 22 #include <linux/user.h> 23 #include <linux/export.h> 24 25 #include <asm/cp15.h> 26 #include <asm/cputype.h> 27 #include <asm/system_info.h> 28 #include <asm/thread_notify.h> 29 #include <asm/vfp.h> 30 31 #include "vfpinstr.h" 32 #include "vfp.h" 33 34 /* 35 * Our undef handlers (in entry.S) 36 */ 37 asmlinkage void vfp_testing_entry(void); 38 asmlinkage void vfp_support_entry(void); 39 asmlinkage void vfp_null_entry(void); 40 41 asmlinkage void (*vfp_vector)(void) = vfp_null_entry; 42 43 /* 44 * Dual-use variable. 45 * Used in startup: set to non-zero if VFP checks fail 46 * After startup, holds VFP architecture 47 */ 48 unsigned int VFP_arch; 49 50 /* 51 * The pointer to the vfpstate structure of the thread which currently 52 * owns the context held in the VFP hardware, or NULL if the hardware 53 * context is invalid. 54 * 55 * For UP, this is sufficient to tell which thread owns the VFP context. 56 * However, for SMP, we also need to check the CPU number stored in the 57 * saved state too to catch migrations. 58 */ 59 union vfp_state *vfp_current_hw_state[NR_CPUS]; 60 61 /* 62 * Is 'thread's most up to date state stored in this CPUs hardware? 63 * Must be called from non-preemptible context. 64 */ 65 static bool vfp_state_in_hw(unsigned int cpu, struct thread_info *thread) 66 { 67 #ifdef CONFIG_SMP 68 if (thread->vfpstate.hard.cpu != cpu) 69 return false; 70 #endif 71 return vfp_current_hw_state[cpu] == &thread->vfpstate; 72 } 73 74 /* 75 * Force a reload of the VFP context from the thread structure. We do 76 * this by ensuring that access to the VFP hardware is disabled, and 77 * clear vfp_current_hw_state. Must be called from non-preemptible context. 78 */ 79 static void vfp_force_reload(unsigned int cpu, struct thread_info *thread) 80 { 81 if (vfp_state_in_hw(cpu, thread)) { 82 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 83 vfp_current_hw_state[cpu] = NULL; 84 } 85 #ifdef CONFIG_SMP 86 thread->vfpstate.hard.cpu = NR_CPUS; 87 #endif 88 } 89 90 /* 91 * Per-thread VFP initialization. 92 */ 93 static void vfp_thread_flush(struct thread_info *thread) 94 { 95 union vfp_state *vfp = &thread->vfpstate; 96 unsigned int cpu; 97 98 /* 99 * Disable VFP to ensure we initialize it first. We must ensure 100 * that the modification of vfp_current_hw_state[] and hardware 101 * disable are done for the same CPU and without preemption. 102 * 103 * Do this first to ensure that preemption won't overwrite our 104 * state saving should access to the VFP be enabled at this point. 105 */ 106 cpu = get_cpu(); 107 if (vfp_current_hw_state[cpu] == vfp) 108 vfp_current_hw_state[cpu] = NULL; 109 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 110 put_cpu(); 111 112 memset(vfp, 0, sizeof(union vfp_state)); 113 114 vfp->hard.fpexc = FPEXC_EN; 115 vfp->hard.fpscr = FPSCR_ROUND_NEAREST; 116 #ifdef CONFIG_SMP 117 vfp->hard.cpu = NR_CPUS; 118 #endif 119 } 120 121 static void vfp_thread_exit(struct thread_info *thread) 122 { 123 /* release case: Per-thread VFP cleanup. */ 124 union vfp_state *vfp = &thread->vfpstate; 125 unsigned int cpu = get_cpu(); 126 127 if (vfp_current_hw_state[cpu] == vfp) 128 vfp_current_hw_state[cpu] = NULL; 129 put_cpu(); 130 } 131 132 static void vfp_thread_copy(struct thread_info *thread) 133 { 134 struct thread_info *parent = current_thread_info(); 135 136 vfp_sync_hwstate(parent); 137 thread->vfpstate = parent->vfpstate; 138 #ifdef CONFIG_SMP 139 thread->vfpstate.hard.cpu = NR_CPUS; 140 #endif 141 } 142 143 /* 144 * When this function is called with the following 'cmd's, the following 145 * is true while this function is being run: 146 * THREAD_NOFTIFY_SWTICH: 147 * - the previously running thread will not be scheduled onto another CPU. 148 * - the next thread to be run (v) will not be running on another CPU. 149 * - thread->cpu is the local CPU number 150 * - not preemptible as we're called in the middle of a thread switch 151 * THREAD_NOTIFY_FLUSH: 152 * - the thread (v) will be running on the local CPU, so 153 * v === current_thread_info() 154 * - thread->cpu is the local CPU number at the time it is accessed, 155 * but may change at any time. 156 * - we could be preempted if tree preempt rcu is enabled, so 157 * it is unsafe to use thread->cpu. 158 * THREAD_NOTIFY_EXIT 159 * - we could be preempted if tree preempt rcu is enabled, so 160 * it is unsafe to use thread->cpu. 161 */ 162 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) 163 { 164 struct thread_info *thread = v; 165 u32 fpexc; 166 #ifdef CONFIG_SMP 167 unsigned int cpu; 168 #endif 169 170 switch (cmd) { 171 case THREAD_NOTIFY_SWITCH: 172 fpexc = fmrx(FPEXC); 173 174 #ifdef CONFIG_SMP 175 cpu = thread->cpu; 176 177 /* 178 * On SMP, if VFP is enabled, save the old state in 179 * case the thread migrates to a different CPU. The 180 * restoring is done lazily. 181 */ 182 if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu]) 183 vfp_save_state(vfp_current_hw_state[cpu], fpexc); 184 #endif 185 186 /* 187 * Always disable VFP so we can lazily save/restore the 188 * old state. 189 */ 190 fmxr(FPEXC, fpexc & ~FPEXC_EN); 191 break; 192 193 case THREAD_NOTIFY_FLUSH: 194 vfp_thread_flush(thread); 195 break; 196 197 case THREAD_NOTIFY_EXIT: 198 vfp_thread_exit(thread); 199 break; 200 201 case THREAD_NOTIFY_COPY: 202 vfp_thread_copy(thread); 203 break; 204 } 205 206 return NOTIFY_DONE; 207 } 208 209 static struct notifier_block vfp_notifier_block = { 210 .notifier_call = vfp_notifier, 211 }; 212 213 /* 214 * Raise a SIGFPE for the current process. 215 * sicode describes the signal being raised. 216 */ 217 static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs) 218 { 219 siginfo_t info; 220 221 clear_siginfo(&info); 222 info.si_signo = SIGFPE; 223 info.si_code = sicode; 224 info.si_addr = (void __user *)(instruction_pointer(regs) - 4); 225 226 /* 227 * This is the same as NWFPE, because it's not clear what 228 * this is used for 229 */ 230 current->thread.error_code = 0; 231 current->thread.trap_no = 6; 232 233 send_sig_info(SIGFPE, &info, current); 234 } 235 236 static void vfp_panic(char *reason, u32 inst) 237 { 238 int i; 239 240 pr_err("VFP: Error: %s\n", reason); 241 pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n", 242 fmrx(FPEXC), fmrx(FPSCR), inst); 243 for (i = 0; i < 32; i += 2) 244 pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n", 245 i, vfp_get_float(i), i+1, vfp_get_float(i+1)); 246 } 247 248 /* 249 * Process bitmask of exception conditions. 250 */ 251 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs) 252 { 253 int si_code = 0; 254 255 pr_debug("VFP: raising exceptions %08x\n", exceptions); 256 257 if (exceptions == VFP_EXCEPTION_ERROR) { 258 vfp_panic("unhandled bounce", inst); 259 vfp_raise_sigfpe(FPE_FLTINV, regs); 260 return; 261 } 262 263 /* 264 * If any of the status flags are set, update the FPSCR. 265 * Comparison instructions always return at least one of 266 * these flags set. 267 */ 268 if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V)) 269 fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); 270 271 fpscr |= exceptions; 272 273 fmxr(FPSCR, fpscr); 274 275 #define RAISE(stat,en,sig) \ 276 if (exceptions & stat && fpscr & en) \ 277 si_code = sig; 278 279 /* 280 * These are arranged in priority order, least to highest. 281 */ 282 RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV); 283 RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES); 284 RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND); 285 RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF); 286 RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV); 287 288 if (si_code) 289 vfp_raise_sigfpe(si_code, regs); 290 } 291 292 /* 293 * Emulate a VFP instruction. 294 */ 295 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) 296 { 297 u32 exceptions = VFP_EXCEPTION_ERROR; 298 299 pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); 300 301 if (INST_CPRTDO(inst)) { 302 if (!INST_CPRT(inst)) { 303 /* 304 * CPDO 305 */ 306 if (vfp_single(inst)) { 307 exceptions = vfp_single_cpdo(inst, fpscr); 308 } else { 309 exceptions = vfp_double_cpdo(inst, fpscr); 310 } 311 } else { 312 /* 313 * A CPRT instruction can not appear in FPINST2, nor 314 * can it cause an exception. Therefore, we do not 315 * have to emulate it. 316 */ 317 } 318 } else { 319 /* 320 * A CPDT instruction can not appear in FPINST2, nor can 321 * it cause an exception. Therefore, we do not have to 322 * emulate it. 323 */ 324 } 325 return exceptions & ~VFP_NAN_FLAG; 326 } 327 328 /* 329 * Package up a bounce condition. 330 */ 331 void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) 332 { 333 u32 fpscr, orig_fpscr, fpsid, exceptions; 334 335 pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc); 336 337 /* 338 * At this point, FPEXC can have the following configuration: 339 * 340 * EX DEX IXE 341 * 0 1 x - synchronous exception 342 * 1 x 0 - asynchronous exception 343 * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later 344 * 0 0 1 - synchronous on VFP9 (non-standard subarch 1 345 * implementation), undefined otherwise 346 * 347 * Clear various bits and enable access to the VFP so we can 348 * handle the bounce. 349 */ 350 fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK)); 351 352 fpsid = fmrx(FPSID); 353 orig_fpscr = fpscr = fmrx(FPSCR); 354 355 /* 356 * Check for the special VFP subarch 1 and FPSCR.IXE bit case 357 */ 358 if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT) 359 && (fpscr & FPSCR_IXE)) { 360 /* 361 * Synchronous exception, emulate the trigger instruction 362 */ 363 goto emulate; 364 } 365 366 if (fpexc & FPEXC_EX) { 367 #ifndef CONFIG_CPU_FEROCEON 368 /* 369 * Asynchronous exception. The instruction is read from FPINST 370 * and the interrupted instruction has to be restarted. 371 */ 372 trigger = fmrx(FPINST); 373 regs->ARM_pc -= 4; 374 #endif 375 } else if (!(fpexc & FPEXC_DEX)) { 376 /* 377 * Illegal combination of bits. It can be caused by an 378 * unallocated VFP instruction but with FPSCR.IXE set and not 379 * on VFP subarch 1. 380 */ 381 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs); 382 goto exit; 383 } 384 385 /* 386 * Modify fpscr to indicate the number of iterations remaining. 387 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates 388 * whether FPEXC.VECITR or FPSCR.LEN is used. 389 */ 390 if (fpexc & (FPEXC_EX | FPEXC_VV)) { 391 u32 len; 392 393 len = fpexc + (1 << FPEXC_LENGTH_BIT); 394 395 fpscr &= ~FPSCR_LENGTH_MASK; 396 fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT); 397 } 398 399 /* 400 * Handle the first FP instruction. We used to take note of the 401 * FPEXC bounce reason, but this appears to be unreliable. 402 * Emulate the bounced instruction instead. 403 */ 404 exceptions = vfp_emulate_instruction(trigger, fpscr, regs); 405 if (exceptions) 406 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); 407 408 /* 409 * If there isn't a second FP instruction, exit now. Note that 410 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. 411 */ 412 if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V)) 413 goto exit; 414 415 /* 416 * The barrier() here prevents fpinst2 being read 417 * before the condition above. 418 */ 419 barrier(); 420 trigger = fmrx(FPINST2); 421 422 emulate: 423 exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); 424 if (exceptions) 425 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); 426 exit: 427 preempt_enable(); 428 } 429 430 static void vfp_enable(void *unused) 431 { 432 u32 access; 433 434 BUG_ON(preemptible()); 435 access = get_copro_access(); 436 437 /* 438 * Enable full access to VFP (cp10 and cp11) 439 */ 440 set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); 441 } 442 443 /* Called by platforms on which we want to disable VFP because it may not be 444 * present on all CPUs within a SMP complex. Needs to be called prior to 445 * vfp_init(). 446 */ 447 void vfp_disable(void) 448 { 449 if (VFP_arch) { 450 pr_debug("%s: should be called prior to vfp_init\n", __func__); 451 return; 452 } 453 VFP_arch = 1; 454 } 455 456 #ifdef CONFIG_CPU_PM 457 static int vfp_pm_suspend(void) 458 { 459 struct thread_info *ti = current_thread_info(); 460 u32 fpexc = fmrx(FPEXC); 461 462 /* if vfp is on, then save state for resumption */ 463 if (fpexc & FPEXC_EN) { 464 pr_debug("%s: saving vfp state\n", __func__); 465 vfp_save_state(&ti->vfpstate, fpexc); 466 467 /* disable, just in case */ 468 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 469 } else if (vfp_current_hw_state[ti->cpu]) { 470 #ifndef CONFIG_SMP 471 fmxr(FPEXC, fpexc | FPEXC_EN); 472 vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc); 473 fmxr(FPEXC, fpexc); 474 #endif 475 } 476 477 /* clear any information we had about last context state */ 478 vfp_current_hw_state[ti->cpu] = NULL; 479 480 return 0; 481 } 482 483 static void vfp_pm_resume(void) 484 { 485 /* ensure we have access to the vfp */ 486 vfp_enable(NULL); 487 488 /* and disable it to ensure the next usage restores the state */ 489 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 490 } 491 492 static int vfp_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd, 493 void *v) 494 { 495 switch (cmd) { 496 case CPU_PM_ENTER: 497 vfp_pm_suspend(); 498 break; 499 case CPU_PM_ENTER_FAILED: 500 case CPU_PM_EXIT: 501 vfp_pm_resume(); 502 break; 503 } 504 return NOTIFY_OK; 505 } 506 507 static struct notifier_block vfp_cpu_pm_notifier_block = { 508 .notifier_call = vfp_cpu_pm_notifier, 509 }; 510 511 static void vfp_pm_init(void) 512 { 513 cpu_pm_register_notifier(&vfp_cpu_pm_notifier_block); 514 } 515 516 #else 517 static inline void vfp_pm_init(void) { } 518 #endif /* CONFIG_CPU_PM */ 519 520 /* 521 * Ensure that the VFP state stored in 'thread->vfpstate' is up to date 522 * with the hardware state. 523 */ 524 void vfp_sync_hwstate(struct thread_info *thread) 525 { 526 unsigned int cpu = get_cpu(); 527 528 if (vfp_state_in_hw(cpu, thread)) { 529 u32 fpexc = fmrx(FPEXC); 530 531 /* 532 * Save the last VFP state on this CPU. 533 */ 534 fmxr(FPEXC, fpexc | FPEXC_EN); 535 vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN); 536 fmxr(FPEXC, fpexc); 537 } 538 539 put_cpu(); 540 } 541 542 /* Ensure that the thread reloads the hardware VFP state on the next use. */ 543 void vfp_flush_hwstate(struct thread_info *thread) 544 { 545 unsigned int cpu = get_cpu(); 546 547 vfp_force_reload(cpu, thread); 548 549 put_cpu(); 550 } 551 552 /* 553 * Save the current VFP state into the provided structures and prepare 554 * for entry into a new function (signal handler). 555 */ 556 int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp, 557 struct user_vfp_exc __user *ufp_exc) 558 { 559 struct thread_info *thread = current_thread_info(); 560 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; 561 int err = 0; 562 563 /* Ensure that the saved hwstate is up-to-date. */ 564 vfp_sync_hwstate(thread); 565 566 /* 567 * Copy the floating point registers. There can be unused 568 * registers see asm/hwcap.h for details. 569 */ 570 err |= __copy_to_user(&ufp->fpregs, &hwstate->fpregs, 571 sizeof(hwstate->fpregs)); 572 /* 573 * Copy the status and control register. 574 */ 575 __put_user_error(hwstate->fpscr, &ufp->fpscr, err); 576 577 /* 578 * Copy the exception registers. 579 */ 580 __put_user_error(hwstate->fpexc, &ufp_exc->fpexc, err); 581 __put_user_error(hwstate->fpinst, &ufp_exc->fpinst, err); 582 __put_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err); 583 584 if (err) 585 return -EFAULT; 586 587 /* Ensure that VFP is disabled. */ 588 vfp_flush_hwstate(thread); 589 590 /* 591 * As per the PCS, clear the length and stride bits for function 592 * entry. 593 */ 594 hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK); 595 return 0; 596 } 597 598 /* Sanitise and restore the current VFP state from the provided structures. */ 599 int vfp_restore_user_hwstate(struct user_vfp *ufp, struct user_vfp_exc *ufp_exc) 600 { 601 struct thread_info *thread = current_thread_info(); 602 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; 603 unsigned long fpexc; 604 605 /* Disable VFP to avoid corrupting the new thread state. */ 606 vfp_flush_hwstate(thread); 607 608 /* 609 * Copy the floating point registers. There can be unused 610 * registers see asm/hwcap.h for details. 611 */ 612 memcpy(&hwstate->fpregs, &ufp->fpregs, sizeof(hwstate->fpregs)); 613 /* 614 * Copy the status and control register. 615 */ 616 hwstate->fpscr = ufp->fpscr; 617 618 /* 619 * Sanitise and restore the exception registers. 620 */ 621 fpexc = ufp_exc->fpexc; 622 623 /* Ensure the VFP is enabled. */ 624 fpexc |= FPEXC_EN; 625 626 /* Ensure FPINST2 is invalid and the exception flag is cleared. */ 627 fpexc &= ~(FPEXC_EX | FPEXC_FP2V); 628 hwstate->fpexc = fpexc; 629 630 hwstate->fpinst = ufp_exc->fpinst; 631 hwstate->fpinst2 = ufp_exc->fpinst2; 632 633 return 0; 634 } 635 636 /* 637 * VFP hardware can lose all context when a CPU goes offline. 638 * As we will be running in SMP mode with CPU hotplug, we will save the 639 * hardware state at every thread switch. We clear our held state when 640 * a CPU has been killed, indicating that the VFP hardware doesn't contain 641 * a threads VFP state. When a CPU starts up, we re-enable access to the 642 * VFP hardware. The callbacks below are called on the CPU which 643 * is being offlined/onlined. 644 */ 645 static int vfp_dying_cpu(unsigned int cpu) 646 { 647 vfp_current_hw_state[cpu] = NULL; 648 return 0; 649 } 650 651 static int vfp_starting_cpu(unsigned int unused) 652 { 653 vfp_enable(NULL); 654 return 0; 655 } 656 657 void vfp_kmode_exception(void) 658 { 659 /* 660 * If we reach this point, a floating point exception has been raised 661 * while running in kernel mode. If the NEON/VFP unit was enabled at the 662 * time, it means a VFP instruction has been issued that requires 663 * software assistance to complete, something which is not currently 664 * supported in kernel mode. 665 * If the NEON/VFP unit was disabled, and the location pointed to below 666 * is properly preceded by a call to kernel_neon_begin(), something has 667 * caused the task to be scheduled out and back in again. In this case, 668 * rebuilding and running with CONFIG_DEBUG_ATOMIC_SLEEP enabled should 669 * be helpful in localizing the problem. 670 */ 671 if (fmrx(FPEXC) & FPEXC_EN) 672 pr_crit("BUG: unsupported FP instruction in kernel mode\n"); 673 else 674 pr_crit("BUG: FP instruction issued in kernel mode with FP unit disabled\n"); 675 } 676 677 #ifdef CONFIG_KERNEL_MODE_NEON 678 679 /* 680 * Kernel-side NEON support functions 681 */ 682 void kernel_neon_begin(void) 683 { 684 struct thread_info *thread = current_thread_info(); 685 unsigned int cpu; 686 u32 fpexc; 687 688 /* 689 * Kernel mode NEON is only allowed outside of interrupt context 690 * with preemption disabled. This will make sure that the kernel 691 * mode NEON register contents never need to be preserved. 692 */ 693 BUG_ON(in_interrupt()); 694 cpu = get_cpu(); 695 696 fpexc = fmrx(FPEXC) | FPEXC_EN; 697 fmxr(FPEXC, fpexc); 698 699 /* 700 * Save the userland NEON/VFP state. Under UP, 701 * the owner could be a task other than 'current' 702 */ 703 if (vfp_state_in_hw(cpu, thread)) 704 vfp_save_state(&thread->vfpstate, fpexc); 705 #ifndef CONFIG_SMP 706 else if (vfp_current_hw_state[cpu] != NULL) 707 vfp_save_state(vfp_current_hw_state[cpu], fpexc); 708 #endif 709 vfp_current_hw_state[cpu] = NULL; 710 } 711 EXPORT_SYMBOL(kernel_neon_begin); 712 713 void kernel_neon_end(void) 714 { 715 /* Disable the NEON/VFP unit. */ 716 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 717 put_cpu(); 718 } 719 EXPORT_SYMBOL(kernel_neon_end); 720 721 #endif /* CONFIG_KERNEL_MODE_NEON */ 722 723 /* 724 * VFP support code initialisation. 725 */ 726 static int __init vfp_init(void) 727 { 728 unsigned int vfpsid; 729 unsigned int cpu_arch = cpu_architecture(); 730 731 /* 732 * Enable the access to the VFP on all online CPUs so the 733 * following test on FPSID will succeed. 734 */ 735 if (cpu_arch >= CPU_ARCH_ARMv6) 736 on_each_cpu(vfp_enable, NULL, 1); 737 738 /* 739 * First check that there is a VFP that we can use. 740 * The handler is already setup to just log calls, so 741 * we just need to read the VFPSID register. 742 */ 743 vfp_vector = vfp_testing_entry; 744 barrier(); 745 vfpsid = fmrx(FPSID); 746 barrier(); 747 vfp_vector = vfp_null_entry; 748 749 pr_info("VFP support v0.3: "); 750 if (VFP_arch) { 751 pr_cont("not present\n"); 752 return 0; 753 /* Extract the architecture on CPUID scheme */ 754 } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) { 755 VFP_arch = vfpsid & FPSID_CPUID_ARCH_MASK; 756 VFP_arch >>= FPSID_ARCH_BIT; 757 /* 758 * Check for the presence of the Advanced SIMD 759 * load/store instructions, integer and single 760 * precision floating point operations. Only check 761 * for NEON if the hardware has the MVFR registers. 762 */ 763 if (IS_ENABLED(CONFIG_NEON) && 764 (fmrx(MVFR1) & 0x000fff00) == 0x00011100) 765 elf_hwcap |= HWCAP_NEON; 766 767 if (IS_ENABLED(CONFIG_VFPv3)) { 768 u32 mvfr0 = fmrx(MVFR0); 769 if (((mvfr0 & MVFR0_DP_MASK) >> MVFR0_DP_BIT) == 0x2 || 770 ((mvfr0 & MVFR0_SP_MASK) >> MVFR0_SP_BIT) == 0x2) { 771 elf_hwcap |= HWCAP_VFPv3; 772 /* 773 * Check for VFPv3 D16 and VFPv4 D16. CPUs in 774 * this configuration only have 16 x 64bit 775 * registers. 776 */ 777 if ((mvfr0 & MVFR0_A_SIMD_MASK) == 1) 778 /* also v4-D16 */ 779 elf_hwcap |= HWCAP_VFPv3D16; 780 else 781 elf_hwcap |= HWCAP_VFPD32; 782 } 783 784 if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000) 785 elf_hwcap |= HWCAP_VFPv4; 786 } 787 /* Extract the architecture version on pre-cpuid scheme */ 788 } else { 789 if (vfpsid & FPSID_NODOUBLE) { 790 pr_cont("no double precision support\n"); 791 return 0; 792 } 793 794 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; 795 } 796 797 cpuhp_setup_state_nocalls(CPUHP_AP_ARM_VFP_STARTING, 798 "arm/vfp:starting", vfp_starting_cpu, 799 vfp_dying_cpu); 800 801 vfp_vector = vfp_support_entry; 802 803 thread_register_notifier(&vfp_notifier_block); 804 vfp_pm_init(); 805 806 /* 807 * We detected VFP, and the support code is 808 * in place; report VFP support to userspace. 809 */ 810 elf_hwcap |= HWCAP_VFP; 811 812 pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n", 813 (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, 814 VFP_arch, 815 (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT, 816 (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, 817 (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); 818 819 return 0; 820 } 821 822 core_initcall(vfp_init); 823