1 /* 2 * linux/arch/arm/vfp/vfpmodule.c 3 * 4 * Copyright (C) 2004 ARM Limited. 5 * Written by Deep Blue Solutions Limited. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #include <linux/types.h> 12 #include <linux/cpu.h> 13 #include <linux/cpu_pm.h> 14 #include <linux/hardirq.h> 15 #include <linux/kernel.h> 16 #include <linux/notifier.h> 17 #include <linux/signal.h> 18 #include <linux/sched/signal.h> 19 #include <linux/smp.h> 20 #include <linux/init.h> 21 #include <linux/uaccess.h> 22 #include <linux/user.h> 23 #include <linux/export.h> 24 25 #include <asm/cp15.h> 26 #include <asm/cputype.h> 27 #include <asm/system_info.h> 28 #include <asm/thread_notify.h> 29 #include <asm/vfp.h> 30 31 #include "vfpinstr.h" 32 #include "vfp.h" 33 34 /* 35 * Our undef handlers (in entry.S) 36 */ 37 asmlinkage void vfp_testing_entry(void); 38 asmlinkage void vfp_support_entry(void); 39 asmlinkage void vfp_null_entry(void); 40 41 asmlinkage void (*vfp_vector)(void) = vfp_null_entry; 42 43 /* 44 * Dual-use variable. 45 * Used in startup: set to non-zero if VFP checks fail 46 * After startup, holds VFP architecture 47 */ 48 unsigned int VFP_arch; 49 50 /* 51 * The pointer to the vfpstate structure of the thread which currently 52 * owns the context held in the VFP hardware, or NULL if the hardware 53 * context is invalid. 54 * 55 * For UP, this is sufficient to tell which thread owns the VFP context. 56 * However, for SMP, we also need to check the CPU number stored in the 57 * saved state too to catch migrations. 58 */ 59 union vfp_state *vfp_current_hw_state[NR_CPUS]; 60 61 /* 62 * Is 'thread's most up to date state stored in this CPUs hardware? 63 * Must be called from non-preemptible context. 64 */ 65 static bool vfp_state_in_hw(unsigned int cpu, struct thread_info *thread) 66 { 67 #ifdef CONFIG_SMP 68 if (thread->vfpstate.hard.cpu != cpu) 69 return false; 70 #endif 71 return vfp_current_hw_state[cpu] == &thread->vfpstate; 72 } 73 74 /* 75 * Force a reload of the VFP context from the thread structure. We do 76 * this by ensuring that access to the VFP hardware is disabled, and 77 * clear vfp_current_hw_state. Must be called from non-preemptible context. 78 */ 79 static void vfp_force_reload(unsigned int cpu, struct thread_info *thread) 80 { 81 if (vfp_state_in_hw(cpu, thread)) { 82 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 83 vfp_current_hw_state[cpu] = NULL; 84 } 85 #ifdef CONFIG_SMP 86 thread->vfpstate.hard.cpu = NR_CPUS; 87 #endif 88 } 89 90 /* 91 * Per-thread VFP initialization. 92 */ 93 static void vfp_thread_flush(struct thread_info *thread) 94 { 95 union vfp_state *vfp = &thread->vfpstate; 96 unsigned int cpu; 97 98 /* 99 * Disable VFP to ensure we initialize it first. We must ensure 100 * that the modification of vfp_current_hw_state[] and hardware 101 * disable are done for the same CPU and without preemption. 102 * 103 * Do this first to ensure that preemption won't overwrite our 104 * state saving should access to the VFP be enabled at this point. 105 */ 106 cpu = get_cpu(); 107 if (vfp_current_hw_state[cpu] == vfp) 108 vfp_current_hw_state[cpu] = NULL; 109 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 110 put_cpu(); 111 112 memset(vfp, 0, sizeof(union vfp_state)); 113 114 vfp->hard.fpexc = FPEXC_EN; 115 vfp->hard.fpscr = FPSCR_ROUND_NEAREST; 116 #ifdef CONFIG_SMP 117 vfp->hard.cpu = NR_CPUS; 118 #endif 119 } 120 121 static void vfp_thread_exit(struct thread_info *thread) 122 { 123 /* release case: Per-thread VFP cleanup. */ 124 union vfp_state *vfp = &thread->vfpstate; 125 unsigned int cpu = get_cpu(); 126 127 if (vfp_current_hw_state[cpu] == vfp) 128 vfp_current_hw_state[cpu] = NULL; 129 put_cpu(); 130 } 131 132 static void vfp_thread_copy(struct thread_info *thread) 133 { 134 struct thread_info *parent = current_thread_info(); 135 136 vfp_sync_hwstate(parent); 137 thread->vfpstate = parent->vfpstate; 138 #ifdef CONFIG_SMP 139 thread->vfpstate.hard.cpu = NR_CPUS; 140 #endif 141 } 142 143 /* 144 * When this function is called with the following 'cmd's, the following 145 * is true while this function is being run: 146 * THREAD_NOFTIFY_SWTICH: 147 * - the previously running thread will not be scheduled onto another CPU. 148 * - the next thread to be run (v) will not be running on another CPU. 149 * - thread->cpu is the local CPU number 150 * - not preemptible as we're called in the middle of a thread switch 151 * THREAD_NOTIFY_FLUSH: 152 * - the thread (v) will be running on the local CPU, so 153 * v === current_thread_info() 154 * - thread->cpu is the local CPU number at the time it is accessed, 155 * but may change at any time. 156 * - we could be preempted if tree preempt rcu is enabled, so 157 * it is unsafe to use thread->cpu. 158 * THREAD_NOTIFY_EXIT 159 * - we could be preempted if tree preempt rcu is enabled, so 160 * it is unsafe to use thread->cpu. 161 */ 162 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) 163 { 164 struct thread_info *thread = v; 165 u32 fpexc; 166 #ifdef CONFIG_SMP 167 unsigned int cpu; 168 #endif 169 170 switch (cmd) { 171 case THREAD_NOTIFY_SWITCH: 172 fpexc = fmrx(FPEXC); 173 174 #ifdef CONFIG_SMP 175 cpu = thread->cpu; 176 177 /* 178 * On SMP, if VFP is enabled, save the old state in 179 * case the thread migrates to a different CPU. The 180 * restoring is done lazily. 181 */ 182 if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu]) 183 vfp_save_state(vfp_current_hw_state[cpu], fpexc); 184 #endif 185 186 /* 187 * Always disable VFP so we can lazily save/restore the 188 * old state. 189 */ 190 fmxr(FPEXC, fpexc & ~FPEXC_EN); 191 break; 192 193 case THREAD_NOTIFY_FLUSH: 194 vfp_thread_flush(thread); 195 break; 196 197 case THREAD_NOTIFY_EXIT: 198 vfp_thread_exit(thread); 199 break; 200 201 case THREAD_NOTIFY_COPY: 202 vfp_thread_copy(thread); 203 break; 204 } 205 206 return NOTIFY_DONE; 207 } 208 209 static struct notifier_block vfp_notifier_block = { 210 .notifier_call = vfp_notifier, 211 }; 212 213 /* 214 * Raise a SIGFPE for the current process. 215 * sicode describes the signal being raised. 216 */ 217 static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs) 218 { 219 siginfo_t info; 220 221 memset(&info, 0, sizeof(info)); 222 223 info.si_signo = SIGFPE; 224 info.si_code = sicode; 225 info.si_addr = (void __user *)(instruction_pointer(regs) - 4); 226 227 /* 228 * This is the same as NWFPE, because it's not clear what 229 * this is used for 230 */ 231 current->thread.error_code = 0; 232 current->thread.trap_no = 6; 233 234 send_sig_info(SIGFPE, &info, current); 235 } 236 237 static void vfp_panic(char *reason, u32 inst) 238 { 239 int i; 240 241 pr_err("VFP: Error: %s\n", reason); 242 pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n", 243 fmrx(FPEXC), fmrx(FPSCR), inst); 244 for (i = 0; i < 32; i += 2) 245 pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n", 246 i, vfp_get_float(i), i+1, vfp_get_float(i+1)); 247 } 248 249 /* 250 * Process bitmask of exception conditions. 251 */ 252 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs) 253 { 254 int si_code = 0; 255 256 pr_debug("VFP: raising exceptions %08x\n", exceptions); 257 258 if (exceptions == VFP_EXCEPTION_ERROR) { 259 vfp_panic("unhandled bounce", inst); 260 vfp_raise_sigfpe(FPE_FIXME, regs); 261 return; 262 } 263 264 /* 265 * If any of the status flags are set, update the FPSCR. 266 * Comparison instructions always return at least one of 267 * these flags set. 268 */ 269 if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V)) 270 fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); 271 272 fpscr |= exceptions; 273 274 fmxr(FPSCR, fpscr); 275 276 #define RAISE(stat,en,sig) \ 277 if (exceptions & stat && fpscr & en) \ 278 si_code = sig; 279 280 /* 281 * These are arranged in priority order, least to highest. 282 */ 283 RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV); 284 RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES); 285 RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND); 286 RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF); 287 RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV); 288 289 if (si_code) 290 vfp_raise_sigfpe(si_code, regs); 291 } 292 293 /* 294 * Emulate a VFP instruction. 295 */ 296 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) 297 { 298 u32 exceptions = VFP_EXCEPTION_ERROR; 299 300 pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); 301 302 if (INST_CPRTDO(inst)) { 303 if (!INST_CPRT(inst)) { 304 /* 305 * CPDO 306 */ 307 if (vfp_single(inst)) { 308 exceptions = vfp_single_cpdo(inst, fpscr); 309 } else { 310 exceptions = vfp_double_cpdo(inst, fpscr); 311 } 312 } else { 313 /* 314 * A CPRT instruction can not appear in FPINST2, nor 315 * can it cause an exception. Therefore, we do not 316 * have to emulate it. 317 */ 318 } 319 } else { 320 /* 321 * A CPDT instruction can not appear in FPINST2, nor can 322 * it cause an exception. Therefore, we do not have to 323 * emulate it. 324 */ 325 } 326 return exceptions & ~VFP_NAN_FLAG; 327 } 328 329 /* 330 * Package up a bounce condition. 331 */ 332 void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) 333 { 334 u32 fpscr, orig_fpscr, fpsid, exceptions; 335 336 pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc); 337 338 /* 339 * At this point, FPEXC can have the following configuration: 340 * 341 * EX DEX IXE 342 * 0 1 x - synchronous exception 343 * 1 x 0 - asynchronous exception 344 * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later 345 * 0 0 1 - synchronous on VFP9 (non-standard subarch 1 346 * implementation), undefined otherwise 347 * 348 * Clear various bits and enable access to the VFP so we can 349 * handle the bounce. 350 */ 351 fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK)); 352 353 fpsid = fmrx(FPSID); 354 orig_fpscr = fpscr = fmrx(FPSCR); 355 356 /* 357 * Check for the special VFP subarch 1 and FPSCR.IXE bit case 358 */ 359 if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT) 360 && (fpscr & FPSCR_IXE)) { 361 /* 362 * Synchronous exception, emulate the trigger instruction 363 */ 364 goto emulate; 365 } 366 367 if (fpexc & FPEXC_EX) { 368 #ifndef CONFIG_CPU_FEROCEON 369 /* 370 * Asynchronous exception. The instruction is read from FPINST 371 * and the interrupted instruction has to be restarted. 372 */ 373 trigger = fmrx(FPINST); 374 regs->ARM_pc -= 4; 375 #endif 376 } else if (!(fpexc & FPEXC_DEX)) { 377 /* 378 * Illegal combination of bits. It can be caused by an 379 * unallocated VFP instruction but with FPSCR.IXE set and not 380 * on VFP subarch 1. 381 */ 382 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs); 383 goto exit; 384 } 385 386 /* 387 * Modify fpscr to indicate the number of iterations remaining. 388 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates 389 * whether FPEXC.VECITR or FPSCR.LEN is used. 390 */ 391 if (fpexc & (FPEXC_EX | FPEXC_VV)) { 392 u32 len; 393 394 len = fpexc + (1 << FPEXC_LENGTH_BIT); 395 396 fpscr &= ~FPSCR_LENGTH_MASK; 397 fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT); 398 } 399 400 /* 401 * Handle the first FP instruction. We used to take note of the 402 * FPEXC bounce reason, but this appears to be unreliable. 403 * Emulate the bounced instruction instead. 404 */ 405 exceptions = vfp_emulate_instruction(trigger, fpscr, regs); 406 if (exceptions) 407 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); 408 409 /* 410 * If there isn't a second FP instruction, exit now. Note that 411 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. 412 */ 413 if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V)) 414 goto exit; 415 416 /* 417 * The barrier() here prevents fpinst2 being read 418 * before the condition above. 419 */ 420 barrier(); 421 trigger = fmrx(FPINST2); 422 423 emulate: 424 exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); 425 if (exceptions) 426 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); 427 exit: 428 preempt_enable(); 429 } 430 431 static void vfp_enable(void *unused) 432 { 433 u32 access; 434 435 BUG_ON(preemptible()); 436 access = get_copro_access(); 437 438 /* 439 * Enable full access to VFP (cp10 and cp11) 440 */ 441 set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); 442 } 443 444 /* Called by platforms on which we want to disable VFP because it may not be 445 * present on all CPUs within a SMP complex. Needs to be called prior to 446 * vfp_init(). 447 */ 448 void vfp_disable(void) 449 { 450 if (VFP_arch) { 451 pr_debug("%s: should be called prior to vfp_init\n", __func__); 452 return; 453 } 454 VFP_arch = 1; 455 } 456 457 #ifdef CONFIG_CPU_PM 458 static int vfp_pm_suspend(void) 459 { 460 struct thread_info *ti = current_thread_info(); 461 u32 fpexc = fmrx(FPEXC); 462 463 /* if vfp is on, then save state for resumption */ 464 if (fpexc & FPEXC_EN) { 465 pr_debug("%s: saving vfp state\n", __func__); 466 vfp_save_state(&ti->vfpstate, fpexc); 467 468 /* disable, just in case */ 469 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 470 } else if (vfp_current_hw_state[ti->cpu]) { 471 #ifndef CONFIG_SMP 472 fmxr(FPEXC, fpexc | FPEXC_EN); 473 vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc); 474 fmxr(FPEXC, fpexc); 475 #endif 476 } 477 478 /* clear any information we had about last context state */ 479 vfp_current_hw_state[ti->cpu] = NULL; 480 481 return 0; 482 } 483 484 static void vfp_pm_resume(void) 485 { 486 /* ensure we have access to the vfp */ 487 vfp_enable(NULL); 488 489 /* and disable it to ensure the next usage restores the state */ 490 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 491 } 492 493 static int vfp_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd, 494 void *v) 495 { 496 switch (cmd) { 497 case CPU_PM_ENTER: 498 vfp_pm_suspend(); 499 break; 500 case CPU_PM_ENTER_FAILED: 501 case CPU_PM_EXIT: 502 vfp_pm_resume(); 503 break; 504 } 505 return NOTIFY_OK; 506 } 507 508 static struct notifier_block vfp_cpu_pm_notifier_block = { 509 .notifier_call = vfp_cpu_pm_notifier, 510 }; 511 512 static void vfp_pm_init(void) 513 { 514 cpu_pm_register_notifier(&vfp_cpu_pm_notifier_block); 515 } 516 517 #else 518 static inline void vfp_pm_init(void) { } 519 #endif /* CONFIG_CPU_PM */ 520 521 /* 522 * Ensure that the VFP state stored in 'thread->vfpstate' is up to date 523 * with the hardware state. 524 */ 525 void vfp_sync_hwstate(struct thread_info *thread) 526 { 527 unsigned int cpu = get_cpu(); 528 529 if (vfp_state_in_hw(cpu, thread)) { 530 u32 fpexc = fmrx(FPEXC); 531 532 /* 533 * Save the last VFP state on this CPU. 534 */ 535 fmxr(FPEXC, fpexc | FPEXC_EN); 536 vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN); 537 fmxr(FPEXC, fpexc); 538 } 539 540 put_cpu(); 541 } 542 543 /* Ensure that the thread reloads the hardware VFP state on the next use. */ 544 void vfp_flush_hwstate(struct thread_info *thread) 545 { 546 unsigned int cpu = get_cpu(); 547 548 vfp_force_reload(cpu, thread); 549 550 put_cpu(); 551 } 552 553 /* 554 * Save the current VFP state into the provided structures and prepare 555 * for entry into a new function (signal handler). 556 */ 557 int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp, 558 struct user_vfp_exc __user *ufp_exc) 559 { 560 struct thread_info *thread = current_thread_info(); 561 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; 562 int err = 0; 563 564 /* Ensure that the saved hwstate is up-to-date. */ 565 vfp_sync_hwstate(thread); 566 567 /* 568 * Copy the floating point registers. There can be unused 569 * registers see asm/hwcap.h for details. 570 */ 571 err |= __copy_to_user(&ufp->fpregs, &hwstate->fpregs, 572 sizeof(hwstate->fpregs)); 573 /* 574 * Copy the status and control register. 575 */ 576 __put_user_error(hwstate->fpscr, &ufp->fpscr, err); 577 578 /* 579 * Copy the exception registers. 580 */ 581 __put_user_error(hwstate->fpexc, &ufp_exc->fpexc, err); 582 __put_user_error(hwstate->fpinst, &ufp_exc->fpinst, err); 583 __put_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err); 584 585 if (err) 586 return -EFAULT; 587 588 /* Ensure that VFP is disabled. */ 589 vfp_flush_hwstate(thread); 590 591 /* 592 * As per the PCS, clear the length and stride bits for function 593 * entry. 594 */ 595 hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK); 596 return 0; 597 } 598 599 /* Sanitise and restore the current VFP state from the provided structures. */ 600 int vfp_restore_user_hwstate(struct user_vfp __user *ufp, 601 struct user_vfp_exc __user *ufp_exc) 602 { 603 struct thread_info *thread = current_thread_info(); 604 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; 605 unsigned long fpexc; 606 int err = 0; 607 608 /* Disable VFP to avoid corrupting the new thread state. */ 609 vfp_flush_hwstate(thread); 610 611 /* 612 * Copy the floating point registers. There can be unused 613 * registers see asm/hwcap.h for details. 614 */ 615 err |= __copy_from_user(&hwstate->fpregs, &ufp->fpregs, 616 sizeof(hwstate->fpregs)); 617 /* 618 * Copy the status and control register. 619 */ 620 __get_user_error(hwstate->fpscr, &ufp->fpscr, err); 621 622 /* 623 * Sanitise and restore the exception registers. 624 */ 625 __get_user_error(fpexc, &ufp_exc->fpexc, err); 626 627 /* Ensure the VFP is enabled. */ 628 fpexc |= FPEXC_EN; 629 630 /* Ensure FPINST2 is invalid and the exception flag is cleared. */ 631 fpexc &= ~(FPEXC_EX | FPEXC_FP2V); 632 hwstate->fpexc = fpexc; 633 634 __get_user_error(hwstate->fpinst, &ufp_exc->fpinst, err); 635 __get_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err); 636 637 return err ? -EFAULT : 0; 638 } 639 640 /* 641 * VFP hardware can lose all context when a CPU goes offline. 642 * As we will be running in SMP mode with CPU hotplug, we will save the 643 * hardware state at every thread switch. We clear our held state when 644 * a CPU has been killed, indicating that the VFP hardware doesn't contain 645 * a threads VFP state. When a CPU starts up, we re-enable access to the 646 * VFP hardware. The callbacks below are called on the CPU which 647 * is being offlined/onlined. 648 */ 649 static int vfp_dying_cpu(unsigned int cpu) 650 { 651 vfp_current_hw_state[cpu] = NULL; 652 return 0; 653 } 654 655 static int vfp_starting_cpu(unsigned int unused) 656 { 657 vfp_enable(NULL); 658 return 0; 659 } 660 661 void vfp_kmode_exception(void) 662 { 663 /* 664 * If we reach this point, a floating point exception has been raised 665 * while running in kernel mode. If the NEON/VFP unit was enabled at the 666 * time, it means a VFP instruction has been issued that requires 667 * software assistance to complete, something which is not currently 668 * supported in kernel mode. 669 * If the NEON/VFP unit was disabled, and the location pointed to below 670 * is properly preceded by a call to kernel_neon_begin(), something has 671 * caused the task to be scheduled out and back in again. In this case, 672 * rebuilding and running with CONFIG_DEBUG_ATOMIC_SLEEP enabled should 673 * be helpful in localizing the problem. 674 */ 675 if (fmrx(FPEXC) & FPEXC_EN) 676 pr_crit("BUG: unsupported FP instruction in kernel mode\n"); 677 else 678 pr_crit("BUG: FP instruction issued in kernel mode with FP unit disabled\n"); 679 } 680 681 #ifdef CONFIG_KERNEL_MODE_NEON 682 683 /* 684 * Kernel-side NEON support functions 685 */ 686 void kernel_neon_begin(void) 687 { 688 struct thread_info *thread = current_thread_info(); 689 unsigned int cpu; 690 u32 fpexc; 691 692 /* 693 * Kernel mode NEON is only allowed outside of interrupt context 694 * with preemption disabled. This will make sure that the kernel 695 * mode NEON register contents never need to be preserved. 696 */ 697 BUG_ON(in_interrupt()); 698 cpu = get_cpu(); 699 700 fpexc = fmrx(FPEXC) | FPEXC_EN; 701 fmxr(FPEXC, fpexc); 702 703 /* 704 * Save the userland NEON/VFP state. Under UP, 705 * the owner could be a task other than 'current' 706 */ 707 if (vfp_state_in_hw(cpu, thread)) 708 vfp_save_state(&thread->vfpstate, fpexc); 709 #ifndef CONFIG_SMP 710 else if (vfp_current_hw_state[cpu] != NULL) 711 vfp_save_state(vfp_current_hw_state[cpu], fpexc); 712 #endif 713 vfp_current_hw_state[cpu] = NULL; 714 } 715 EXPORT_SYMBOL(kernel_neon_begin); 716 717 void kernel_neon_end(void) 718 { 719 /* Disable the NEON/VFP unit. */ 720 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 721 put_cpu(); 722 } 723 EXPORT_SYMBOL(kernel_neon_end); 724 725 #endif /* CONFIG_KERNEL_MODE_NEON */ 726 727 /* 728 * VFP support code initialisation. 729 */ 730 static int __init vfp_init(void) 731 { 732 unsigned int vfpsid; 733 unsigned int cpu_arch = cpu_architecture(); 734 735 /* 736 * Enable the access to the VFP on all online CPUs so the 737 * following test on FPSID will succeed. 738 */ 739 if (cpu_arch >= CPU_ARCH_ARMv6) 740 on_each_cpu(vfp_enable, NULL, 1); 741 742 /* 743 * First check that there is a VFP that we can use. 744 * The handler is already setup to just log calls, so 745 * we just need to read the VFPSID register. 746 */ 747 vfp_vector = vfp_testing_entry; 748 barrier(); 749 vfpsid = fmrx(FPSID); 750 barrier(); 751 vfp_vector = vfp_null_entry; 752 753 pr_info("VFP support v0.3: "); 754 if (VFP_arch) { 755 pr_cont("not present\n"); 756 return 0; 757 /* Extract the architecture on CPUID scheme */ 758 } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) { 759 VFP_arch = vfpsid & FPSID_CPUID_ARCH_MASK; 760 VFP_arch >>= FPSID_ARCH_BIT; 761 /* 762 * Check for the presence of the Advanced SIMD 763 * load/store instructions, integer and single 764 * precision floating point operations. Only check 765 * for NEON if the hardware has the MVFR registers. 766 */ 767 if (IS_ENABLED(CONFIG_NEON) && 768 (fmrx(MVFR1) & 0x000fff00) == 0x00011100) 769 elf_hwcap |= HWCAP_NEON; 770 771 if (IS_ENABLED(CONFIG_VFPv3)) { 772 u32 mvfr0 = fmrx(MVFR0); 773 if (((mvfr0 & MVFR0_DP_MASK) >> MVFR0_DP_BIT) == 0x2 || 774 ((mvfr0 & MVFR0_SP_MASK) >> MVFR0_SP_BIT) == 0x2) { 775 elf_hwcap |= HWCAP_VFPv3; 776 /* 777 * Check for VFPv3 D16 and VFPv4 D16. CPUs in 778 * this configuration only have 16 x 64bit 779 * registers. 780 */ 781 if ((mvfr0 & MVFR0_A_SIMD_MASK) == 1) 782 /* also v4-D16 */ 783 elf_hwcap |= HWCAP_VFPv3D16; 784 else 785 elf_hwcap |= HWCAP_VFPD32; 786 } 787 788 if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000) 789 elf_hwcap |= HWCAP_VFPv4; 790 } 791 /* Extract the architecture version on pre-cpuid scheme */ 792 } else { 793 if (vfpsid & FPSID_NODOUBLE) { 794 pr_cont("no double precision support\n"); 795 return 0; 796 } 797 798 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; 799 } 800 801 cpuhp_setup_state_nocalls(CPUHP_AP_ARM_VFP_STARTING, 802 "arm/vfp:starting", vfp_starting_cpu, 803 vfp_dying_cpu); 804 805 vfp_vector = vfp_support_entry; 806 807 thread_register_notifier(&vfp_notifier_block); 808 vfp_pm_init(); 809 810 /* 811 * We detected VFP, and the support code is 812 * in place; report VFP support to userspace. 813 */ 814 elf_hwcap |= HWCAP_VFP; 815 816 pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n", 817 (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, 818 VFP_arch, 819 (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT, 820 (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, 821 (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); 822 823 return 0; 824 } 825 826 core_initcall(vfp_init); 827