xref: /openbmc/linux/arch/arm/vfp/vfpmodule.c (revision 483eb062)
1 /*
2  *  linux/arch/arm/vfp/vfpmodule.c
3  *
4  *  Copyright (C) 2004 ARM Limited.
5  *  Written by Deep Blue Solutions Limited.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 #include <linux/types.h>
12 #include <linux/cpu.h>
13 #include <linux/cpu_pm.h>
14 #include <linux/hardirq.h>
15 #include <linux/kernel.h>
16 #include <linux/notifier.h>
17 #include <linux/signal.h>
18 #include <linux/sched.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/uaccess.h>
22 #include <linux/user.h>
23 #include <linux/export.h>
24 
25 #include <asm/cp15.h>
26 #include <asm/cputype.h>
27 #include <asm/system_info.h>
28 #include <asm/thread_notify.h>
29 #include <asm/vfp.h>
30 
31 #include "vfpinstr.h"
32 #include "vfp.h"
33 
34 /*
35  * Our undef handlers (in entry.S)
36  */
37 void vfp_testing_entry(void);
38 void vfp_support_entry(void);
39 void vfp_null_entry(void);
40 
41 void (*vfp_vector)(void) = vfp_null_entry;
42 
43 /*
44  * Dual-use variable.
45  * Used in startup: set to non-zero if VFP checks fail
46  * After startup, holds VFP architecture
47  */
48 unsigned int VFP_arch;
49 
50 /*
51  * The pointer to the vfpstate structure of the thread which currently
52  * owns the context held in the VFP hardware, or NULL if the hardware
53  * context is invalid.
54  *
55  * For UP, this is sufficient to tell which thread owns the VFP context.
56  * However, for SMP, we also need to check the CPU number stored in the
57  * saved state too to catch migrations.
58  */
59 union vfp_state *vfp_current_hw_state[NR_CPUS];
60 
61 /*
62  * Is 'thread's most up to date state stored in this CPUs hardware?
63  * Must be called from non-preemptible context.
64  */
65 static bool vfp_state_in_hw(unsigned int cpu, struct thread_info *thread)
66 {
67 #ifdef CONFIG_SMP
68 	if (thread->vfpstate.hard.cpu != cpu)
69 		return false;
70 #endif
71 	return vfp_current_hw_state[cpu] == &thread->vfpstate;
72 }
73 
74 /*
75  * Force a reload of the VFP context from the thread structure.  We do
76  * this by ensuring that access to the VFP hardware is disabled, and
77  * clear vfp_current_hw_state.  Must be called from non-preemptible context.
78  */
79 static void vfp_force_reload(unsigned int cpu, struct thread_info *thread)
80 {
81 	if (vfp_state_in_hw(cpu, thread)) {
82 		fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
83 		vfp_current_hw_state[cpu] = NULL;
84 	}
85 #ifdef CONFIG_SMP
86 	thread->vfpstate.hard.cpu = NR_CPUS;
87 #endif
88 }
89 
90 /*
91  * Per-thread VFP initialization.
92  */
93 static void vfp_thread_flush(struct thread_info *thread)
94 {
95 	union vfp_state *vfp = &thread->vfpstate;
96 	unsigned int cpu;
97 
98 	/*
99 	 * Disable VFP to ensure we initialize it first.  We must ensure
100 	 * that the modification of vfp_current_hw_state[] and hardware
101 	 * disable are done for the same CPU and without preemption.
102 	 *
103 	 * Do this first to ensure that preemption won't overwrite our
104 	 * state saving should access to the VFP be enabled at this point.
105 	 */
106 	cpu = get_cpu();
107 	if (vfp_current_hw_state[cpu] == vfp)
108 		vfp_current_hw_state[cpu] = NULL;
109 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
110 	put_cpu();
111 
112 	memset(vfp, 0, sizeof(union vfp_state));
113 
114 	vfp->hard.fpexc = FPEXC_EN;
115 	vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
116 #ifdef CONFIG_SMP
117 	vfp->hard.cpu = NR_CPUS;
118 #endif
119 }
120 
121 static void vfp_thread_exit(struct thread_info *thread)
122 {
123 	/* release case: Per-thread VFP cleanup. */
124 	union vfp_state *vfp = &thread->vfpstate;
125 	unsigned int cpu = get_cpu();
126 
127 	if (vfp_current_hw_state[cpu] == vfp)
128 		vfp_current_hw_state[cpu] = NULL;
129 	put_cpu();
130 }
131 
132 static void vfp_thread_copy(struct thread_info *thread)
133 {
134 	struct thread_info *parent = current_thread_info();
135 
136 	vfp_sync_hwstate(parent);
137 	thread->vfpstate = parent->vfpstate;
138 #ifdef CONFIG_SMP
139 	thread->vfpstate.hard.cpu = NR_CPUS;
140 #endif
141 }
142 
143 /*
144  * When this function is called with the following 'cmd's, the following
145  * is true while this function is being run:
146  *  THREAD_NOFTIFY_SWTICH:
147  *   - the previously running thread will not be scheduled onto another CPU.
148  *   - the next thread to be run (v) will not be running on another CPU.
149  *   - thread->cpu is the local CPU number
150  *   - not preemptible as we're called in the middle of a thread switch
151  *  THREAD_NOTIFY_FLUSH:
152  *   - the thread (v) will be running on the local CPU, so
153  *	v === current_thread_info()
154  *   - thread->cpu is the local CPU number at the time it is accessed,
155  *	but may change at any time.
156  *   - we could be preempted if tree preempt rcu is enabled, so
157  *	it is unsafe to use thread->cpu.
158  *  THREAD_NOTIFY_EXIT
159  *   - the thread (v) will be running on the local CPU, so
160  *	v === current_thread_info()
161  *   - thread->cpu is the local CPU number at the time it is accessed,
162  *	but may change at any time.
163  *   - we could be preempted if tree preempt rcu is enabled, so
164  *	it is unsafe to use thread->cpu.
165  */
166 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
167 {
168 	struct thread_info *thread = v;
169 	u32 fpexc;
170 #ifdef CONFIG_SMP
171 	unsigned int cpu;
172 #endif
173 
174 	switch (cmd) {
175 	case THREAD_NOTIFY_SWITCH:
176 		fpexc = fmrx(FPEXC);
177 
178 #ifdef CONFIG_SMP
179 		cpu = thread->cpu;
180 
181 		/*
182 		 * On SMP, if VFP is enabled, save the old state in
183 		 * case the thread migrates to a different CPU. The
184 		 * restoring is done lazily.
185 		 */
186 		if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu])
187 			vfp_save_state(vfp_current_hw_state[cpu], fpexc);
188 #endif
189 
190 		/*
191 		 * Always disable VFP so we can lazily save/restore the
192 		 * old state.
193 		 */
194 		fmxr(FPEXC, fpexc & ~FPEXC_EN);
195 		break;
196 
197 	case THREAD_NOTIFY_FLUSH:
198 		vfp_thread_flush(thread);
199 		break;
200 
201 	case THREAD_NOTIFY_EXIT:
202 		vfp_thread_exit(thread);
203 		break;
204 
205 	case THREAD_NOTIFY_COPY:
206 		vfp_thread_copy(thread);
207 		break;
208 	}
209 
210 	return NOTIFY_DONE;
211 }
212 
213 static struct notifier_block vfp_notifier_block = {
214 	.notifier_call	= vfp_notifier,
215 };
216 
217 /*
218  * Raise a SIGFPE for the current process.
219  * sicode describes the signal being raised.
220  */
221 static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
222 {
223 	siginfo_t info;
224 
225 	memset(&info, 0, sizeof(info));
226 
227 	info.si_signo = SIGFPE;
228 	info.si_code = sicode;
229 	info.si_addr = (void __user *)(instruction_pointer(regs) - 4);
230 
231 	/*
232 	 * This is the same as NWFPE, because it's not clear what
233 	 * this is used for
234 	 */
235 	current->thread.error_code = 0;
236 	current->thread.trap_no = 6;
237 
238 	send_sig_info(SIGFPE, &info, current);
239 }
240 
241 static void vfp_panic(char *reason, u32 inst)
242 {
243 	int i;
244 
245 	pr_err("VFP: Error: %s\n", reason);
246 	pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
247 		fmrx(FPEXC), fmrx(FPSCR), inst);
248 	for (i = 0; i < 32; i += 2)
249 		pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
250 		       i, vfp_get_float(i), i+1, vfp_get_float(i+1));
251 }
252 
253 /*
254  * Process bitmask of exception conditions.
255  */
256 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
257 {
258 	int si_code = 0;
259 
260 	pr_debug("VFP: raising exceptions %08x\n", exceptions);
261 
262 	if (exceptions == VFP_EXCEPTION_ERROR) {
263 		vfp_panic("unhandled bounce", inst);
264 		vfp_raise_sigfpe(0, regs);
265 		return;
266 	}
267 
268 	/*
269 	 * If any of the status flags are set, update the FPSCR.
270 	 * Comparison instructions always return at least one of
271 	 * these flags set.
272 	 */
273 	if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
274 		fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
275 
276 	fpscr |= exceptions;
277 
278 	fmxr(FPSCR, fpscr);
279 
280 #define RAISE(stat,en,sig)				\
281 	if (exceptions & stat && fpscr & en)		\
282 		si_code = sig;
283 
284 	/*
285 	 * These are arranged in priority order, least to highest.
286 	 */
287 	RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV);
288 	RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
289 	RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
290 	RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
291 	RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
292 
293 	if (si_code)
294 		vfp_raise_sigfpe(si_code, regs);
295 }
296 
297 /*
298  * Emulate a VFP instruction.
299  */
300 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
301 {
302 	u32 exceptions = VFP_EXCEPTION_ERROR;
303 
304 	pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
305 
306 	if (INST_CPRTDO(inst)) {
307 		if (!INST_CPRT(inst)) {
308 			/*
309 			 * CPDO
310 			 */
311 			if (vfp_single(inst)) {
312 				exceptions = vfp_single_cpdo(inst, fpscr);
313 			} else {
314 				exceptions = vfp_double_cpdo(inst, fpscr);
315 			}
316 		} else {
317 			/*
318 			 * A CPRT instruction can not appear in FPINST2, nor
319 			 * can it cause an exception.  Therefore, we do not
320 			 * have to emulate it.
321 			 */
322 		}
323 	} else {
324 		/*
325 		 * A CPDT instruction can not appear in FPINST2, nor can
326 		 * it cause an exception.  Therefore, we do not have to
327 		 * emulate it.
328 		 */
329 	}
330 	return exceptions & ~VFP_NAN_FLAG;
331 }
332 
333 /*
334  * Package up a bounce condition.
335  */
336 void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
337 {
338 	u32 fpscr, orig_fpscr, fpsid, exceptions;
339 
340 	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
341 
342 	/*
343 	 * At this point, FPEXC can have the following configuration:
344 	 *
345 	 *  EX DEX IXE
346 	 *  0   1   x   - synchronous exception
347 	 *  1   x   0   - asynchronous exception
348 	 *  1   x   1   - sychronous on VFP subarch 1 and asynchronous on later
349 	 *  0   0   1   - synchronous on VFP9 (non-standard subarch 1
350 	 *                implementation), undefined otherwise
351 	 *
352 	 * Clear various bits and enable access to the VFP so we can
353 	 * handle the bounce.
354 	 */
355 	fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
356 
357 	fpsid = fmrx(FPSID);
358 	orig_fpscr = fpscr = fmrx(FPSCR);
359 
360 	/*
361 	 * Check for the special VFP subarch 1 and FPSCR.IXE bit case
362 	 */
363 	if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT)
364 	    && (fpscr & FPSCR_IXE)) {
365 		/*
366 		 * Synchronous exception, emulate the trigger instruction
367 		 */
368 		goto emulate;
369 	}
370 
371 	if (fpexc & FPEXC_EX) {
372 #ifndef CONFIG_CPU_FEROCEON
373 		/*
374 		 * Asynchronous exception. The instruction is read from FPINST
375 		 * and the interrupted instruction has to be restarted.
376 		 */
377 		trigger = fmrx(FPINST);
378 		regs->ARM_pc -= 4;
379 #endif
380 	} else if (!(fpexc & FPEXC_DEX)) {
381 		/*
382 		 * Illegal combination of bits. It can be caused by an
383 		 * unallocated VFP instruction but with FPSCR.IXE set and not
384 		 * on VFP subarch 1.
385 		 */
386 		 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
387 		goto exit;
388 	}
389 
390 	/*
391 	 * Modify fpscr to indicate the number of iterations remaining.
392 	 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
393 	 * whether FPEXC.VECITR or FPSCR.LEN is used.
394 	 */
395 	if (fpexc & (FPEXC_EX | FPEXC_VV)) {
396 		u32 len;
397 
398 		len = fpexc + (1 << FPEXC_LENGTH_BIT);
399 
400 		fpscr &= ~FPSCR_LENGTH_MASK;
401 		fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
402 	}
403 
404 	/*
405 	 * Handle the first FP instruction.  We used to take note of the
406 	 * FPEXC bounce reason, but this appears to be unreliable.
407 	 * Emulate the bounced instruction instead.
408 	 */
409 	exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
410 	if (exceptions)
411 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
412 
413 	/*
414 	 * If there isn't a second FP instruction, exit now. Note that
415 	 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
416 	 */
417 	if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))
418 		goto exit;
419 
420 	/*
421 	 * The barrier() here prevents fpinst2 being read
422 	 * before the condition above.
423 	 */
424 	barrier();
425 	trigger = fmrx(FPINST2);
426 
427  emulate:
428 	exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
429 	if (exceptions)
430 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
431  exit:
432 	preempt_enable();
433 }
434 
435 static void vfp_enable(void *unused)
436 {
437 	u32 access;
438 
439 	BUG_ON(preemptible());
440 	access = get_copro_access();
441 
442 	/*
443 	 * Enable full access to VFP (cp10 and cp11)
444 	 */
445 	set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
446 }
447 
448 #ifdef CONFIG_CPU_PM
449 static int vfp_pm_suspend(void)
450 {
451 	struct thread_info *ti = current_thread_info();
452 	u32 fpexc = fmrx(FPEXC);
453 
454 	/* if vfp is on, then save state for resumption */
455 	if (fpexc & FPEXC_EN) {
456 		pr_debug("%s: saving vfp state\n", __func__);
457 		vfp_save_state(&ti->vfpstate, fpexc);
458 
459 		/* disable, just in case */
460 		fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
461 	} else if (vfp_current_hw_state[ti->cpu]) {
462 #ifndef CONFIG_SMP
463 		fmxr(FPEXC, fpexc | FPEXC_EN);
464 		vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc);
465 		fmxr(FPEXC, fpexc);
466 #endif
467 	}
468 
469 	/* clear any information we had about last context state */
470 	vfp_current_hw_state[ti->cpu] = NULL;
471 
472 	return 0;
473 }
474 
475 static void vfp_pm_resume(void)
476 {
477 	/* ensure we have access to the vfp */
478 	vfp_enable(NULL);
479 
480 	/* and disable it to ensure the next usage restores the state */
481 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
482 }
483 
484 static int vfp_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd,
485 	void *v)
486 {
487 	switch (cmd) {
488 	case CPU_PM_ENTER:
489 		vfp_pm_suspend();
490 		break;
491 	case CPU_PM_ENTER_FAILED:
492 	case CPU_PM_EXIT:
493 		vfp_pm_resume();
494 		break;
495 	}
496 	return NOTIFY_OK;
497 }
498 
499 static struct notifier_block vfp_cpu_pm_notifier_block = {
500 	.notifier_call = vfp_cpu_pm_notifier,
501 };
502 
503 static void vfp_pm_init(void)
504 {
505 	cpu_pm_register_notifier(&vfp_cpu_pm_notifier_block);
506 }
507 
508 #else
509 static inline void vfp_pm_init(void) { }
510 #endif /* CONFIG_CPU_PM */
511 
512 /*
513  * Ensure that the VFP state stored in 'thread->vfpstate' is up to date
514  * with the hardware state.
515  */
516 void vfp_sync_hwstate(struct thread_info *thread)
517 {
518 	unsigned int cpu = get_cpu();
519 
520 	if (vfp_state_in_hw(cpu, thread)) {
521 		u32 fpexc = fmrx(FPEXC);
522 
523 		/*
524 		 * Save the last VFP state on this CPU.
525 		 */
526 		fmxr(FPEXC, fpexc | FPEXC_EN);
527 		vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN);
528 		fmxr(FPEXC, fpexc);
529 	}
530 
531 	put_cpu();
532 }
533 
534 /* Ensure that the thread reloads the hardware VFP state on the next use. */
535 void vfp_flush_hwstate(struct thread_info *thread)
536 {
537 	unsigned int cpu = get_cpu();
538 
539 	vfp_force_reload(cpu, thread);
540 
541 	put_cpu();
542 }
543 
544 /*
545  * Save the current VFP state into the provided structures and prepare
546  * for entry into a new function (signal handler).
547  */
548 int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
549 				    struct user_vfp_exc __user *ufp_exc)
550 {
551 	struct thread_info *thread = current_thread_info();
552 	struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
553 	int err = 0;
554 
555 	/* Ensure that the saved hwstate is up-to-date. */
556 	vfp_sync_hwstate(thread);
557 
558 	/*
559 	 * Copy the floating point registers. There can be unused
560 	 * registers see asm/hwcap.h for details.
561 	 */
562 	err |= __copy_to_user(&ufp->fpregs, &hwstate->fpregs,
563 			      sizeof(hwstate->fpregs));
564 	/*
565 	 * Copy the status and control register.
566 	 */
567 	__put_user_error(hwstate->fpscr, &ufp->fpscr, err);
568 
569 	/*
570 	 * Copy the exception registers.
571 	 */
572 	__put_user_error(hwstate->fpexc, &ufp_exc->fpexc, err);
573 	__put_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
574 	__put_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
575 
576 	if (err)
577 		return -EFAULT;
578 
579 	/* Ensure that VFP is disabled. */
580 	vfp_flush_hwstate(thread);
581 
582 	/*
583 	 * As per the PCS, clear the length and stride bits for function
584 	 * entry.
585 	 */
586 	hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
587 	return 0;
588 }
589 
590 /* Sanitise and restore the current VFP state from the provided structures. */
591 int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
592 			     struct user_vfp_exc __user *ufp_exc)
593 {
594 	struct thread_info *thread = current_thread_info();
595 	struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
596 	unsigned long fpexc;
597 	int err = 0;
598 
599 	/* Disable VFP to avoid corrupting the new thread state. */
600 	vfp_flush_hwstate(thread);
601 
602 	/*
603 	 * Copy the floating point registers. There can be unused
604 	 * registers see asm/hwcap.h for details.
605 	 */
606 	err |= __copy_from_user(&hwstate->fpregs, &ufp->fpregs,
607 				sizeof(hwstate->fpregs));
608 	/*
609 	 * Copy the status and control register.
610 	 */
611 	__get_user_error(hwstate->fpscr, &ufp->fpscr, err);
612 
613 	/*
614 	 * Sanitise and restore the exception registers.
615 	 */
616 	__get_user_error(fpexc, &ufp_exc->fpexc, err);
617 
618 	/* Ensure the VFP is enabled. */
619 	fpexc |= FPEXC_EN;
620 
621 	/* Ensure FPINST2 is invalid and the exception flag is cleared. */
622 	fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
623 	hwstate->fpexc = fpexc;
624 
625 	__get_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
626 	__get_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
627 
628 	return err ? -EFAULT : 0;
629 }
630 
631 /*
632  * VFP hardware can lose all context when a CPU goes offline.
633  * As we will be running in SMP mode with CPU hotplug, we will save the
634  * hardware state at every thread switch.  We clear our held state when
635  * a CPU has been killed, indicating that the VFP hardware doesn't contain
636  * a threads VFP state.  When a CPU starts up, we re-enable access to the
637  * VFP hardware.
638  *
639  * Both CPU_DYING and CPU_STARTING are called on the CPU which
640  * is being offlined/onlined.
641  */
642 static int vfp_hotplug(struct notifier_block *b, unsigned long action,
643 	void *hcpu)
644 {
645 	if (action == CPU_DYING || action == CPU_DYING_FROZEN)
646 		vfp_current_hw_state[(long)hcpu] = NULL;
647 	else if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
648 		vfp_enable(NULL);
649 	return NOTIFY_OK;
650 }
651 
652 void vfp_kmode_exception(void)
653 {
654 	/*
655 	 * If we reach this point, a floating point exception has been raised
656 	 * while running in kernel mode. If the NEON/VFP unit was enabled at the
657 	 * time, it means a VFP instruction has been issued that requires
658 	 * software assistance to complete, something which is not currently
659 	 * supported in kernel mode.
660 	 * If the NEON/VFP unit was disabled, and the location pointed to below
661 	 * is properly preceded by a call to kernel_neon_begin(), something has
662 	 * caused the task to be scheduled out and back in again. In this case,
663 	 * rebuilding and running with CONFIG_DEBUG_ATOMIC_SLEEP enabled should
664 	 * be helpful in localizing the problem.
665 	 */
666 	if (fmrx(FPEXC) & FPEXC_EN)
667 		pr_crit("BUG: unsupported FP instruction in kernel mode\n");
668 	else
669 		pr_crit("BUG: FP instruction issued in kernel mode with FP unit disabled\n");
670 }
671 
672 #ifdef CONFIG_KERNEL_MODE_NEON
673 
674 /*
675  * Kernel-side NEON support functions
676  */
677 void kernel_neon_begin(void)
678 {
679 	struct thread_info *thread = current_thread_info();
680 	unsigned int cpu;
681 	u32 fpexc;
682 
683 	/*
684 	 * Kernel mode NEON is only allowed outside of interrupt context
685 	 * with preemption disabled. This will make sure that the kernel
686 	 * mode NEON register contents never need to be preserved.
687 	 */
688 	BUG_ON(in_interrupt());
689 	cpu = get_cpu();
690 
691 	fpexc = fmrx(FPEXC) | FPEXC_EN;
692 	fmxr(FPEXC, fpexc);
693 
694 	/*
695 	 * Save the userland NEON/VFP state. Under UP,
696 	 * the owner could be a task other than 'current'
697 	 */
698 	if (vfp_state_in_hw(cpu, thread))
699 		vfp_save_state(&thread->vfpstate, fpexc);
700 #ifndef CONFIG_SMP
701 	else if (vfp_current_hw_state[cpu] != NULL)
702 		vfp_save_state(vfp_current_hw_state[cpu], fpexc);
703 #endif
704 	vfp_current_hw_state[cpu] = NULL;
705 }
706 EXPORT_SYMBOL(kernel_neon_begin);
707 
708 void kernel_neon_end(void)
709 {
710 	/* Disable the NEON/VFP unit. */
711 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
712 	put_cpu();
713 }
714 EXPORT_SYMBOL(kernel_neon_end);
715 
716 #endif /* CONFIG_KERNEL_MODE_NEON */
717 
718 /*
719  * VFP support code initialisation.
720  */
721 static int __init vfp_init(void)
722 {
723 	unsigned int vfpsid;
724 	unsigned int cpu_arch = cpu_architecture();
725 
726 	if (cpu_arch >= CPU_ARCH_ARMv6)
727 		on_each_cpu(vfp_enable, NULL, 1);
728 
729 	/*
730 	 * First check that there is a VFP that we can use.
731 	 * The handler is already setup to just log calls, so
732 	 * we just need to read the VFPSID register.
733 	 */
734 	vfp_vector = vfp_testing_entry;
735 	barrier();
736 	vfpsid = fmrx(FPSID);
737 	barrier();
738 	vfp_vector = vfp_null_entry;
739 
740 	pr_info("VFP support v0.3: ");
741 	if (VFP_arch)
742 		pr_cont("not present\n");
743 	else if (vfpsid & FPSID_NODOUBLE) {
744 		pr_cont("no double precision support\n");
745 	} else {
746 		hotcpu_notifier(vfp_hotplug, 0);
747 
748 		VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT;  /* Extract the architecture version */
749 		pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n",
750 			(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
751 			(vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT,
752 			(vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
753 			(vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
754 			(vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
755 
756 		vfp_vector = vfp_support_entry;
757 
758 		thread_register_notifier(&vfp_notifier_block);
759 		vfp_pm_init();
760 
761 		/*
762 		 * We detected VFP, and the support code is
763 		 * in place; report VFP support to userspace.
764 		 */
765 		elf_hwcap |= HWCAP_VFP;
766 #ifdef CONFIG_VFPv3
767 		if (VFP_arch >= 2) {
768 			elf_hwcap |= HWCAP_VFPv3;
769 
770 			/*
771 			 * Check for VFPv3 D16 and VFPv4 D16.  CPUs in
772 			 * this configuration only have 16 x 64bit
773 			 * registers.
774 			 */
775 			if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
776 				elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
777 			else
778 				elf_hwcap |= HWCAP_VFPD32;
779 		}
780 #endif
781 		/*
782 		 * Check for the presence of the Advanced SIMD
783 		 * load/store instructions, integer and single
784 		 * precision floating point operations. Only check
785 		 * for NEON if the hardware has the MVFR registers.
786 		 */
787 		if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
788 #ifdef CONFIG_NEON
789 			if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
790 				elf_hwcap |= HWCAP_NEON;
791 #endif
792 #ifdef CONFIG_VFPv3
793 			if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
794 				elf_hwcap |= HWCAP_VFPv4;
795 #endif
796 		}
797 	}
798 	return 0;
799 }
800 
801 core_initcall(vfp_init);
802