1 /* 2 * arch/arm/plat-orion/irq.c 3 * 4 * Marvell Orion SoC IRQ handling. 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/init.h> 13 #include <linux/irq.h> 14 #include <linux/irqdomain.h> 15 #include <linux/io.h> 16 #include <linux/of_address.h> 17 #include <linux/of_irq.h> 18 #include <plat/irq.h> 19 #include <plat/orion-gpio.h> 20 21 void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) 22 { 23 struct irq_chip_generic *gc; 24 struct irq_chip_type *ct; 25 26 /* 27 * Mask all interrupts initially. 28 */ 29 writel(0, maskaddr); 30 31 gc = irq_alloc_generic_chip("orion_irq", 1, irq_start, maskaddr, 32 handle_level_irq); 33 ct = gc->chip_types; 34 ct->chip.irq_mask = irq_gc_mask_clr_bit; 35 ct->chip.irq_unmask = irq_gc_mask_set_bit; 36 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE, 37 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); 38 } 39 40 #ifdef CONFIG_OF 41 static int __init orion_add_irq_domain(struct device_node *np, 42 struct device_node *interrupt_parent) 43 { 44 int i = 0; 45 void __iomem *base; 46 47 do { 48 base = of_iomap(np, i); 49 if (base) { 50 orion_irq_init(i * 32, base + 0x04); 51 i++; 52 } 53 } while (base); 54 55 irq_domain_add_legacy(np, i * 32, 0, 0, 56 &irq_domain_simple_ops, NULL); 57 return 0; 58 } 59 60 static const struct of_device_id orion_irq_match[] = { 61 { .compatible = "marvell,orion-intc", 62 .data = orion_add_irq_domain, }, 63 {}, 64 }; 65 66 void __init orion_dt_init_irq(void) 67 { 68 of_irq_init(orion_irq_match); 69 } 70 #endif 71