1 /* 2 * arch/arm/plat-orion/common.c 3 * 4 * Marvell Orion SoC common setup code used by multiple mach-/common.c 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/init.h> 13 #include <linux/platform_device.h> 14 #include <linux/dma-mapping.h> 15 #include <linux/serial_8250.h> 16 #include <linux/ata_platform.h> 17 #include <linux/clk.h> 18 #include <linux/clkdev.h> 19 #include <linux/mv643xx_eth.h> 20 #include <linux/mv643xx_i2c.h> 21 #include <net/dsa.h> 22 #include <linux/platform_data/dma-mv_xor.h> 23 #include <linux/platform_data/usb-ehci-orion.h> 24 #include <mach/bridge-regs.h> 25 26 /* Create a clkdev entry for a given device/clk */ 27 void __init orion_clkdev_add(const char *con_id, const char *dev_id, 28 struct clk *clk) 29 { 30 struct clk_lookup *cl; 31 32 cl = clkdev_alloc(clk, con_id, dev_id); 33 if (cl) 34 clkdev_add(cl); 35 } 36 37 /* Create clkdev entries for all orion platforms except kirkwood. 38 Kirkwood has gated clocks for some of its peripherals, so creates 39 its own clkdev entries. For all the other orion devices, create 40 clkdev entries to the tclk. */ 41 void __init orion_clkdev_init(struct clk *tclk) 42 { 43 orion_clkdev_add(NULL, "orion_spi.0", tclk); 44 orion_clkdev_add(NULL, "orion_spi.1", tclk); 45 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); 46 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); 47 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); 48 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); 49 orion_clkdev_add(NULL, "orion_wdt", tclk); 50 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); 51 } 52 53 /* Fill in the resources structure and link it into the platform 54 device structure. There is always a memory region, and nearly 55 always an interrupt.*/ 56 static void fill_resources(struct platform_device *device, 57 struct resource *resources, 58 resource_size_t mapbase, 59 resource_size_t size, 60 unsigned int irq) 61 { 62 device->resource = resources; 63 device->num_resources = 1; 64 resources[0].flags = IORESOURCE_MEM; 65 resources[0].start = mapbase; 66 resources[0].end = mapbase + size; 67 68 if (irq != NO_IRQ) { 69 device->num_resources++; 70 resources[1].flags = IORESOURCE_IRQ; 71 resources[1].start = irq; 72 resources[1].end = irq; 73 } 74 } 75 76 /***************************************************************************** 77 * UART 78 ****************************************************************************/ 79 static unsigned long __init uart_get_clk_rate(struct clk *clk) 80 { 81 clk_prepare_enable(clk); 82 return clk_get_rate(clk); 83 } 84 85 static void __init uart_complete( 86 struct platform_device *orion_uart, 87 struct plat_serial8250_port *data, 88 struct resource *resources, 89 void __iomem *membase, 90 resource_size_t mapbase, 91 unsigned int irq, 92 struct clk *clk) 93 { 94 data->mapbase = mapbase; 95 data->membase = membase; 96 data->irq = irq; 97 data->uartclk = uart_get_clk_rate(clk); 98 orion_uart->dev.platform_data = data; 99 100 fill_resources(orion_uart, resources, mapbase, 0xff, irq); 101 platform_device_register(orion_uart); 102 } 103 104 /***************************************************************************** 105 * UART0 106 ****************************************************************************/ 107 static struct plat_serial8250_port orion_uart0_data[] = { 108 { 109 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 110 .iotype = UPIO_MEM, 111 .regshift = 2, 112 }, { 113 }, 114 }; 115 116 static struct resource orion_uart0_resources[2]; 117 118 static struct platform_device orion_uart0 = { 119 .name = "serial8250", 120 .id = PLAT8250_DEV_PLATFORM, 121 }; 122 123 void __init orion_uart0_init(void __iomem *membase, 124 resource_size_t mapbase, 125 unsigned int irq, 126 struct clk *clk) 127 { 128 uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, 129 membase, mapbase, irq, clk); 130 } 131 132 /***************************************************************************** 133 * UART1 134 ****************************************************************************/ 135 static struct plat_serial8250_port orion_uart1_data[] = { 136 { 137 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 138 .iotype = UPIO_MEM, 139 .regshift = 2, 140 }, { 141 }, 142 }; 143 144 static struct resource orion_uart1_resources[2]; 145 146 static struct platform_device orion_uart1 = { 147 .name = "serial8250", 148 .id = PLAT8250_DEV_PLATFORM1, 149 }; 150 151 void __init orion_uart1_init(void __iomem *membase, 152 resource_size_t mapbase, 153 unsigned int irq, 154 struct clk *clk) 155 { 156 uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, 157 membase, mapbase, irq, clk); 158 } 159 160 /***************************************************************************** 161 * UART2 162 ****************************************************************************/ 163 static struct plat_serial8250_port orion_uart2_data[] = { 164 { 165 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 166 .iotype = UPIO_MEM, 167 .regshift = 2, 168 }, { 169 }, 170 }; 171 172 static struct resource orion_uart2_resources[2]; 173 174 static struct platform_device orion_uart2 = { 175 .name = "serial8250", 176 .id = PLAT8250_DEV_PLATFORM2, 177 }; 178 179 void __init orion_uart2_init(void __iomem *membase, 180 resource_size_t mapbase, 181 unsigned int irq, 182 struct clk *clk) 183 { 184 uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, 185 membase, mapbase, irq, clk); 186 } 187 188 /***************************************************************************** 189 * UART3 190 ****************************************************************************/ 191 static struct plat_serial8250_port orion_uart3_data[] = { 192 { 193 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 194 .iotype = UPIO_MEM, 195 .regshift = 2, 196 }, { 197 }, 198 }; 199 200 static struct resource orion_uart3_resources[2]; 201 202 static struct platform_device orion_uart3 = { 203 .name = "serial8250", 204 .id = 3, 205 }; 206 207 void __init orion_uart3_init(void __iomem *membase, 208 resource_size_t mapbase, 209 unsigned int irq, 210 struct clk *clk) 211 { 212 uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, 213 membase, mapbase, irq, clk); 214 } 215 216 /***************************************************************************** 217 * SoC RTC 218 ****************************************************************************/ 219 static struct resource orion_rtc_resource[2]; 220 221 void __init orion_rtc_init(unsigned long mapbase, 222 unsigned long irq) 223 { 224 orion_rtc_resource[0].start = mapbase; 225 orion_rtc_resource[0].end = mapbase + SZ_32 - 1; 226 orion_rtc_resource[0].flags = IORESOURCE_MEM; 227 orion_rtc_resource[1].start = irq; 228 orion_rtc_resource[1].end = irq; 229 orion_rtc_resource[1].flags = IORESOURCE_IRQ; 230 231 platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); 232 } 233 234 /***************************************************************************** 235 * GE 236 ****************************************************************************/ 237 static __init void ge_complete( 238 struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, 239 struct resource *orion_ge_resource, unsigned long irq, 240 struct platform_device *orion_ge_shared, 241 struct mv643xx_eth_platform_data *eth_data, 242 struct platform_device *orion_ge) 243 { 244 orion_ge_resource->start = irq; 245 orion_ge_resource->end = irq; 246 eth_data->shared = orion_ge_shared; 247 orion_ge->dev.platform_data = eth_data; 248 249 platform_device_register(orion_ge_shared); 250 platform_device_register(orion_ge); 251 } 252 253 /***************************************************************************** 254 * GE00 255 ****************************************************************************/ 256 struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; 257 258 static struct resource orion_ge00_shared_resources[] = { 259 { 260 .name = "ge00 base", 261 }, { 262 .name = "ge00 err irq", 263 }, 264 }; 265 266 static struct platform_device orion_ge00_shared = { 267 .name = MV643XX_ETH_SHARED_NAME, 268 .id = 0, 269 .dev = { 270 .platform_data = &orion_ge00_shared_data, 271 }, 272 }; 273 274 static struct resource orion_ge00_resources[] = { 275 { 276 .name = "ge00 irq", 277 .flags = IORESOURCE_IRQ, 278 }, 279 }; 280 281 static struct platform_device orion_ge00 = { 282 .name = MV643XX_ETH_NAME, 283 .id = 0, 284 .num_resources = 1, 285 .resource = orion_ge00_resources, 286 .dev = { 287 .coherent_dma_mask = DMA_BIT_MASK(32), 288 }, 289 }; 290 291 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, 292 unsigned long mapbase, 293 unsigned long irq, 294 unsigned long irq_err, 295 unsigned int tx_csum_limit) 296 { 297 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, 298 mapbase + 0x2000, SZ_16K - 1, irq_err); 299 orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; 300 ge_complete(&orion_ge00_shared_data, 301 orion_ge00_resources, irq, &orion_ge00_shared, 302 eth_data, &orion_ge00); 303 } 304 305 /***************************************************************************** 306 * GE01 307 ****************************************************************************/ 308 struct mv643xx_eth_shared_platform_data orion_ge01_shared_data = { 309 .shared_smi = &orion_ge00_shared, 310 }; 311 312 static struct resource orion_ge01_shared_resources[] = { 313 { 314 .name = "ge01 base", 315 }, { 316 .name = "ge01 err irq", 317 }, 318 }; 319 320 static struct platform_device orion_ge01_shared = { 321 .name = MV643XX_ETH_SHARED_NAME, 322 .id = 1, 323 .dev = { 324 .platform_data = &orion_ge01_shared_data, 325 }, 326 }; 327 328 static struct resource orion_ge01_resources[] = { 329 { 330 .name = "ge01 irq", 331 .flags = IORESOURCE_IRQ, 332 }, 333 }; 334 335 static struct platform_device orion_ge01 = { 336 .name = MV643XX_ETH_NAME, 337 .id = 1, 338 .num_resources = 1, 339 .resource = orion_ge01_resources, 340 .dev = { 341 .coherent_dma_mask = DMA_BIT_MASK(32), 342 }, 343 }; 344 345 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, 346 unsigned long mapbase, 347 unsigned long irq, 348 unsigned long irq_err, 349 unsigned int tx_csum_limit) 350 { 351 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, 352 mapbase + 0x2000, SZ_16K - 1, irq_err); 353 orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; 354 ge_complete(&orion_ge01_shared_data, 355 orion_ge01_resources, irq, &orion_ge01_shared, 356 eth_data, &orion_ge01); 357 } 358 359 /***************************************************************************** 360 * GE10 361 ****************************************************************************/ 362 struct mv643xx_eth_shared_platform_data orion_ge10_shared_data = { 363 .shared_smi = &orion_ge00_shared, 364 }; 365 366 static struct resource orion_ge10_shared_resources[] = { 367 { 368 .name = "ge10 base", 369 }, { 370 .name = "ge10 err irq", 371 }, 372 }; 373 374 static struct platform_device orion_ge10_shared = { 375 .name = MV643XX_ETH_SHARED_NAME, 376 .id = 1, 377 .dev = { 378 .platform_data = &orion_ge10_shared_data, 379 }, 380 }; 381 382 static struct resource orion_ge10_resources[] = { 383 { 384 .name = "ge10 irq", 385 .flags = IORESOURCE_IRQ, 386 }, 387 }; 388 389 static struct platform_device orion_ge10 = { 390 .name = MV643XX_ETH_NAME, 391 .id = 1, 392 .num_resources = 2, 393 .resource = orion_ge10_resources, 394 .dev = { 395 .coherent_dma_mask = DMA_BIT_MASK(32), 396 }, 397 }; 398 399 void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, 400 unsigned long mapbase, 401 unsigned long irq, 402 unsigned long irq_err) 403 { 404 fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, 405 mapbase + 0x2000, SZ_16K - 1, irq_err); 406 ge_complete(&orion_ge10_shared_data, 407 orion_ge10_resources, irq, &orion_ge10_shared, 408 eth_data, &orion_ge10); 409 } 410 411 /***************************************************************************** 412 * GE11 413 ****************************************************************************/ 414 struct mv643xx_eth_shared_platform_data orion_ge11_shared_data = { 415 .shared_smi = &orion_ge00_shared, 416 }; 417 418 static struct resource orion_ge11_shared_resources[] = { 419 { 420 .name = "ge11 base", 421 }, { 422 .name = "ge11 err irq", 423 }, 424 }; 425 426 static struct platform_device orion_ge11_shared = { 427 .name = MV643XX_ETH_SHARED_NAME, 428 .id = 1, 429 .dev = { 430 .platform_data = &orion_ge11_shared_data, 431 }, 432 }; 433 434 static struct resource orion_ge11_resources[] = { 435 { 436 .name = "ge11 irq", 437 .flags = IORESOURCE_IRQ, 438 }, 439 }; 440 441 static struct platform_device orion_ge11 = { 442 .name = MV643XX_ETH_NAME, 443 .id = 1, 444 .num_resources = 2, 445 .resource = orion_ge11_resources, 446 .dev = { 447 .coherent_dma_mask = DMA_BIT_MASK(32), 448 }, 449 }; 450 451 void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, 452 unsigned long mapbase, 453 unsigned long irq, 454 unsigned long irq_err) 455 { 456 fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, 457 mapbase + 0x2000, SZ_16K - 1, irq_err); 458 ge_complete(&orion_ge11_shared_data, 459 orion_ge11_resources, irq, &orion_ge11_shared, 460 eth_data, &orion_ge11); 461 } 462 463 /***************************************************************************** 464 * Ethernet switch 465 ****************************************************************************/ 466 static struct resource orion_switch_resources[] = { 467 { 468 .start = 0, 469 .end = 0, 470 .flags = IORESOURCE_IRQ, 471 }, 472 }; 473 474 static struct platform_device orion_switch_device = { 475 .name = "dsa", 476 .id = 0, 477 .num_resources = 0, 478 .resource = orion_switch_resources, 479 }; 480 481 void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) 482 { 483 int i; 484 485 if (irq != NO_IRQ) { 486 orion_switch_resources[0].start = irq; 487 orion_switch_resources[0].end = irq; 488 orion_switch_device.num_resources = 1; 489 } 490 491 d->netdev = &orion_ge00.dev; 492 for (i = 0; i < d->nr_chips; i++) 493 d->chip[i].mii_bus = &orion_ge00_shared.dev; 494 orion_switch_device.dev.platform_data = d; 495 496 platform_device_register(&orion_switch_device); 497 } 498 499 /***************************************************************************** 500 * I2C 501 ****************************************************************************/ 502 static struct mv64xxx_i2c_pdata orion_i2c_pdata = { 503 .freq_n = 3, 504 .timeout = 1000, /* Default timeout of 1 second */ 505 }; 506 507 static struct resource orion_i2c_resources[2]; 508 509 static struct platform_device orion_i2c = { 510 .name = MV64XXX_I2C_CTLR_NAME, 511 .id = 0, 512 .dev = { 513 .platform_data = &orion_i2c_pdata, 514 }, 515 }; 516 517 static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { 518 .freq_n = 3, 519 .timeout = 1000, /* Default timeout of 1 second */ 520 }; 521 522 static struct resource orion_i2c_1_resources[2]; 523 524 static struct platform_device orion_i2c_1 = { 525 .name = MV64XXX_I2C_CTLR_NAME, 526 .id = 1, 527 .dev = { 528 .platform_data = &orion_i2c_1_pdata, 529 }, 530 }; 531 532 void __init orion_i2c_init(unsigned long mapbase, 533 unsigned long irq, 534 unsigned long freq_m) 535 { 536 orion_i2c_pdata.freq_m = freq_m; 537 fill_resources(&orion_i2c, orion_i2c_resources, mapbase, 538 SZ_32 - 1, irq); 539 platform_device_register(&orion_i2c); 540 } 541 542 void __init orion_i2c_1_init(unsigned long mapbase, 543 unsigned long irq, 544 unsigned long freq_m) 545 { 546 orion_i2c_1_pdata.freq_m = freq_m; 547 fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase, 548 SZ_32 - 1, irq); 549 platform_device_register(&orion_i2c_1); 550 } 551 552 /***************************************************************************** 553 * SPI 554 ****************************************************************************/ 555 static struct resource orion_spi_resources; 556 557 static struct platform_device orion_spi = { 558 .name = "orion_spi", 559 .id = 0, 560 }; 561 562 static struct resource orion_spi_1_resources; 563 564 static struct platform_device orion_spi_1 = { 565 .name = "orion_spi", 566 .id = 1, 567 }; 568 569 /* Note: The SPI silicon core does have interrupts. However the 570 * current Linux software driver does not use interrupts. */ 571 572 void __init orion_spi_init(unsigned long mapbase) 573 { 574 fill_resources(&orion_spi, &orion_spi_resources, 575 mapbase, SZ_512 - 1, NO_IRQ); 576 platform_device_register(&orion_spi); 577 } 578 579 void __init orion_spi_1_init(unsigned long mapbase) 580 { 581 fill_resources(&orion_spi_1, &orion_spi_1_resources, 582 mapbase, SZ_512 - 1, NO_IRQ); 583 platform_device_register(&orion_spi_1); 584 } 585 586 /***************************************************************************** 587 * Watchdog 588 ****************************************************************************/ 589 static struct resource orion_wdt_resource = 590 DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28); 591 592 static struct platform_device orion_wdt_device = { 593 .name = "orion_wdt", 594 .id = -1, 595 .num_resources = 1, 596 .resource = &orion_wdt_resource, 597 }; 598 599 void __init orion_wdt_init(void) 600 { 601 platform_device_register(&orion_wdt_device); 602 } 603 604 /***************************************************************************** 605 * XOR 606 ****************************************************************************/ 607 static u64 orion_xor_dmamask = DMA_BIT_MASK(32); 608 609 /***************************************************************************** 610 * XOR0 611 ****************************************************************************/ 612 static struct resource orion_xor0_shared_resources[] = { 613 { 614 .name = "xor 0 low", 615 .flags = IORESOURCE_MEM, 616 }, { 617 .name = "xor 0 high", 618 .flags = IORESOURCE_MEM, 619 }, { 620 .name = "irq channel 0", 621 .flags = IORESOURCE_IRQ, 622 }, { 623 .name = "irq channel 1", 624 .flags = IORESOURCE_IRQ, 625 }, 626 }; 627 628 static struct mv_xor_channel_data orion_xor0_channels_data[2]; 629 630 static struct mv_xor_platform_data orion_xor0_pdata = { 631 .channels = orion_xor0_channels_data, 632 }; 633 634 static struct platform_device orion_xor0_shared = { 635 .name = MV_XOR_NAME, 636 .id = 0, 637 .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), 638 .resource = orion_xor0_shared_resources, 639 .dev = { 640 .dma_mask = &orion_xor_dmamask, 641 .coherent_dma_mask = DMA_BIT_MASK(64), 642 .platform_data = &orion_xor0_pdata, 643 }, 644 }; 645 646 void __init orion_xor0_init(unsigned long mapbase_low, 647 unsigned long mapbase_high, 648 unsigned long irq_0, 649 unsigned long irq_1) 650 { 651 orion_xor0_shared_resources[0].start = mapbase_low; 652 orion_xor0_shared_resources[0].end = mapbase_low + 0xff; 653 orion_xor0_shared_resources[1].start = mapbase_high; 654 orion_xor0_shared_resources[1].end = mapbase_high + 0xff; 655 656 orion_xor0_shared_resources[2].start = irq_0; 657 orion_xor0_shared_resources[2].end = irq_0; 658 orion_xor0_shared_resources[3].start = irq_1; 659 orion_xor0_shared_resources[3].end = irq_1; 660 661 /* 662 * two engines can't do memset simultaneously, this limitation 663 * satisfied by removing memset support from one of the engines. 664 */ 665 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); 666 dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); 667 668 dma_cap_set(DMA_MEMSET, orion_xor0_channels_data[1].cap_mask); 669 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); 670 dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); 671 672 platform_device_register(&orion_xor0_shared); 673 } 674 675 /***************************************************************************** 676 * XOR1 677 ****************************************************************************/ 678 static struct resource orion_xor1_shared_resources[] = { 679 { 680 .name = "xor 1 low", 681 .flags = IORESOURCE_MEM, 682 }, { 683 .name = "xor 1 high", 684 .flags = IORESOURCE_MEM, 685 }, { 686 .name = "irq channel 0", 687 .flags = IORESOURCE_IRQ, 688 }, { 689 .name = "irq channel 1", 690 .flags = IORESOURCE_IRQ, 691 }, 692 }; 693 694 static struct mv_xor_channel_data orion_xor1_channels_data[2]; 695 696 static struct mv_xor_platform_data orion_xor1_pdata = { 697 .channels = orion_xor1_channels_data, 698 }; 699 700 static struct platform_device orion_xor1_shared = { 701 .name = MV_XOR_NAME, 702 .id = 1, 703 .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), 704 .resource = orion_xor1_shared_resources, 705 .dev = { 706 .dma_mask = &orion_xor_dmamask, 707 .coherent_dma_mask = DMA_BIT_MASK(64), 708 .platform_data = &orion_xor1_pdata, 709 }, 710 }; 711 712 void __init orion_xor1_init(unsigned long mapbase_low, 713 unsigned long mapbase_high, 714 unsigned long irq_0, 715 unsigned long irq_1) 716 { 717 orion_xor1_shared_resources[0].start = mapbase_low; 718 orion_xor1_shared_resources[0].end = mapbase_low + 0xff; 719 orion_xor1_shared_resources[1].start = mapbase_high; 720 orion_xor1_shared_resources[1].end = mapbase_high + 0xff; 721 722 orion_xor1_shared_resources[2].start = irq_0; 723 orion_xor1_shared_resources[2].end = irq_0; 724 orion_xor1_shared_resources[3].start = irq_1; 725 orion_xor1_shared_resources[3].end = irq_1; 726 727 /* 728 * two engines can't do memset simultaneously, this limitation 729 * satisfied by removing memset support from one of the engines. 730 */ 731 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); 732 dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); 733 734 dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask); 735 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); 736 dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); 737 738 platform_device_register(&orion_xor1_shared); 739 } 740 741 /***************************************************************************** 742 * EHCI 743 ****************************************************************************/ 744 static struct orion_ehci_data orion_ehci_data; 745 static u64 ehci_dmamask = DMA_BIT_MASK(32); 746 747 748 /***************************************************************************** 749 * EHCI0 750 ****************************************************************************/ 751 static struct resource orion_ehci_resources[2]; 752 753 static struct platform_device orion_ehci = { 754 .name = "orion-ehci", 755 .id = 0, 756 .dev = { 757 .dma_mask = &ehci_dmamask, 758 .coherent_dma_mask = DMA_BIT_MASK(32), 759 .platform_data = &orion_ehci_data, 760 }, 761 }; 762 763 void __init orion_ehci_init(unsigned long mapbase, 764 unsigned long irq, 765 enum orion_ehci_phy_ver phy_version) 766 { 767 orion_ehci_data.phy_version = phy_version; 768 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, 769 irq); 770 771 platform_device_register(&orion_ehci); 772 } 773 774 /***************************************************************************** 775 * EHCI1 776 ****************************************************************************/ 777 static struct resource orion_ehci_1_resources[2]; 778 779 static struct platform_device orion_ehci_1 = { 780 .name = "orion-ehci", 781 .id = 1, 782 .dev = { 783 .dma_mask = &ehci_dmamask, 784 .coherent_dma_mask = DMA_BIT_MASK(32), 785 .platform_data = &orion_ehci_data, 786 }, 787 }; 788 789 void __init orion_ehci_1_init(unsigned long mapbase, 790 unsigned long irq) 791 { 792 fill_resources(&orion_ehci_1, orion_ehci_1_resources, 793 mapbase, SZ_4K - 1, irq); 794 795 platform_device_register(&orion_ehci_1); 796 } 797 798 /***************************************************************************** 799 * EHCI2 800 ****************************************************************************/ 801 static struct resource orion_ehci_2_resources[2]; 802 803 static struct platform_device orion_ehci_2 = { 804 .name = "orion-ehci", 805 .id = 2, 806 .dev = { 807 .dma_mask = &ehci_dmamask, 808 .coherent_dma_mask = DMA_BIT_MASK(32), 809 .platform_data = &orion_ehci_data, 810 }, 811 }; 812 813 void __init orion_ehci_2_init(unsigned long mapbase, 814 unsigned long irq) 815 { 816 fill_resources(&orion_ehci_2, orion_ehci_2_resources, 817 mapbase, SZ_4K - 1, irq); 818 819 platform_device_register(&orion_ehci_2); 820 } 821 822 /***************************************************************************** 823 * SATA 824 ****************************************************************************/ 825 static struct resource orion_sata_resources[2] = { 826 { 827 .name = "sata base", 828 }, { 829 .name = "sata irq", 830 }, 831 }; 832 833 static struct platform_device orion_sata = { 834 .name = "sata_mv", 835 .id = 0, 836 .dev = { 837 .coherent_dma_mask = DMA_BIT_MASK(32), 838 }, 839 }; 840 841 void __init orion_sata_init(struct mv_sata_platform_data *sata_data, 842 unsigned long mapbase, 843 unsigned long irq) 844 { 845 orion_sata.dev.platform_data = sata_data; 846 fill_resources(&orion_sata, orion_sata_resources, 847 mapbase, 0x5000 - 1, irq); 848 849 platform_device_register(&orion_sata); 850 } 851 852 /***************************************************************************** 853 * Cryptographic Engines and Security Accelerator (CESA) 854 ****************************************************************************/ 855 static struct resource orion_crypto_resources[] = { 856 { 857 .name = "regs", 858 }, { 859 .name = "crypto interrupt", 860 }, { 861 .name = "sram", 862 .flags = IORESOURCE_MEM, 863 }, 864 }; 865 866 static struct platform_device orion_crypto = { 867 .name = "mv_crypto", 868 .id = -1, 869 }; 870 871 void __init orion_crypto_init(unsigned long mapbase, 872 unsigned long srambase, 873 unsigned long sram_size, 874 unsigned long irq) 875 { 876 fill_resources(&orion_crypto, orion_crypto_resources, 877 mapbase, 0xffff, irq); 878 orion_crypto.num_resources = 3; 879 orion_crypto_resources[2].start = srambase; 880 orion_crypto_resources[2].end = srambase + sram_size - 1; 881 882 platform_device_register(&orion_crypto); 883 } 884