11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds NetWinder Floating Point Emulator 31da177e4SLinus Torvalds (c) Rebel.com, 1998-1999 41da177e4SLinus Torvalds 51da177e4SLinus Torvalds Direct questions, comments to Scott Bambrough <scottb@netwinder.org> 61da177e4SLinus Torvalds 71da177e4SLinus Torvalds This program is free software; you can redistribute it and/or modify 81da177e4SLinus Torvalds it under the terms of the GNU General Public License as published by 91da177e4SLinus Torvalds the Free Software Foundation; either version 2 of the License, or 101da177e4SLinus Torvalds (at your option) any later version. 111da177e4SLinus Torvalds 121da177e4SLinus Torvalds This program is distributed in the hope that it will be useful, 131da177e4SLinus Torvalds but WITHOUT ANY WARRANTY; without even the implied warranty of 141da177e4SLinus Torvalds MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 151da177e4SLinus Torvalds GNU General Public License for more details. 161da177e4SLinus Torvalds 171da177e4SLinus Torvalds You should have received a copy of the GNU General Public License 181da177e4SLinus Torvalds along with this program; if not, write to the Free Software 191da177e4SLinus Torvalds Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 201da177e4SLinus Torvalds */ 211da177e4SLinus Torvalds 221da177e4SLinus Torvalds #ifndef __FPSR_H__ 231da177e4SLinus Torvalds #define __FPSR_H__ 241da177e4SLinus Torvalds 251da177e4SLinus Torvalds /* 261da177e4SLinus Torvalds The FPSR is a 32 bit register consisting of 4 parts, each exactly 271da177e4SLinus Torvalds one byte. 281da177e4SLinus Torvalds 291da177e4SLinus Torvalds SYSTEM ID 301da177e4SLinus Torvalds EXCEPTION TRAP ENABLE BYTE 311da177e4SLinus Torvalds SYSTEM CONTROL BYTE 321da177e4SLinus Torvalds CUMULATIVE EXCEPTION FLAGS BYTE 331da177e4SLinus Torvalds 341da177e4SLinus Torvalds The FPCR is a 32 bit register consisting of bit flags. 351da177e4SLinus Torvalds */ 361da177e4SLinus Torvalds 371da177e4SLinus Torvalds /* SYSTEM ID 381da177e4SLinus Torvalds ------------ 391da177e4SLinus Torvalds Note: the system id byte is read only */ 401da177e4SLinus Torvalds 411da177e4SLinus Torvalds typedef unsigned int FPSR; /* type for floating point status register */ 421da177e4SLinus Torvalds typedef unsigned int FPCR; /* type for floating point control register */ 431da177e4SLinus Torvalds 441da177e4SLinus Torvalds #define MASK_SYSID 0xff000000 451da177e4SLinus Torvalds #define BIT_HARDWARE 0x80000000 461da177e4SLinus Torvalds #define FP_EMULATOR 0x01000000 /* System ID for emulator */ 471da177e4SLinus Torvalds #define FP_ACCELERATOR 0x81000000 /* System ID for FPA11 */ 481da177e4SLinus Torvalds 491da177e4SLinus Torvalds /* EXCEPTION TRAP ENABLE BYTE 501da177e4SLinus Torvalds ----------------------------- */ 511da177e4SLinus Torvalds 521da177e4SLinus Torvalds #define MASK_TRAP_ENABLE 0x00ff0000 531da177e4SLinus Torvalds #define MASK_TRAP_ENABLE_STRICT 0x001f0000 541da177e4SLinus Torvalds #define BIT_IXE 0x00100000 /* inexact exception enable */ 551da177e4SLinus Torvalds #define BIT_UFE 0x00080000 /* underflow exception enable */ 561da177e4SLinus Torvalds #define BIT_OFE 0x00040000 /* overflow exception enable */ 571da177e4SLinus Torvalds #define BIT_DZE 0x00020000 /* divide by zero exception enable */ 581da177e4SLinus Torvalds #define BIT_IOE 0x00010000 /* invalid operation exception enable */ 591da177e4SLinus Torvalds 601da177e4SLinus Torvalds /* SYSTEM CONTROL BYTE 611da177e4SLinus Torvalds ---------------------- */ 621da177e4SLinus Torvalds 631da177e4SLinus Torvalds #define MASK_SYSTEM_CONTROL 0x0000ff00 641da177e4SLinus Torvalds #define MASK_TRAP_STRICT 0x00001f00 651da177e4SLinus Torvalds 661da177e4SLinus Torvalds #define BIT_AC 0x00001000 /* use alternative C-flag definition 671da177e4SLinus Torvalds for compares */ 681da177e4SLinus Torvalds #define BIT_EP 0x00000800 /* use expanded packed decimal format */ 691da177e4SLinus Torvalds #define BIT_SO 0x00000400 /* select synchronous operation of FPA */ 701da177e4SLinus Torvalds #define BIT_NE 0x00000200 /* NaN exception bit */ 711da177e4SLinus Torvalds #define BIT_ND 0x00000100 /* no denormalized numbers bit */ 721da177e4SLinus Torvalds 731da177e4SLinus Torvalds /* CUMULATIVE EXCEPTION FLAGS BYTE 741da177e4SLinus Torvalds ---------------------------------- */ 751da177e4SLinus Torvalds 761da177e4SLinus Torvalds #define MASK_EXCEPTION_FLAGS 0x000000ff 771da177e4SLinus Torvalds #define MASK_EXCEPTION_FLAGS_STRICT 0x0000001f 781da177e4SLinus Torvalds 791da177e4SLinus Torvalds #define BIT_IXC 0x00000010 /* inexact exception flag */ 801da177e4SLinus Torvalds #define BIT_UFC 0x00000008 /* underflow exception flag */ 811da177e4SLinus Torvalds #define BIT_OFC 0x00000004 /* overfloat exception flag */ 821da177e4SLinus Torvalds #define BIT_DZC 0x00000002 /* divide by zero exception flag */ 831da177e4SLinus Torvalds #define BIT_IOC 0x00000001 /* invalid operation exception flag */ 841da177e4SLinus Torvalds 851da177e4SLinus Torvalds /* Floating Point Control Register 861da177e4SLinus Torvalds ----------------------------------*/ 871da177e4SLinus Torvalds 881da177e4SLinus Torvalds #define BIT_RU 0x80000000 /* rounded up bit */ 891da177e4SLinus Torvalds #define BIT_IE 0x10000000 /* inexact bit */ 901da177e4SLinus Torvalds #define BIT_MO 0x08000000 /* mantissa overflow bit */ 911da177e4SLinus Torvalds #define BIT_EO 0x04000000 /* exponent overflow bit */ 921da177e4SLinus Torvalds #define BIT_SB 0x00000800 /* store bounce */ 931da177e4SLinus Torvalds #define BIT_AB 0x00000400 /* arithmetic bounce */ 941da177e4SLinus Torvalds #define BIT_RE 0x00000200 /* rounding exception */ 951da177e4SLinus Torvalds #define BIT_DA 0x00000100 /* disable FPA */ 961da177e4SLinus Torvalds 971da177e4SLinus Torvalds #define MASK_OP 0x00f08010 /* AU operation code */ 981da177e4SLinus Torvalds #define MASK_PR 0x00080080 /* AU precision */ 991da177e4SLinus Torvalds #define MASK_S1 0x00070000 /* AU source register 1 */ 1001da177e4SLinus Torvalds #define MASK_S2 0x00000007 /* AU source register 2 */ 1011da177e4SLinus Torvalds #define MASK_DS 0x00007000 /* AU destination register */ 1021da177e4SLinus Torvalds #define MASK_RM 0x00000060 /* AU rounding mode */ 1031da177e4SLinus Torvalds #define MASK_ALU 0x9cfff2ff /* only ALU can write these bits */ 1041da177e4SLinus Torvalds #define MASK_RESET 0x00000d00 /* bits set on reset, all others cleared */ 1051da177e4SLinus Torvalds #define MASK_WFC MASK_RESET 1061da177e4SLinus Torvalds #define MASK_RFC ~MASK_RESET 1071da177e4SLinus Torvalds 1081da177e4SLinus Torvalds #endif 109