xref: /openbmc/linux/arch/arm/nwfpe/entry.S (revision 643d1f7f)
1/*
2    NetWinder Floating Point Emulator
3    (c) Rebel.COM, 1998
4    (c) 1998, 1999 Philip Blundell
5
6    Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
7
8    This program is free software; you can redistribute it and/or modify
9    it under the terms of the GNU General Public License as published by
10    the Free Software Foundation; either version 2 of the License, or
11    (at your option) any later version.
12
13    This program is distributed in the hope that it will be useful,
14    but WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16    GNU General Public License for more details.
17
18    You should have received a copy of the GNU General Public License
19    along with this program; if not, write to the Free Software
20    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23/* This is the kernel's entry point into the floating point emulator.
24It is called from the kernel with code similar to this:
25
26	sub	r4, r5, #4
27	ldrt	r0, [r4]			@ r0  = instruction
28	adrsvc	al, r9, ret_from_exception	@ r9  = normal FP return
29	adrsvc	al, lr, fpundefinstr		@ lr  = undefined instr return
30
31	get_current_task r10
32	mov	r8, #1
33	strb	r8, [r10, #TSK_USED_MATH]	@ set current->used_math
34	add	r10, r10, #TSS_FPESAVE		@ r10 = workspace
35	ldr	r4, .LC2
36	ldr	pc, [r4]			@ Call FP emulator entry point
37
38The kernel expects the emulator to return via one of two possible
39points of return it passes to the emulator.  The emulator, if
40successful in its emulation, jumps to ret_from_exception (passed in
41r9) and the kernel takes care of returning control from the trap to
42the user code.  If the emulator is unable to emulate the instruction,
43it returns via _fpundefinstr (passed via lr) and the kernel halts the
44user program with a core dump.
45
46On entry to the emulator r10 points to an area of private FP workspace
47reserved in the thread structure for this process.  This is where the
48emulator saves its registers across calls.  The first word of this area
49is used as a flag to detect the first time a process uses floating point,
50so that the emulator startup cost can be avoided for tasks that don't
51want it.
52
53This routine does three things:
54
551) The kernel has created a struct pt_regs on the stack and saved the
56user registers into it.  See /usr/include/asm/proc/ptrace.h for details.
57
582) It calls EmulateAll to emulate a floating point instruction.
59EmulateAll returns 1 if the emulation was successful, or 0 if not.
60
613) If an instruction has been emulated successfully, it looks ahead at
62the next instruction.  If it is a floating point instruction, it
63executes the instruction, without returning to user space.  In this
64way it repeatedly looks ahead and executes floating point instructions
65until it encounters a non floating point instruction, at which time it
66returns via _fpreturn.
67
68This is done to reduce the effect of the trap overhead on each
69floating point instructions.  GCC attempts to group floating point
70instructions to allow the emulator to spread the cost of the trap over
71several floating point instructions.  */
72
73#include <asm/asm-offsets.h>
74
75	.globl	nwfpe_enter
76nwfpe_enter:
77	mov	r4, lr			@ save the failure-return addresses
78	mov	sl, sp			@ we access the registers via 'sl'
79
80	ldr	r5, [sp, #S_PC]		@ get contents of PC;
81	mov	r6, r0			@ save the opcode
82emulate:
83	ldr	r1, [sp, #S_PSR]	@ fetch the PSR
84	bl	checkCondition		@ check the condition
85	cmp	r0, #0			@ r0 = 0 ==> condition failed
86
87	@ if condition code failed to match, next insn
88	beq	next			@ get the next instruction;
89
90	mov	r0, r6			@ prepare for EmulateAll()
91	bl	EmulateAll		@ emulate the instruction
92	cmp	r0, #0			@ was emulation successful
93	moveq	pc, r4			@ no, return failure
94
95next:
96.Lx1:	ldrt	r6, [r5], #4		@ get the next instruction and
97					@ increment PC
98
99	and	r2, r6, #0x0F000000	@ test for FP insns
100	teq	r2, #0x0C000000
101	teqne	r2, #0x0D000000
102	teqne	r2, #0x0E000000
103	movne	pc, r9			@ return ok if not a fp insn
104
105	str	r5, [sp, #S_PC]		@ update PC copy in regs
106
107	mov	r0, r6			@ save a copy
108	b	emulate			@ check condition and emulate
109
110	@ We need to be prepared for the instructions at .Lx1 and .Lx2
111	@ to fault.  Emit the appropriate exception gunk to fix things up.
112	@ ??? For some reason, faults can happen at .Lx2 even with a
113	@ plain LDR instruction.  Weird, but it seems harmless.
114	.section .fixup,"ax"
115	.align	2
116.Lfix:	mov	pc, r9			@ let the user eat segfaults
117	.previous
118
119	.section __ex_table,"a"
120	.align	3
121	.long	.Lx1, .Lfix
122	.previous
123