1/* 2 * linux/arch/arm/mm/tlb-v7.S 3 * 4 * Copyright (C) 1997-2002 Russell King 5 * Modified for ARMv7 by Catalin Marinas 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * ARM architecture version 6 TLB handling functions. 12 * These assume a split I/D TLB. 13 */ 14#include <linux/init.h> 15#include <linux/linkage.h> 16#include <asm/asm-offsets.h> 17#include <asm/page.h> 18#include <asm/tlbflush.h> 19#include "proc-macros.S" 20 21/* 22 * v7wbi_flush_user_tlb_range(start, end, vma) 23 * 24 * Invalidate a range of TLB entries in the specified address space. 25 * 26 * - start - start address (may not be aligned) 27 * - end - end address (exclusive, may not be aligned) 28 * - vma - vma_struct describing address range 29 * 30 * It is assumed that: 31 * - the "Invalidate single entry" instruction will invalidate 32 * both the I and the D TLBs on Harvard-style TLBs 33 */ 34ENTRY(v7wbi_flush_user_tlb_range) 35 vma_vm_mm r3, r2 @ get vma->vm_mm 36 mmid r3, r3 @ get vm_mm->context.id 37 dsb 38 mov r0, r0, lsr #PAGE_SHIFT @ align address 39 mov r1, r1, lsr #PAGE_SHIFT 40 asid r3, r3 @ mask ASID 41 orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA 42 mov r1, r1, lsl #PAGE_SHIFT 431: 44#ifdef CONFIG_SMP 45 mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) 46#else 47 mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate U MVA 48#endif 49 add r0, r0, #PAGE_SZ 50 cmp r0, r1 51 blo 1b 52 mov ip, #0 53 mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB 54 dsb 55 mov pc, lr 56ENDPROC(v7wbi_flush_user_tlb_range) 57 58/* 59 * v7wbi_flush_kern_tlb_range(start,end) 60 * 61 * Invalidate a range of kernel TLB entries 62 * 63 * - start - start address (may not be aligned) 64 * - end - end address (exclusive, may not be aligned) 65 */ 66ENTRY(v7wbi_flush_kern_tlb_range) 67 dsb 68 mov r0, r0, lsr #PAGE_SHIFT @ align address 69 mov r1, r1, lsr #PAGE_SHIFT 70 mov r0, r0, lsl #PAGE_SHIFT 71 mov r1, r1, lsl #PAGE_SHIFT 721: 73#ifdef CONFIG_SMP 74 mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) 75#else 76 mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate U MVA 77#endif 78 add r0, r0, #PAGE_SZ 79 cmp r0, r1 80 blo 1b 81 mov r2, #0 82 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB 83 dsb 84 isb 85 mov pc, lr 86ENDPROC(v7wbi_flush_kern_tlb_range) 87 88 __INIT 89 90 .type v7wbi_tlb_fns, #object 91ENTRY(v7wbi_tlb_fns) 92 .long v7wbi_flush_user_tlb_range 93 .long v7wbi_flush_kern_tlb_range 94 .long v7wbi_tlb_flags 95 .size v7wbi_tlb_fns, . - v7wbi_tlb_fns 96