1/* 2 * linux/arch/arm/mm/tlb-fa.S 3 * 4 * Copyright (C) 2005 Faraday Corp. 5 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> 6 * 7 * Based on tlb-v4wbi.S: 8 * Copyright (C) 1997-2002 Russell King 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * ARM architecture version 4, Faraday variation. 15 * This assume an unified TLBs, with a write buffer, and branch target buffer (BTB) 16 * 17 * Processors: FA520 FA526 FA626 18 */ 19#include <linux/linkage.h> 20#include <linux/init.h> 21#include <asm/asm-offsets.h> 22#include <asm/tlbflush.h> 23#include "proc-macros.S" 24 25 26/* 27 * flush_user_tlb_range(start, end, mm) 28 * 29 * Invalidate a range of TLB entries in the specified address space. 30 * 31 * - start - range start address 32 * - end - range end address 33 * - mm - mm_struct describing address space 34 */ 35 .align 4 36ENTRY(fa_flush_user_tlb_range) 37 vma_vm_mm ip, r2 38 act_mm r3 @ get current->active_mm 39 eors r3, ip, r3 @ == mm ? 40 movne pc, lr @ no, we dont do anything 41 mov r3, #0 42 mcr p15, 0, r3, c7, c10, 4 @ drain WB 43 bic r0, r0, #0x0ff 44 bic r0, r0, #0xf00 451: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry 46 add r0, r0, #PAGE_SZ 47 cmp r0, r1 48 blo 1b 49 mcr p15, 0, r3, c7, c5, 6 @ invalidate BTB 50 mcr p15, 0, r3, c7, c10, 4 @ data write barrier 51 mov pc, lr 52 53 54ENTRY(fa_flush_kern_tlb_range) 55 mov r3, #0 56 mcr p15, 0, r3, c7, c10, 4 @ drain WB 57 bic r0, r0, #0x0ff 58 bic r0, r0, #0xf00 591: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry 60 add r0, r0, #PAGE_SZ 61 cmp r0, r1 62 blo 1b 63 mcr p15, 0, r3, c7, c5, 6 @ invalidate BTB 64 mcr p15, 0, r3, c7, c10, 4 @ data write barrier 65 mcr p15, 0, r3, c7, c5, 4 @ prefetch flush 66 mov pc, lr 67 68 __INITDATA 69 70 /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */ 71 define_tlb_functions fa, fa_tlb_flags 72