1/* 2 * linux/arch/arm/mm/arm740.S: utility functions for ARM740 3 * 4 * Copyright (C) 2004-2006 Hyok S. Choi (hyok.choi@samsung.com) 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11#include <linux/linkage.h> 12#include <linux/init.h> 13#include <asm/assembler.h> 14#include <asm/asm-offsets.h> 15#include <asm/hwcap.h> 16#include <asm/pgtable-hwdef.h> 17#include <asm/pgtable.h> 18#include <asm/ptrace.h> 19 20 .text 21/* 22 * cpu_arm740_proc_init() 23 * cpu_arm740_do_idle() 24 * cpu_arm740_dcache_clean_area() 25 * cpu_arm740_switch_mm() 26 * 27 * These are not required. 28 */ 29ENTRY(cpu_arm740_proc_init) 30ENTRY(cpu_arm740_do_idle) 31ENTRY(cpu_arm740_dcache_clean_area) 32ENTRY(cpu_arm740_switch_mm) 33 mov pc, lr 34 35/* 36 * cpu_arm740_proc_fin() 37 */ 38ENTRY(cpu_arm740_proc_fin) 39 stmfd sp!, {lr} 40 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE 41 msr cpsr_c, ip 42 mrc p15, 0, r0, c1, c0, 0 43 bic r0, r0, #0x3f000000 @ bank/f/lock/s 44 bic r0, r0, #0x0000000c @ w-buffer/cache 45 mcr p15, 0, r0, c1, c0, 0 @ disable caches 46 mcr p15, 0, r0, c7, c0, 0 @ invalidate cache 47 ldmfd sp!, {pc} 48 49/* 50 * cpu_arm740_reset(loc) 51 * Params : r0 = address to jump to 52 * Notes : This sets up everything for a reset 53 */ 54ENTRY(cpu_arm740_reset) 55 mov ip, #0 56 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache 57 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register 58 bic ip, ip, #0x0000000c @ ............wc.. 59 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 60 mov pc, r0 61 62 __INIT 63 64 .type __arm740_setup, #function 65__arm740_setup: 66 mov r0, #0 67 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches 68 69 mcr p15, 0, r0, c6, c3 @ disable area 3~7 70 mcr p15, 0, r0, c6, c4 71 mcr p15, 0, r0, c6, c5 72 mcr p15, 0, r0, c6, c6 73 mcr p15, 0, r0, c6, c7 74 75 mov r0, #0x0000003F @ base = 0, size = 4GB 76 mcr p15, 0, r0, c6, c0 @ set area 0, default 77 78 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM 79 ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB) 80 mov r2, #10 @ 11 is the minimum (4KB) 811: add r2, r2, #1 @ area size *= 2 82 mov r1, r1, lsr #1 83 bne 1b @ count not zero r-shift 84 orr r0, r0, r2, lsl #1 @ the area register value 85 orr r0, r0, #1 @ set enable bit 86 mcr p15, 0, r0, c6, c1 @ set area 1, RAM 87 88 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH 89 ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB) 90 mov r2, #10 @ 11 is the minimum (4KB) 911: add r2, r2, #1 @ area size *= 2 92 mov r1, r1, lsr #1 93 bne 1b @ count not zero r-shift 94 orr r0, r0, r2, lsl #1 @ the area register value 95 orr r0, r0, #1 @ set enable bit 96 mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH 97 98 mov r0, #0x06 99 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable 100#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 101 mov r0, #0x00 @ disable whole write buffer 102#else 103 mov r0, #0x02 @ Region 1 write bufferred 104#endif 105 mcr p15, 0, r0, c3, c0 106 107 mov r0, #0x10000 108 sub r0, r0, #1 @ r0 = 0xffff 109 mcr p15, 0, r0, c5, c0 @ all read/write access 110 111 mrc p15, 0, r0, c1, c0 @ get control register 112 bic r0, r0, #0x3F000000 @ set to standard caching mode 113 @ need some benchmark 114 orr r0, r0, #0x0000000d @ MPU/Cache/WB 115 116 mov pc, lr 117 118 .size __arm740_setup, . - __arm740_setup 119 120 __INITDATA 121 122/* 123 * Purpose : Function pointers used to access above functions - all calls 124 * come through these 125 */ 126 .type arm740_processor_functions, #object 127ENTRY(arm740_processor_functions) 128 .word v4t_late_abort 129 .word pabort_noifar 130 .word cpu_arm740_proc_init 131 .word cpu_arm740_proc_fin 132 .word cpu_arm740_reset 133 .word cpu_arm740_do_idle 134 .word cpu_arm740_dcache_clean_area 135 .word cpu_arm740_switch_mm 136 .word 0 @ cpu_*_set_pte 137 .size arm740_processor_functions, . - arm740_processor_functions 138 139 .section ".rodata" 140 141 .type cpu_arch_name, #object 142cpu_arch_name: 143 .asciz "armv4" 144 .size cpu_arch_name, . - cpu_arch_name 145 146 .type cpu_elf_name, #object 147cpu_elf_name: 148 .asciz "v4" 149 .size cpu_elf_name, . - cpu_elf_name 150 151 .type cpu_arm740_name, #object 152cpu_arm740_name: 153 .ascii "ARM740T" 154 .size cpu_arm740_name, . - cpu_arm740_name 155 156 .align 157 158 .section ".proc.info.init", #alloc, #execinstr 159 .type __arm740_proc_info,#object 160__arm740_proc_info: 161 .long 0x41807400 162 .long 0xfffffff0 163 .long 0 164 b __arm740_setup 165 .long cpu_arch_name 166 .long cpu_elf_name 167 .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT 168 .long cpu_arm740_name 169 .long arm740_processor_functions 170 .long 0 171 .long 0 172 .long v3_cache_fns @ cache model 173 .size __arm740_proc_info, . - __arm740_proc_info 174 175 176