11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * linux/arch/arm/mm/mmap.c 31da177e4SLinus Torvalds */ 41da177e4SLinus Torvalds #include <linux/fs.h> 51da177e4SLinus Torvalds #include <linux/mm.h> 61da177e4SLinus Torvalds #include <linux/mman.h> 71da177e4SLinus Torvalds #include <linux/shm.h> 8e8edc6e0SAlexey Dobriyan #include <linux/sched.h> 909d9bae0SRussell King #include <linux/io.h> 10cc92c28bSNicolas Pitre #include <linux/random.h> 110ba8b9b2SRussell King #include <asm/cputype.h> 121da177e4SLinus Torvalds #include <asm/system.h> 131da177e4SLinus Torvalds 141da177e4SLinus Torvalds #define COLOUR_ALIGN(addr,pgoff) \ 151da177e4SLinus Torvalds ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \ 161da177e4SLinus Torvalds (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1))) 171da177e4SLinus Torvalds 181da177e4SLinus Torvalds /* 191da177e4SLinus Torvalds * We need to ensure that shared mappings are correctly aligned to 201da177e4SLinus Torvalds * avoid aliasing issues with VIPT caches. We need to ensure that 211da177e4SLinus Torvalds * a specific page of an object is always mapped at a multiple of 221da177e4SLinus Torvalds * SHMLBA bytes. 231da177e4SLinus Torvalds * 241da177e4SLinus Torvalds * We unconditionally provide this function for all cases, however 251da177e4SLinus Torvalds * in the VIVT case, we optimise out the alignment rules. 261da177e4SLinus Torvalds */ 271da177e4SLinus Torvalds unsigned long 281da177e4SLinus Torvalds arch_get_unmapped_area(struct file *filp, unsigned long addr, 291da177e4SLinus Torvalds unsigned long len, unsigned long pgoff, unsigned long flags) 301da177e4SLinus Torvalds { 311da177e4SLinus Torvalds struct mm_struct *mm = current->mm; 321da177e4SLinus Torvalds struct vm_area_struct *vma; 331da177e4SLinus Torvalds unsigned long start_addr; 341da177e4SLinus Torvalds #ifdef CONFIG_CPU_V6 351da177e4SLinus Torvalds unsigned int cache_type; 361da177e4SLinus Torvalds int do_align = 0, aliasing = 0; 371da177e4SLinus Torvalds 381da177e4SLinus Torvalds /* 391da177e4SLinus Torvalds * We only need to do colour alignment if either the I or D 401da177e4SLinus Torvalds * caches alias. This is indicated by bits 9 and 21 of the 411da177e4SLinus Torvalds * cache type register. 421da177e4SLinus Torvalds */ 430ba8b9b2SRussell King cache_type = read_cpuid_cachetype(); 440ba8b9b2SRussell King if (cache_type != read_cpuid_id()) { 451da177e4SLinus Torvalds aliasing = (cache_type | cache_type >> 12) & (1 << 11); 461da177e4SLinus Torvalds if (aliasing) 471da177e4SLinus Torvalds do_align = filp || flags & MAP_SHARED; 481da177e4SLinus Torvalds } 491da177e4SLinus Torvalds #else 501da177e4SLinus Torvalds #define do_align 0 511da177e4SLinus Torvalds #define aliasing 0 521da177e4SLinus Torvalds #endif 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds /* 55acec0ac0SBenjamin Herrenschmidt * We enforce the MAP_FIXED case. 561da177e4SLinus Torvalds */ 571da177e4SLinus Torvalds if (flags & MAP_FIXED) { 58e77414e0SAl Viro if (aliasing && flags & MAP_SHARED && 59e77414e0SAl Viro (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)) 601da177e4SLinus Torvalds return -EINVAL; 611da177e4SLinus Torvalds return addr; 621da177e4SLinus Torvalds } 631da177e4SLinus Torvalds 641da177e4SLinus Torvalds if (len > TASK_SIZE) 651da177e4SLinus Torvalds return -ENOMEM; 661da177e4SLinus Torvalds 671da177e4SLinus Torvalds if (addr) { 681da177e4SLinus Torvalds if (do_align) 691da177e4SLinus Torvalds addr = COLOUR_ALIGN(addr, pgoff); 701da177e4SLinus Torvalds else 711da177e4SLinus Torvalds addr = PAGE_ALIGN(addr); 721da177e4SLinus Torvalds 731da177e4SLinus Torvalds vma = find_vma(mm, addr); 741da177e4SLinus Torvalds if (TASK_SIZE - len >= addr && 751da177e4SLinus Torvalds (!vma || addr + len <= vma->vm_start)) 761da177e4SLinus Torvalds return addr; 771da177e4SLinus Torvalds } 781363c3cdSWolfgang Wander if (len > mm->cached_hole_size) { 791da177e4SLinus Torvalds start_addr = addr = mm->free_area_cache; 801363c3cdSWolfgang Wander } else { 811363c3cdSWolfgang Wander start_addr = addr = TASK_UNMAPPED_BASE; 821363c3cdSWolfgang Wander mm->cached_hole_size = 0; 831363c3cdSWolfgang Wander } 84cc92c28bSNicolas Pitre /* 8 bits of randomness in 20 address space bits */ 85cc92c28bSNicolas Pitre if (current->flags & PF_RANDOMIZE) 86cc92c28bSNicolas Pitre addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT; 871da177e4SLinus Torvalds 881da177e4SLinus Torvalds full_search: 891da177e4SLinus Torvalds if (do_align) 901da177e4SLinus Torvalds addr = COLOUR_ALIGN(addr, pgoff); 911da177e4SLinus Torvalds else 921da177e4SLinus Torvalds addr = PAGE_ALIGN(addr); 931da177e4SLinus Torvalds 941da177e4SLinus Torvalds for (vma = find_vma(mm, addr); ; vma = vma->vm_next) { 951da177e4SLinus Torvalds /* At this point: (!vma || addr < vma->vm_end). */ 961da177e4SLinus Torvalds if (TASK_SIZE - len < addr) { 971da177e4SLinus Torvalds /* 981da177e4SLinus Torvalds * Start a new search - just in case we missed 991da177e4SLinus Torvalds * some holes. 1001da177e4SLinus Torvalds */ 1011da177e4SLinus Torvalds if (start_addr != TASK_UNMAPPED_BASE) { 1021da177e4SLinus Torvalds start_addr = addr = TASK_UNMAPPED_BASE; 1031363c3cdSWolfgang Wander mm->cached_hole_size = 0; 1041da177e4SLinus Torvalds goto full_search; 1051da177e4SLinus Torvalds } 1061da177e4SLinus Torvalds return -ENOMEM; 1071da177e4SLinus Torvalds } 1081da177e4SLinus Torvalds if (!vma || addr + len <= vma->vm_start) { 1091da177e4SLinus Torvalds /* 1101da177e4SLinus Torvalds * Remember the place where we stopped the search: 1111da177e4SLinus Torvalds */ 1121da177e4SLinus Torvalds mm->free_area_cache = addr + len; 1131da177e4SLinus Torvalds return addr; 1141da177e4SLinus Torvalds } 1151363c3cdSWolfgang Wander if (addr + mm->cached_hole_size < vma->vm_start) 1161363c3cdSWolfgang Wander mm->cached_hole_size = vma->vm_start - addr; 1171da177e4SLinus Torvalds addr = vma->vm_end; 1181da177e4SLinus Torvalds if (do_align) 1191da177e4SLinus Torvalds addr = COLOUR_ALIGN(addr, pgoff); 1201da177e4SLinus Torvalds } 1211da177e4SLinus Torvalds } 1221da177e4SLinus Torvalds 12351635ad2SLennert Buytenhek 12451635ad2SLennert Buytenhek /* 12551635ad2SLennert Buytenhek * You really shouldn't be using read() or write() on /dev/mem. This 12651635ad2SLennert Buytenhek * might go away in the future. 12751635ad2SLennert Buytenhek */ 12851635ad2SLennert Buytenhek int valid_phys_addr_range(unsigned long addr, size_t size) 12951635ad2SLennert Buytenhek { 1309ae3ae0bSAlexandre Rusev if (addr < PHYS_OFFSET) 1319ae3ae0bSAlexandre Rusev return 0; 1326806bfe1SGreg Ungerer if (addr + size > __pa(high_memory - 1) + 1) 13351635ad2SLennert Buytenhek return 0; 13451635ad2SLennert Buytenhek 13551635ad2SLennert Buytenhek return 1; 13651635ad2SLennert Buytenhek } 13751635ad2SLennert Buytenhek 13851635ad2SLennert Buytenhek /* 13951635ad2SLennert Buytenhek * We don't use supersection mappings for mmap() on /dev/mem, which 14051635ad2SLennert Buytenhek * means that we can't map the memory area above the 4G barrier into 14151635ad2SLennert Buytenhek * userspace. 14251635ad2SLennert Buytenhek */ 14351635ad2SLennert Buytenhek int valid_mmap_phys_addr_range(unsigned long pfn, size_t size) 14451635ad2SLennert Buytenhek { 14551635ad2SLennert Buytenhek return !(pfn + (size >> PAGE_SHIFT) > 0x00100000); 14651635ad2SLennert Buytenhek } 147087aaffcSNicolas Pitre 148087aaffcSNicolas Pitre #ifdef CONFIG_STRICT_DEVMEM 149087aaffcSNicolas Pitre 150087aaffcSNicolas Pitre #include <linux/ioport.h> 151087aaffcSNicolas Pitre 152087aaffcSNicolas Pitre /* 153087aaffcSNicolas Pitre * devmem_is_allowed() checks to see if /dev/mem access to a certain 154087aaffcSNicolas Pitre * address is valid. The argument is a physical page number. 155087aaffcSNicolas Pitre * We mimic x86 here by disallowing access to system RAM as well as 156087aaffcSNicolas Pitre * device-exclusive MMIO regions. This effectively disable read()/write() 157087aaffcSNicolas Pitre * on /dev/mem. 158087aaffcSNicolas Pitre */ 159087aaffcSNicolas Pitre int devmem_is_allowed(unsigned long pfn) 160087aaffcSNicolas Pitre { 161087aaffcSNicolas Pitre if (iomem_is_exclusive(pfn << PAGE_SHIFT)) 162087aaffcSNicolas Pitre return 0; 163087aaffcSNicolas Pitre if (!page_is_ram(pfn)) 164087aaffcSNicolas Pitre return 1; 165087aaffcSNicolas Pitre return 0; 166087aaffcSNicolas Pitre } 167087aaffcSNicolas Pitre 168087aaffcSNicolas Pitre #endif 169