xref: /openbmc/linux/arch/arm/mm/fsr-2level.c (revision b2441318)
1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
2136848d4SCatalin Marinas static struct fsr_info fsr_info[] = {
3136848d4SCatalin Marinas 	/*
4136848d4SCatalin Marinas 	 * The following are the standard ARMv3 and ARMv4 aborts.  ARMv5
5136848d4SCatalin Marinas 	 * defines these to be "precise" aborts.
6136848d4SCatalin Marinas 	 */
7136848d4SCatalin Marinas 	{ do_bad,		SIGSEGV, 0,		"vector exception"		   },
8136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 BUS_ADRALN,	"alignment exception"		   },
9136848d4SCatalin Marinas 	{ do_bad,		SIGKILL, 0,		"terminal exception"		   },
10136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 BUS_ADRALN,	"alignment exception"		   },
11136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on linefetch"	   },
12136848d4SCatalin Marinas 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"section translation fault"	   },
13136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on linefetch"	   },
14136848d4SCatalin Marinas 	{ do_page_fault,	SIGSEGV, SEGV_MAPERR,	"page translation fault"	   },
15136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on non-linefetch"  },
16136848d4SCatalin Marinas 	{ do_bad,		SIGSEGV, SEGV_ACCERR,	"section domain fault"		   },
17136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on non-linefetch"  },
18136848d4SCatalin Marinas 	{ do_bad,		SIGSEGV, SEGV_ACCERR,	"page domain fault"		   },
19136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on translation"	   },
20136848d4SCatalin Marinas 	{ do_sect_fault,	SIGSEGV, SEGV_ACCERR,	"section permission fault"	   },
21136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on translation"	   },
22136848d4SCatalin Marinas 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"page permission fault"		   },
23136848d4SCatalin Marinas 	/*
24136848d4SCatalin Marinas 	 * The following are "imprecise" aborts, which are signalled by bit
25136848d4SCatalin Marinas 	 * 10 of the FSR, and may not be recoverable.  These are only
26136848d4SCatalin Marinas 	 * supported if the CPU abort handler supports bit 10.
27136848d4SCatalin Marinas 	 */
28136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 16"			   },
29136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 17"			   },
30136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 18"			   },
31136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 19"			   },
32136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"lock abort"			   }, /* xscale */
33136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 21"			   },
34136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  BUS_OBJERR,	"imprecise external abort"	   }, /* xscale */
35136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 23"			   },
36136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"dcache parity error"		   }, /* xscale */
37136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 25"			   },
38136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 26"			   },
39136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 27"			   },
40136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 28"			   },
41136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 29"			   },
42136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 30"			   },
43136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 31"			   },
44136848d4SCatalin Marinas };
45136848d4SCatalin Marinas 
46136848d4SCatalin Marinas static struct fsr_info ifsr_info[] = {
47136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 0"			   },
48136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 1"			   },
49136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"debug event"			   },
50136848d4SCatalin Marinas 	{ do_bad,		SIGSEGV, SEGV_ACCERR,	"section access flag fault"	   },
51136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 4"			   },
52136848d4SCatalin Marinas 	{ do_translation_fault,	SIGSEGV, SEGV_MAPERR,	"section translation fault"	   },
53136848d4SCatalin Marinas 	{ do_bad,		SIGSEGV, SEGV_ACCERR,	"page access flag fault"	   },
54136848d4SCatalin Marinas 	{ do_page_fault,	SIGSEGV, SEGV_MAPERR,	"page translation fault"	   },
55136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on non-linefetch"  },
56136848d4SCatalin Marinas 	{ do_bad,		SIGSEGV, SEGV_ACCERR,	"section domain fault"		   },
57136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 10"			   },
58136848d4SCatalin Marinas 	{ do_bad,		SIGSEGV, SEGV_ACCERR,	"page domain fault"		   },
59136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on translation"	   },
60136848d4SCatalin Marinas 	{ do_sect_fault,	SIGSEGV, SEGV_ACCERR,	"section permission fault"	   },
61136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,	 0,		"external abort on translation"	   },
62136848d4SCatalin Marinas 	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"page permission fault"		   },
63136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 16"			   },
64136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 17"			   },
65136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 18"			   },
66136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 19"			   },
67136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 20"			   },
68136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 21"			   },
69136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 22"			   },
70136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 23"			   },
71136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 24"			   },
72136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 25"			   },
73136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 26"			   },
74136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 27"			   },
75136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 28"			   },
76136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 29"			   },
77136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 30"			   },
78136848d4SCatalin Marinas 	{ do_bad,		SIGBUS,  0,		"unknown 31"			   },
79136848d4SCatalin Marinas };
80