1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Debug helper to dump the current kernel pagetables of the system 4 * so that we can see what the various memory ranges are set to. 5 * 6 * Derived from x86 implementation: 7 * (C) Copyright 2008 Intel Corporation 8 * 9 * Author: Arjan van de Ven <arjan@linux.intel.com> 10 */ 11 #include <linux/debugfs.h> 12 #include <linux/fs.h> 13 #include <linux/mm.h> 14 #include <linux/seq_file.h> 15 16 #include <asm/domain.h> 17 #include <asm/fixmap.h> 18 #include <asm/memory.h> 19 #include <asm/pgtable.h> 20 #include <asm/ptdump.h> 21 22 static struct addr_marker address_markers[] = { 23 { MODULES_VADDR, "Modules" }, 24 { PAGE_OFFSET, "Kernel Mapping" }, 25 { 0, "vmalloc() Area" }, 26 { VMALLOC_END, "vmalloc() End" }, 27 { FIXADDR_START, "Fixmap Area" }, 28 { VECTORS_BASE, "Vectors" }, 29 { VECTORS_BASE + PAGE_SIZE * 2, "Vectors End" }, 30 { -1, NULL }, 31 }; 32 33 #define pt_dump_seq_printf(m, fmt, args...) \ 34 ({ \ 35 if (m) \ 36 seq_printf(m, fmt, ##args); \ 37 }) 38 39 #define pt_dump_seq_puts(m, fmt) \ 40 ({ \ 41 if (m) \ 42 seq_printf(m, fmt); \ 43 }) 44 45 struct pg_state { 46 struct seq_file *seq; 47 const struct addr_marker *marker; 48 unsigned long start_address; 49 unsigned level; 50 u64 current_prot; 51 bool check_wx; 52 unsigned long wx_pages; 53 const char *current_domain; 54 }; 55 56 struct prot_bits { 57 u64 mask; 58 u64 val; 59 const char *set; 60 const char *clear; 61 bool ro_bit; 62 bool nx_bit; 63 }; 64 65 static const struct prot_bits pte_bits[] = { 66 { 67 .mask = L_PTE_USER, 68 .val = L_PTE_USER, 69 .set = "USR", 70 .clear = " ", 71 }, { 72 .mask = L_PTE_RDONLY, 73 .val = L_PTE_RDONLY, 74 .set = "ro", 75 .clear = "RW", 76 .ro_bit = true, 77 }, { 78 .mask = L_PTE_XN, 79 .val = L_PTE_XN, 80 .set = "NX", 81 .clear = "x ", 82 .nx_bit = true, 83 }, { 84 .mask = L_PTE_SHARED, 85 .val = L_PTE_SHARED, 86 .set = "SHD", 87 .clear = " ", 88 }, { 89 .mask = L_PTE_MT_MASK, 90 .val = L_PTE_MT_UNCACHED, 91 .set = "SO/UNCACHED", 92 }, { 93 .mask = L_PTE_MT_MASK, 94 .val = L_PTE_MT_BUFFERABLE, 95 .set = "MEM/BUFFERABLE/WC", 96 }, { 97 .mask = L_PTE_MT_MASK, 98 .val = L_PTE_MT_WRITETHROUGH, 99 .set = "MEM/CACHED/WT", 100 }, { 101 .mask = L_PTE_MT_MASK, 102 .val = L_PTE_MT_WRITEBACK, 103 .set = "MEM/CACHED/WBRA", 104 #ifndef CONFIG_ARM_LPAE 105 }, { 106 .mask = L_PTE_MT_MASK, 107 .val = L_PTE_MT_MINICACHE, 108 .set = "MEM/MINICACHE", 109 #endif 110 }, { 111 .mask = L_PTE_MT_MASK, 112 .val = L_PTE_MT_WRITEALLOC, 113 .set = "MEM/CACHED/WBWA", 114 }, { 115 .mask = L_PTE_MT_MASK, 116 .val = L_PTE_MT_DEV_SHARED, 117 .set = "DEV/SHARED", 118 #ifndef CONFIG_ARM_LPAE 119 }, { 120 .mask = L_PTE_MT_MASK, 121 .val = L_PTE_MT_DEV_NONSHARED, 122 .set = "DEV/NONSHARED", 123 #endif 124 }, { 125 .mask = L_PTE_MT_MASK, 126 .val = L_PTE_MT_DEV_WC, 127 .set = "DEV/WC", 128 }, { 129 .mask = L_PTE_MT_MASK, 130 .val = L_PTE_MT_DEV_CACHED, 131 .set = "DEV/CACHED", 132 }, 133 }; 134 135 static const struct prot_bits section_bits[] = { 136 #ifdef CONFIG_ARM_LPAE 137 { 138 .mask = PMD_SECT_USER, 139 .val = PMD_SECT_USER, 140 .set = "USR", 141 }, { 142 .mask = L_PMD_SECT_RDONLY | PMD_SECT_AP2, 143 .val = L_PMD_SECT_RDONLY | PMD_SECT_AP2, 144 .set = "ro", 145 .clear = "RW", 146 .ro_bit = true, 147 #elif __LINUX_ARM_ARCH__ >= 6 148 { 149 .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 150 .val = PMD_SECT_APX | PMD_SECT_AP_WRITE, 151 .set = " ro", 152 .ro_bit = true, 153 }, { 154 .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 155 .val = PMD_SECT_AP_WRITE, 156 .set = " RW", 157 }, { 158 .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 159 .val = PMD_SECT_AP_READ, 160 .set = "USR ro", 161 }, { 162 .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 163 .val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 164 .set = "USR RW", 165 #else /* ARMv4/ARMv5 */ 166 /* These are approximate */ 167 { 168 .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 169 .val = 0, 170 .set = " ro", 171 .ro_bit = true, 172 }, { 173 .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 174 .val = PMD_SECT_AP_WRITE, 175 .set = " RW", 176 }, { 177 .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 178 .val = PMD_SECT_AP_READ, 179 .set = "USR ro", 180 }, { 181 .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 182 .val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE, 183 .set = "USR RW", 184 #endif 185 }, { 186 .mask = PMD_SECT_XN, 187 .val = PMD_SECT_XN, 188 .set = "NX", 189 .clear = "x ", 190 .nx_bit = true, 191 }, { 192 .mask = PMD_SECT_S, 193 .val = PMD_SECT_S, 194 .set = "SHD", 195 .clear = " ", 196 }, 197 }; 198 199 struct pg_level { 200 const struct prot_bits *bits; 201 size_t num; 202 u64 mask; 203 const struct prot_bits *ro_bit; 204 const struct prot_bits *nx_bit; 205 }; 206 207 static struct pg_level pg_level[] = { 208 { 209 }, { /* pgd */ 210 }, { /* p4d */ 211 }, { /* pud */ 212 }, { /* pmd */ 213 .bits = section_bits, 214 .num = ARRAY_SIZE(section_bits), 215 }, { /* pte */ 216 .bits = pte_bits, 217 .num = ARRAY_SIZE(pte_bits), 218 }, 219 }; 220 221 static void dump_prot(struct pg_state *st, const struct prot_bits *bits, size_t num) 222 { 223 unsigned i; 224 225 for (i = 0; i < num; i++, bits++) { 226 const char *s; 227 228 if ((st->current_prot & bits->mask) == bits->val) 229 s = bits->set; 230 else 231 s = bits->clear; 232 233 if (s) 234 pt_dump_seq_printf(st->seq, " %s", s); 235 } 236 } 237 238 static void note_prot_wx(struct pg_state *st, unsigned long addr) 239 { 240 if (!st->check_wx) 241 return; 242 if ((st->current_prot & pg_level[st->level].ro_bit->mask) == 243 pg_level[st->level].ro_bit->val) 244 return; 245 if ((st->current_prot & pg_level[st->level].nx_bit->mask) == 246 pg_level[st->level].nx_bit->val) 247 return; 248 249 WARN_ONCE(1, "arm/mm: Found insecure W+X mapping at address %pS\n", 250 (void *)st->start_address); 251 252 st->wx_pages += (addr - st->start_address) / PAGE_SIZE; 253 } 254 255 static void note_page(struct pg_state *st, unsigned long addr, 256 unsigned int level, u64 val, const char *domain) 257 { 258 static const char units[] = "KMGTPE"; 259 u64 prot = val & pg_level[level].mask; 260 261 if (!st->level) { 262 st->level = level; 263 st->current_prot = prot; 264 st->current_domain = domain; 265 pt_dump_seq_printf(st->seq, "---[ %s ]---\n", st->marker->name); 266 } else if (prot != st->current_prot || level != st->level || 267 domain != st->current_domain || 268 addr >= st->marker[1].start_address) { 269 const char *unit = units; 270 unsigned long delta; 271 272 if (st->current_prot) { 273 note_prot_wx(st, addr); 274 pt_dump_seq_printf(st->seq, "0x%08lx-0x%08lx ", 275 st->start_address, addr); 276 277 delta = (addr - st->start_address) >> 10; 278 while (!(delta & 1023) && unit[1]) { 279 delta >>= 10; 280 unit++; 281 } 282 pt_dump_seq_printf(st->seq, "%9lu%c", delta, *unit); 283 if (st->current_domain) 284 pt_dump_seq_printf(st->seq, " %s", 285 st->current_domain); 286 if (pg_level[st->level].bits) 287 dump_prot(st, pg_level[st->level].bits, pg_level[st->level].num); 288 pt_dump_seq_printf(st->seq, "\n"); 289 } 290 291 if (addr >= st->marker[1].start_address) { 292 st->marker++; 293 pt_dump_seq_printf(st->seq, "---[ %s ]---\n", 294 st->marker->name); 295 } 296 st->start_address = addr; 297 st->current_prot = prot; 298 st->current_domain = domain; 299 st->level = level; 300 } 301 } 302 303 static void walk_pte(struct pg_state *st, pmd_t *pmd, unsigned long start, 304 const char *domain) 305 { 306 pte_t *pte = pte_offset_kernel(pmd, 0); 307 unsigned long addr; 308 unsigned i; 309 310 for (i = 0; i < PTRS_PER_PTE; i++, pte++) { 311 addr = start + i * PAGE_SIZE; 312 note_page(st, addr, 5, pte_val(*pte), domain); 313 } 314 } 315 316 static const char *get_domain_name(pmd_t *pmd) 317 { 318 #ifndef CONFIG_ARM_LPAE 319 switch (pmd_val(*pmd) & PMD_DOMAIN_MASK) { 320 case PMD_DOMAIN(DOMAIN_KERNEL): 321 return "KERNEL "; 322 case PMD_DOMAIN(DOMAIN_USER): 323 return "USER "; 324 case PMD_DOMAIN(DOMAIN_IO): 325 return "IO "; 326 case PMD_DOMAIN(DOMAIN_VECTORS): 327 return "VECTORS"; 328 default: 329 return "unknown"; 330 } 331 #endif 332 return NULL; 333 } 334 335 static void walk_pmd(struct pg_state *st, pud_t *pud, unsigned long start) 336 { 337 pmd_t *pmd = pmd_offset(pud, 0); 338 unsigned long addr; 339 unsigned i; 340 const char *domain; 341 342 for (i = 0; i < PTRS_PER_PMD; i++, pmd++) { 343 addr = start + i * PMD_SIZE; 344 domain = get_domain_name(pmd); 345 if (pmd_none(*pmd) || pmd_large(*pmd) || !pmd_present(*pmd)) 346 note_page(st, addr, 3, pmd_val(*pmd), domain); 347 else 348 walk_pte(st, pmd, addr, domain); 349 350 if (SECTION_SIZE < PMD_SIZE && pmd_large(pmd[1])) { 351 addr += SECTION_SIZE; 352 pmd++; 353 domain = get_domain_name(pmd); 354 note_page(st, addr, 4, pmd_val(*pmd), domain); 355 } 356 } 357 } 358 359 static void walk_pud(struct pg_state *st, p4d_t *p4d, unsigned long start) 360 { 361 pud_t *pud = pud_offset(p4d, 0); 362 unsigned long addr; 363 unsigned i; 364 365 for (i = 0; i < PTRS_PER_PUD; i++, pud++) { 366 addr = start + i * PUD_SIZE; 367 if (!pud_none(*pud)) { 368 walk_pmd(st, pud, addr); 369 } else { 370 note_page(st, addr, 3, pud_val(*pud), NULL); 371 } 372 } 373 } 374 375 static void walk_p4d(struct pg_state *st, pgd_t *pgd, unsigned long start) 376 { 377 p4d_t *p4d = p4d_offset(pgd, 0); 378 unsigned long addr; 379 unsigned i; 380 381 for (i = 0; i < PTRS_PER_P4D; i++, p4d++) { 382 addr = start + i * P4D_SIZE; 383 if (!p4d_none(*p4d)) { 384 walk_pud(st, p4d, addr); 385 } else { 386 note_page(st, addr, 2, p4d_val(*p4d), NULL); 387 } 388 } 389 } 390 391 static void walk_pgd(struct pg_state *st, struct mm_struct *mm, 392 unsigned long start) 393 { 394 pgd_t *pgd = pgd_offset(mm, 0UL); 395 unsigned i; 396 unsigned long addr; 397 398 for (i = 0; i < PTRS_PER_PGD; i++, pgd++) { 399 addr = start + i * PGDIR_SIZE; 400 if (!pgd_none(*pgd)) { 401 walk_p4d(st, pgd, addr); 402 } else { 403 note_page(st, addr, 1, pgd_val(*pgd), NULL); 404 } 405 } 406 } 407 408 void ptdump_walk_pgd(struct seq_file *m, struct ptdump_info *info) 409 { 410 struct pg_state st = { 411 .seq = m, 412 .marker = info->markers, 413 .check_wx = false, 414 }; 415 416 walk_pgd(&st, info->mm, info->base_addr); 417 note_page(&st, 0, 0, 0, NULL); 418 } 419 420 static void ptdump_initialize(void) 421 { 422 unsigned i, j; 423 424 for (i = 0; i < ARRAY_SIZE(pg_level); i++) 425 if (pg_level[i].bits) 426 for (j = 0; j < pg_level[i].num; j++) { 427 pg_level[i].mask |= pg_level[i].bits[j].mask; 428 if (pg_level[i].bits[j].ro_bit) 429 pg_level[i].ro_bit = &pg_level[i].bits[j]; 430 if (pg_level[i].bits[j].nx_bit) 431 pg_level[i].nx_bit = &pg_level[i].bits[j]; 432 } 433 434 address_markers[2].start_address = VMALLOC_START; 435 } 436 437 static struct ptdump_info kernel_ptdump_info = { 438 .mm = &init_mm, 439 .markers = address_markers, 440 .base_addr = 0, 441 }; 442 443 void ptdump_check_wx(void) 444 { 445 struct pg_state st = { 446 .seq = NULL, 447 .marker = (struct addr_marker[]) { 448 { 0, NULL}, 449 { -1, NULL}, 450 }, 451 .check_wx = true, 452 }; 453 454 walk_pgd(&st, &init_mm, 0); 455 note_page(&st, 0, 0, 0, NULL); 456 if (st.wx_pages) 457 pr_warn("Checked W+X mappings: FAILED, %lu W+X pages found\n", 458 st.wx_pages); 459 else 460 pr_info("Checked W+X mappings: passed, no W+X pages found\n"); 461 } 462 463 static int ptdump_init(void) 464 { 465 ptdump_initialize(); 466 ptdump_debugfs_register(&kernel_ptdump_info, "kernel_page_tables"); 467 return 0; 468 } 469 __initcall(ptdump_init); 470