xref: /openbmc/linux/arch/arm/mm/abort-ev6.S (revision 9cfc5c90)
1#include <linux/linkage.h>
2#include <asm/assembler.h>
3#include "abort-macro.S"
4/*
5 * Function: v6_early_abort
6 *
7 * Params  : r2 = pt_regs
8 *	   : r4 = aborted context pc
9 *	   : r5 = aborted context psr
10 *
11 * Returns : r4 - r11, r13 preserved
12 *
13 * Purpose : obtain information about current aborted instruction.
14 * Note: we read user space.  This means we might cause a data
15 * abort here if the I-TLB and D-TLB aren't seeing the same
16 * picture.  Unfortunately, this does happen.  We live with it.
17 */
18	.align	5
19ENTRY(v6_early_abort)
20	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
21	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
22/*
23 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
24 */
25#ifdef CONFIG_ARM_ERRATA_326103
26	ldr	ip, =0x4107b36
27	mrc	p15, 0, r3, c0, c0, 0		@ get processor id
28	teq	ip, r3, lsr #4			@ r0 ARM1136?
29	bne	1f
30	tst	r5, #PSR_J_BIT			@ Java?
31	tsteq	r5, #PSR_T_BIT			@ Thumb?
32	bne	1f
33	bic	r1, r1, #1 << 11		@ clear bit 11 of FSR
34	ldr	r3, [r4]			@ read aborted ARM instruction
35 ARM_BE8(rev	r3, r3)
36
37	teq_ldrd tmp=ip, insn=r3		@ insn was LDRD?
38	beq	1f				@ yes
39	tst	r3, #1 << 20			@ L = 0 -> write
40	orreq	r1, r1, #1 << 11		@ yes.
41#endif
421:	uaccess_disable ip			@ disable userspace access
43	b	do_DataAbort
44