1 /* 2 * This file contains common code that is intended to be used across 3 * boards so that it's not replicated. 4 * 5 * Copyright (C) 2011 Xilinx 6 * 7 * This software is licensed under the terms of the GNU General Public 8 * License version 2, as published by the Free Software Foundation, and 9 * may be copied, distributed, and modified under those terms. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #include <linux/init.h> 18 #include <linux/kernel.h> 19 #include <linux/cpumask.h> 20 #include <linux/platform_device.h> 21 #include <linux/clk.h> 22 #include <linux/clk/zynq.h> 23 #include <linux/of_address.h> 24 #include <linux/of_irq.h> 25 #include <linux/of_platform.h> 26 #include <linux/of.h> 27 28 #include <asm/mach/arch.h> 29 #include <asm/mach/map.h> 30 #include <asm/mach/time.h> 31 #include <asm/mach-types.h> 32 #include <asm/page.h> 33 #include <asm/pgtable.h> 34 #include <asm/hardware/gic.h> 35 #include <asm/hardware/cache-l2x0.h> 36 37 #include "common.h" 38 39 static struct of_device_id zynq_of_bus_ids[] __initdata = { 40 { .compatible = "simple-bus", }, 41 {} 42 }; 43 44 /** 45 * xilinx_init_machine() - System specific initialization, intended to be 46 * called from board specific initialization. 47 */ 48 static void __init xilinx_init_machine(void) 49 { 50 /* 51 * 64KB way size, 8-way associativity, parity disabled 52 */ 53 l2x0_of_init(0x02060000, 0xF0F0FFFF); 54 55 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); 56 } 57 58 static struct of_device_id irq_match[] __initdata = { 59 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 60 { } 61 }; 62 63 /** 64 * xilinx_irq_init() - Interrupt controller initialization for the GIC. 65 */ 66 static void __init xilinx_irq_init(void) 67 { 68 of_irq_init(irq_match); 69 } 70 71 #define SCU_PERIPH_PHYS 0xF8F00000 72 #define SCU_PERIPH_SIZE SZ_8K 73 #define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) 74 75 static struct map_desc scu_desc __initdata = { 76 .virtual = SCU_PERIPH_VIRT, 77 .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), 78 .length = SCU_PERIPH_SIZE, 79 .type = MT_DEVICE, 80 }; 81 82 static void __init xilinx_zynq_timer_init(void) 83 { 84 struct device_node *np; 85 void __iomem *slcr; 86 87 np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); 88 slcr = of_iomap(np, 0); 89 WARN_ON(!slcr); 90 91 xilinx_zynq_clocks_init(slcr); 92 93 xttcpss_timer_init(); 94 } 95 96 /* 97 * Instantiate and initialize the system timer structure 98 */ 99 static struct sys_timer xttcpss_sys_timer = { 100 .init = xilinx_zynq_timer_init, 101 }; 102 103 /** 104 * xilinx_map_io() - Create memory mappings needed for early I/O. 105 */ 106 static void __init xilinx_map_io(void) 107 { 108 debug_ll_io_init(); 109 iotable_init(&scu_desc, 1); 110 } 111 112 static const char *xilinx_dt_match[] = { 113 "xlnx,zynq-zc702", 114 "xlnx,zynq-7000", 115 NULL 116 }; 117 118 MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 119 .map_io = xilinx_map_io, 120 .init_irq = xilinx_irq_init, 121 .handle_irq = gic_handle_irq, 122 .init_machine = xilinx_init_machine, 123 .timer = &xttcpss_sys_timer, 124 .dt_compat = xilinx_dt_match, 125 MACHINE_END 126