1 /* 2 * This file contains common code that is intended to be used across 3 * boards so that it's not replicated. 4 * 5 * Copyright (C) 2011 Xilinx 6 * 7 * This software is licensed under the terms of the GNU General Public 8 * License version 2, as published by the Free Software Foundation, and 9 * may be copied, distributed, and modified under those terms. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #include <linux/init.h> 18 #include <linux/kernel.h> 19 #include <linux/cpumask.h> 20 #include <linux/platform_device.h> 21 #include <linux/clk.h> 22 #include <linux/clk-provider.h> 23 #include <linux/clk/zynq.h> 24 #include <linux/clocksource.h> 25 #include <linux/of_address.h> 26 #include <linux/of_irq.h> 27 #include <linux/of_platform.h> 28 #include <linux/of.h> 29 #include <linux/memblock.h> 30 #include <linux/irqchip.h> 31 #include <linux/irqchip/arm-gic.h> 32 33 #include <asm/mach/arch.h> 34 #include <asm/mach/map.h> 35 #include <asm/mach/time.h> 36 #include <asm/mach-types.h> 37 #include <asm/page.h> 38 #include <asm/pgtable.h> 39 #include <asm/smp_scu.h> 40 #include <asm/hardware/cache-l2x0.h> 41 42 #include "common.h" 43 44 void __iomem *zynq_scu_base; 45 46 /** 47 * zynq_memory_init - Initialize special memory 48 * 49 * We need to stop things allocating the low memory as DMA can't work in 50 * the 1st 512K of memory. 51 */ 52 static void __init zynq_memory_init(void) 53 { 54 if (!__pa(PAGE_OFFSET)) 55 memblock_reserve(__pa(PAGE_OFFSET), __pa(swapper_pg_dir)); 56 } 57 58 static struct platform_device zynq_cpuidle_device = { 59 .name = "cpuidle-zynq", 60 }; 61 62 /** 63 * zynq_init_machine - System specific initialization, intended to be 64 * called from board specific initialization. 65 */ 66 static void __init zynq_init_machine(void) 67 { 68 struct platform_device_info devinfo = { .name = "cpufreq-cpu0", }; 69 70 /* 71 * 64KB way size, 8-way associativity, parity disabled 72 */ 73 l2x0_of_init(0x02060000, 0xF0F0FFFF); 74 75 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 76 77 platform_device_register(&zynq_cpuidle_device); 78 platform_device_register_full(&devinfo); 79 80 zynq_slcr_init(); 81 } 82 83 static void __init zynq_timer_init(void) 84 { 85 zynq_early_slcr_init(); 86 87 zynq_clock_init(); 88 of_clk_init(NULL); 89 clocksource_of_init(); 90 } 91 92 static struct map_desc zynq_cortex_a9_scu_map __initdata = { 93 .length = SZ_256, 94 .type = MT_DEVICE, 95 }; 96 97 static void __init zynq_scu_map_io(void) 98 { 99 unsigned long base; 100 101 base = scu_a9_get_base(); 102 zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base); 103 /* Expected address is in vmalloc area that's why simple assign here */ 104 zynq_cortex_a9_scu_map.virtual = base; 105 iotable_init(&zynq_cortex_a9_scu_map, 1); 106 zynq_scu_base = (void __iomem *)base; 107 BUG_ON(!zynq_scu_base); 108 } 109 110 /** 111 * zynq_map_io - Create memory mappings needed for early I/O. 112 */ 113 static void __init zynq_map_io(void) 114 { 115 debug_ll_io_init(); 116 zynq_scu_map_io(); 117 } 118 119 static void __init zynq_irq_init(void) 120 { 121 gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND; 122 irqchip_init(); 123 } 124 125 static void zynq_system_reset(enum reboot_mode mode, const char *cmd) 126 { 127 zynq_slcr_system_reset(); 128 } 129 130 static const char * const zynq_dt_match[] = { 131 "xlnx,zynq-7000", 132 NULL 133 }; 134 135 DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 136 .smp = smp_ops(zynq_smp_ops), 137 .map_io = zynq_map_io, 138 .init_irq = zynq_irq_init, 139 .init_machine = zynq_init_machine, 140 .init_time = zynq_timer_init, 141 .dt_compat = zynq_dt_match, 142 .reserve = zynq_memory_init, 143 .restart = zynq_system_reset, 144 MACHINE_END 145