1 /* 2 * This file contains common code that is intended to be used across 3 * boards so that it's not replicated. 4 * 5 * Copyright (C) 2011 Xilinx 6 * 7 * This software is licensed under the terms of the GNU General Public 8 * License version 2, as published by the Free Software Foundation, and 9 * may be copied, distributed, and modified under those terms. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #include <linux/init.h> 18 #include <linux/kernel.h> 19 #include <linux/cpumask.h> 20 #include <linux/platform_device.h> 21 #include <linux/clk.h> 22 #include <linux/clk/zynq.h> 23 #include <linux/clocksource.h> 24 #include <linux/of_address.h> 25 #include <linux/of_irq.h> 26 #include <linux/of_platform.h> 27 #include <linux/of.h> 28 #include <linux/irqchip.h> 29 #include <linux/irqchip/arm-gic.h> 30 31 #include <asm/mach/arch.h> 32 #include <asm/mach/map.h> 33 #include <asm/mach/time.h> 34 #include <asm/mach-types.h> 35 #include <asm/page.h> 36 #include <asm/pgtable.h> 37 #include <asm/smp_scu.h> 38 #include <asm/hardware/cache-l2x0.h> 39 40 #include "common.h" 41 42 void __iomem *zynq_scu_base; 43 44 static struct platform_device zynq_cpuidle_device = { 45 .name = "cpuidle-zynq", 46 }; 47 48 /** 49 * zynq_init_machine - System specific initialization, intended to be 50 * called from board specific initialization. 51 */ 52 static void __init zynq_init_machine(void) 53 { 54 /* 55 * 64KB way size, 8-way associativity, parity disabled 56 */ 57 l2x0_of_init(0x02060000, 0xF0F0FFFF); 58 59 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 60 61 platform_device_register(&zynq_cpuidle_device); 62 } 63 64 static void __init zynq_timer_init(void) 65 { 66 zynq_slcr_init(); 67 clocksource_of_init(); 68 } 69 70 static struct map_desc zynq_cortex_a9_scu_map __initdata = { 71 .length = SZ_256, 72 .type = MT_DEVICE, 73 }; 74 75 static void __init zynq_scu_map_io(void) 76 { 77 unsigned long base; 78 79 base = scu_a9_get_base(); 80 zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base); 81 /* Expected address is in vmalloc area that's why simple assign here */ 82 zynq_cortex_a9_scu_map.virtual = base; 83 iotable_init(&zynq_cortex_a9_scu_map, 1); 84 zynq_scu_base = (void __iomem *)base; 85 BUG_ON(!zynq_scu_base); 86 } 87 88 /** 89 * zynq_map_io - Create memory mappings needed for early I/O. 90 */ 91 static void __init zynq_map_io(void) 92 { 93 debug_ll_io_init(); 94 zynq_scu_map_io(); 95 } 96 97 static void __init zynq_irq_init(void) 98 { 99 gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND; 100 irqchip_init(); 101 } 102 103 static void zynq_system_reset(enum reboot_mode mode, const char *cmd) 104 { 105 zynq_slcr_system_reset(); 106 } 107 108 static const char * const zynq_dt_match[] = { 109 "xlnx,zynq-7000", 110 NULL 111 }; 112 113 DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 114 .smp = smp_ops(zynq_smp_ops), 115 .map_io = zynq_map_io, 116 .init_irq = zynq_irq_init, 117 .init_machine = zynq_init_machine, 118 .init_time = zynq_timer_init, 119 .dt_compat = zynq_dt_match, 120 .restart = zynq_system_reset, 121 MACHINE_END 122