1e9a91de7STony Prisk /* 2e9a91de7STony Prisk * arch/arm/mach-vt8500/vt8500.c 3e9a91de7STony Prisk * 4e9a91de7STony Prisk * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> 5e9a91de7STony Prisk * 6e9a91de7STony Prisk * This program is free software; you can redistribute it and/or modify 7e9a91de7STony Prisk * it under the terms of the GNU General Public License as published by 8e9a91de7STony Prisk * the Free Software Foundation; either version 2 of the License, or 9e9a91de7STony Prisk * (at your option) any later version. 10e9a91de7STony Prisk * 11e9a91de7STony Prisk * This program is distributed in the hope that it will be useful, 12e9a91de7STony Prisk * but WITHOUT ANY WARRANTY; without even the implied warranty of 13e9a91de7STony Prisk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14e9a91de7STony Prisk * GNU General Public License for more details. 15e9a91de7STony Prisk * 16e9a91de7STony Prisk * You should have received a copy of the GNU General Public License 17e9a91de7STony Prisk * along with this program; if not, write to the Free Software 18e9a91de7STony Prisk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19e9a91de7STony Prisk */ 20e9a91de7STony Prisk 2141d16512STony Prisk #include <linux/clocksource.h> 22e9a91de7STony Prisk #include <linux/io.h> 23e9a91de7STony Prisk #include <linux/pm.h> 247b6d864bSRobin Holt #include <linux/reboot.h> 25e9a91de7STony Prisk 26e9a91de7STony Prisk #include <asm/mach-types.h> 27e9a91de7STony Prisk #include <asm/mach/arch.h> 28e9a91de7STony Prisk #include <asm/mach/time.h> 29e9a91de7STony Prisk #include <asm/mach/map.h> 30e9a91de7STony Prisk 31e9a91de7STony Prisk #include <linux/of.h> 32e9a91de7STony Prisk #include <linux/of_address.h> 33e9a91de7STony Prisk #include <linux/of_irq.h> 34e9a91de7STony Prisk #include <linux/of_platform.h> 35e9a91de7STony Prisk 36e9a91de7STony Prisk #include "common.h" 37e9a91de7STony Prisk 38e9a91de7STony Prisk #define LEGACY_GPIO_BASE 0xD8110000 39e9a91de7STony Prisk #define LEGACY_PMC_BASE 0xD8130000 40e9a91de7STony Prisk 41e9a91de7STony Prisk /* Registers in GPIO Controller */ 42e9a91de7STony Prisk #define VT8500_GPIO_MUX_REG 0x200 43e9a91de7STony Prisk 44e9a91de7STony Prisk /* Registers in Power Management Controller */ 45e9a91de7STony Prisk #define VT8500_HCR_REG 0x12 46e9a91de7STony Prisk #define VT8500_PMSR_REG 0x60 47e9a91de7STony Prisk 48e9a91de7STony Prisk static void __iomem *pmc_base; 49e9a91de7STony Prisk 507b6d864bSRobin Holt void vt8500_restart(enum reboot_mode mode, const char *cmd) 51e9a91de7STony Prisk { 52e9a91de7STony Prisk if (pmc_base) 53e9a91de7STony Prisk writel(1, pmc_base + VT8500_PMSR_REG); 54e9a91de7STony Prisk } 55e9a91de7STony Prisk 56e9a91de7STony Prisk static struct map_desc vt8500_io_desc[] __initdata = { 57e9a91de7STony Prisk /* SoC MMIO registers */ 58e9a91de7STony Prisk [0] = { 59e9a91de7STony Prisk .virtual = 0xf8000000, 60e9a91de7STony Prisk .pfn = __phys_to_pfn(0xd8000000), 61e9a91de7STony Prisk .length = 0x00390000, /* max of all chip variants */ 62e9a91de7STony Prisk .type = MT_DEVICE 63e9a91de7STony Prisk }, 64e9a91de7STony Prisk }; 65e9a91de7STony Prisk 66e9a91de7STony Prisk void __init vt8500_map_io(void) 67e9a91de7STony Prisk { 68e9a91de7STony Prisk iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc)); 69e9a91de7STony Prisk } 70e9a91de7STony Prisk 71e9a91de7STony Prisk static void vt8500_power_off(void) 72e9a91de7STony Prisk { 73e9a91de7STony Prisk local_irq_disable(); 74e9a91de7STony Prisk writew(5, pmc_base + VT8500_HCR_REG); 75e9a91de7STony Prisk asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0)); 76e9a91de7STony Prisk } 77e9a91de7STony Prisk 78e9a91de7STony Prisk void __init vt8500_init(void) 79e9a91de7STony Prisk { 80a4ee7770STony Prisk struct device_node *np; 81a4ee7770STony Prisk #if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505) 82a4ee7770STony Prisk struct device_node *fb; 83e9a91de7STony Prisk void __iomem *gpio_base; 84a4ee7770STony Prisk #endif 85e9a91de7STony Prisk 86e9a91de7STony Prisk #ifdef CONFIG_FB_VT8500 87e9a91de7STony Prisk fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb"); 88e9a91de7STony Prisk if (fb) { 89e9a91de7STony Prisk np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio"); 90e9a91de7STony Prisk if (np) { 91e9a91de7STony Prisk gpio_base = of_iomap(np, 0); 92e9a91de7STony Prisk 93e9a91de7STony Prisk if (!gpio_base) 94e9a91de7STony Prisk pr_err("%s: of_iomap(gpio_mux) failed\n", 95e9a91de7STony Prisk __func__); 96e9a91de7STony Prisk 97e9a91de7STony Prisk of_node_put(np); 98e9a91de7STony Prisk } else { 99e9a91de7STony Prisk gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000); 100e9a91de7STony Prisk if (!gpio_base) 101e9a91de7STony Prisk pr_err("%s: ioremap(legacy_gpio_mux) failed\n", 102e9a91de7STony Prisk __func__); 103e9a91de7STony Prisk } 104e9a91de7STony Prisk if (gpio_base) { 105e9a91de7STony Prisk writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1, 106e9a91de7STony Prisk gpio_base + VT8500_GPIO_MUX_REG); 107e9a91de7STony Prisk iounmap(gpio_base); 108e9a91de7STony Prisk } else 109e9a91de7STony Prisk pr_err("%s: Could not remap GPIO mux\n", __func__); 110e9a91de7STony Prisk 111e9a91de7STony Prisk of_node_put(fb); 112e9a91de7STony Prisk } 113e9a91de7STony Prisk #endif 114e9a91de7STony Prisk 115e9a91de7STony Prisk #ifdef CONFIG_FB_WM8505 116e9a91de7STony Prisk fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb"); 117e9a91de7STony Prisk if (fb) { 118e9a91de7STony Prisk np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio"); 119e9a91de7STony Prisk if (!np) 120e9a91de7STony Prisk np = of_find_compatible_node(NULL, NULL, 121e9a91de7STony Prisk "wm,wm8650-gpio"); 122e9a91de7STony Prisk if (np) { 123e9a91de7STony Prisk gpio_base = of_iomap(np, 0); 124e9a91de7STony Prisk 125e9a91de7STony Prisk if (!gpio_base) 126e9a91de7STony Prisk pr_err("%s: of_iomap(gpio_mux) failed\n", 127e9a91de7STony Prisk __func__); 128e9a91de7STony Prisk 129e9a91de7STony Prisk of_node_put(np); 130e9a91de7STony Prisk } else { 131e9a91de7STony Prisk gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000); 132e9a91de7STony Prisk if (!gpio_base) 133e9a91de7STony Prisk pr_err("%s: ioremap(legacy_gpio_mux) failed\n", 134e9a91de7STony Prisk __func__); 135e9a91de7STony Prisk } 136e9a91de7STony Prisk if (gpio_base) { 137e9a91de7STony Prisk writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 138e9a91de7STony Prisk 0x80000000, gpio_base + VT8500_GPIO_MUX_REG); 139e9a91de7STony Prisk iounmap(gpio_base); 140e9a91de7STony Prisk } else 141e9a91de7STony Prisk pr_err("%s: Could not remap GPIO mux\n", __func__); 142e9a91de7STony Prisk 143e9a91de7STony Prisk of_node_put(fb); 144e9a91de7STony Prisk } 145e9a91de7STony Prisk #endif 146e9a91de7STony Prisk 147e9a91de7STony Prisk np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc"); 148e9a91de7STony Prisk if (np) { 149e9a91de7STony Prisk pmc_base = of_iomap(np, 0); 150e9a91de7STony Prisk 151e9a91de7STony Prisk if (!pmc_base) 152e9a91de7STony Prisk pr_err("%s:of_iomap(pmc) failed\n", __func__); 153e9a91de7STony Prisk 154e9a91de7STony Prisk of_node_put(np); 155e9a91de7STony Prisk } else { 156e9a91de7STony Prisk pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000); 157e9a91de7STony Prisk if (!pmc_base) 158e9a91de7STony Prisk pr_err("%s:ioremap(power_off) failed\n", __func__); 159e9a91de7STony Prisk } 160e9a91de7STony Prisk if (pmc_base) 161e9a91de7STony Prisk pm_power_off = &vt8500_power_off; 162e9a91de7STony Prisk else 163e9a91de7STony Prisk pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__); 164e9a91de7STony Prisk 165e9a91de7STony Prisk vtwm_clk_init(pmc_base); 166e9a91de7STony Prisk 167e9a91de7STony Prisk of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 168e9a91de7STony Prisk } 169e9a91de7STony Prisk 170e9a91de7STony Prisk static const char * const vt8500_dt_compat[] = { 171e9a91de7STony Prisk "via,vt8500", 172e9a91de7STony Prisk "wm,wm8650", 173e9a91de7STony Prisk "wm,wm8505", 1748d31bfa5STony Prisk "wm,wm8750", 1758d31bfa5STony Prisk "wm,wm8850", 1769f8466c6SSrinivas Kandagatla NULL 177e9a91de7STony Prisk }; 178e9a91de7STony Prisk 179e9a91de7STony Prisk DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)") 180e9a91de7STony Prisk .dt_compat = vt8500_dt_compat, 181e9a91de7STony Prisk .map_io = vt8500_map_io, 182e9a91de7STony Prisk .init_machine = vt8500_init, 18341d16512STony Prisk .init_time = clocksource_of_init, 184e9a91de7STony Prisk .restart = vt8500_restart, 185e9a91de7STony Prisk MACHINE_END 186e9a91de7STony Prisk 187