11a59d1b8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2e9a91de7STony Prisk /*
3e9a91de7STony Prisk * arch/arm/mach-vt8500/vt8500.c
4e9a91de7STony Prisk *
5e9a91de7STony Prisk * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
6e9a91de7STony Prisk */
7e9a91de7STony Prisk
8e9a91de7STony Prisk #include <linux/io.h>
9e9a91de7STony Prisk #include <linux/pm.h>
107b6d864bSRobin Holt #include <linux/reboot.h>
11e9a91de7STony Prisk
12e9a91de7STony Prisk #include <asm/mach-types.h>
13e9a91de7STony Prisk #include <asm/mach/arch.h>
14e9a91de7STony Prisk #include <asm/mach/time.h>
15e9a91de7STony Prisk #include <asm/mach/map.h>
16e9a91de7STony Prisk
17e9a91de7STony Prisk #include <linux/of.h>
18e9a91de7STony Prisk #include <linux/of_address.h>
19e9a91de7STony Prisk #include <linux/of_irq.h>
20e9a91de7STony Prisk
21e9a91de7STony Prisk #define LEGACY_GPIO_BASE 0xD8110000
22e9a91de7STony Prisk #define LEGACY_PMC_BASE 0xD8130000
23e9a91de7STony Prisk
24e9a91de7STony Prisk /* Registers in GPIO Controller */
25e9a91de7STony Prisk #define VT8500_GPIO_MUX_REG 0x200
26e9a91de7STony Prisk
27e9a91de7STony Prisk /* Registers in Power Management Controller */
28e9a91de7STony Prisk #define VT8500_HCR_REG 0x12
29e9a91de7STony Prisk #define VT8500_PMSR_REG 0x60
30e9a91de7STony Prisk
31e9a91de7STony Prisk static void __iomem *pmc_base;
32e9a91de7STony Prisk
vt8500_restart(enum reboot_mode mode,const char * cmd)33192ebb7dSSachin Kamat static void vt8500_restart(enum reboot_mode mode, const char *cmd)
34e9a91de7STony Prisk {
35e9a91de7STony Prisk if (pmc_base)
36e9a91de7STony Prisk writel(1, pmc_base + VT8500_PMSR_REG);
37e9a91de7STony Prisk }
38e9a91de7STony Prisk
39e9a91de7STony Prisk static struct map_desc vt8500_io_desc[] __initdata = {
40e9a91de7STony Prisk /* SoC MMIO registers */
41e9a91de7STony Prisk [0] = {
42e9a91de7STony Prisk .virtual = 0xf8000000,
43e9a91de7STony Prisk .pfn = __phys_to_pfn(0xd8000000),
44e9a91de7STony Prisk .length = 0x00390000, /* max of all chip variants */
45e9a91de7STony Prisk .type = MT_DEVICE
46e9a91de7STony Prisk },
47e9a91de7STony Prisk };
48e9a91de7STony Prisk
vt8500_map_io(void)49192ebb7dSSachin Kamat static void __init vt8500_map_io(void)
50e9a91de7STony Prisk {
51e9a91de7STony Prisk iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc));
52e9a91de7STony Prisk }
53e9a91de7STony Prisk
vt8500_power_off(void)54e9a91de7STony Prisk static void vt8500_power_off(void)
55e9a91de7STony Prisk {
56e9a91de7STony Prisk local_irq_disable();
57e9a91de7STony Prisk writew(5, pmc_base + VT8500_HCR_REG);
5849dd0dcfSBehan Webster asm("mcr p15, 0, %0, c7, c0, 4" : : "r" (0));
59e9a91de7STony Prisk }
60e9a91de7STony Prisk
vt8500_init(void)61192ebb7dSSachin Kamat static void __init vt8500_init(void)
62e9a91de7STony Prisk {
63a4ee7770STony Prisk struct device_node *np;
64a4ee7770STony Prisk #if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505)
65a4ee7770STony Prisk struct device_node *fb;
66e9a91de7STony Prisk void __iomem *gpio_base;
67a4ee7770STony Prisk #endif
68e9a91de7STony Prisk
69e9a91de7STony Prisk #ifdef CONFIG_FB_VT8500
70e9a91de7STony Prisk fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
71e9a91de7STony Prisk if (fb) {
72e9a91de7STony Prisk np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio");
73e9a91de7STony Prisk if (np) {
74e9a91de7STony Prisk gpio_base = of_iomap(np, 0);
75e9a91de7STony Prisk
76e9a91de7STony Prisk if (!gpio_base)
77e9a91de7STony Prisk pr_err("%s: of_iomap(gpio_mux) failed\n",
78e9a91de7STony Prisk __func__);
79e9a91de7STony Prisk
80e9a91de7STony Prisk of_node_put(np);
81e9a91de7STony Prisk } else {
82e9a91de7STony Prisk gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
83e9a91de7STony Prisk if (!gpio_base)
84e9a91de7STony Prisk pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
85e9a91de7STony Prisk __func__);
86e9a91de7STony Prisk }
87e9a91de7STony Prisk if (gpio_base) {
88e9a91de7STony Prisk writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
89e9a91de7STony Prisk gpio_base + VT8500_GPIO_MUX_REG);
90e9a91de7STony Prisk iounmap(gpio_base);
91e9a91de7STony Prisk } else
92e9a91de7STony Prisk pr_err("%s: Could not remap GPIO mux\n", __func__);
93e9a91de7STony Prisk
94e9a91de7STony Prisk of_node_put(fb);
95e9a91de7STony Prisk }
96e9a91de7STony Prisk #endif
97e9a91de7STony Prisk
98e9a91de7STony Prisk #ifdef CONFIG_FB_WM8505
99e9a91de7STony Prisk fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb");
100e9a91de7STony Prisk if (fb) {
101e9a91de7STony Prisk np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio");
102e9a91de7STony Prisk if (!np)
103e9a91de7STony Prisk np = of_find_compatible_node(NULL, NULL,
104e9a91de7STony Prisk "wm,wm8650-gpio");
105e9a91de7STony Prisk if (np) {
106e9a91de7STony Prisk gpio_base = of_iomap(np, 0);
107e9a91de7STony Prisk
108e9a91de7STony Prisk if (!gpio_base)
109e9a91de7STony Prisk pr_err("%s: of_iomap(gpio_mux) failed\n",
110e9a91de7STony Prisk __func__);
111e9a91de7STony Prisk
112e9a91de7STony Prisk of_node_put(np);
113e9a91de7STony Prisk } else {
114e9a91de7STony Prisk gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
115e9a91de7STony Prisk if (!gpio_base)
116e9a91de7STony Prisk pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
117e9a91de7STony Prisk __func__);
118e9a91de7STony Prisk }
119e9a91de7STony Prisk if (gpio_base) {
120e9a91de7STony Prisk writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
121e9a91de7STony Prisk 0x80000000, gpio_base + VT8500_GPIO_MUX_REG);
122e9a91de7STony Prisk iounmap(gpio_base);
123e9a91de7STony Prisk } else
124e9a91de7STony Prisk pr_err("%s: Could not remap GPIO mux\n", __func__);
125e9a91de7STony Prisk
126e9a91de7STony Prisk of_node_put(fb);
127e9a91de7STony Prisk }
128e9a91de7STony Prisk #endif
129e9a91de7STony Prisk
130e9a91de7STony Prisk np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
131e9a91de7STony Prisk if (np) {
132e9a91de7STony Prisk pmc_base = of_iomap(np, 0);
133e9a91de7STony Prisk
134e9a91de7STony Prisk if (!pmc_base)
135e9a91de7STony Prisk pr_err("%s:of_iomap(pmc) failed\n", __func__);
136e9a91de7STony Prisk
137e9a91de7STony Prisk of_node_put(np);
138e9a91de7STony Prisk } else {
139e9a91de7STony Prisk pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
140e9a91de7STony Prisk if (!pmc_base)
141e9a91de7STony Prisk pr_err("%s:ioremap(power_off) failed\n", __func__);
142e9a91de7STony Prisk }
143e9a91de7STony Prisk if (pmc_base)
144e9a91de7STony Prisk pm_power_off = &vt8500_power_off;
145e9a91de7STony Prisk else
146e9a91de7STony Prisk pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
147e9a91de7STony Prisk }
148e9a91de7STony Prisk
149e9a91de7STony Prisk static const char * const vt8500_dt_compat[] = {
150e9a91de7STony Prisk "via,vt8500",
151e9a91de7STony Prisk "wm,wm8650",
152e9a91de7STony Prisk "wm,wm8505",
1538d31bfa5STony Prisk "wm,wm8750",
1548d31bfa5STony Prisk "wm,wm8850",
1559f8466c6SSrinivas Kandagatla NULL
156e9a91de7STony Prisk };
157e9a91de7STony Prisk
158e9a91de7STony Prisk DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
159e9a91de7STony Prisk .dt_compat = vt8500_dt_compat,
160e9a91de7STony Prisk .map_io = vt8500_map_io,
161e9a91de7STony Prisk .init_machine = vt8500_init,
162e9a91de7STony Prisk .restart = vt8500_restart,
163e9a91de7STony Prisk MACHINE_END
164e9a91de7STony Prisk
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