1 /* 2 * Copyright (C) 2008-2009 ST-Ericsson 3 * 4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2, as 8 * published by the Free Software Foundation. 9 * 10 */ 11 #include <linux/types.h> 12 #include <linux/init.h> 13 #include <linux/device.h> 14 #include <linux/amba/bus.h> 15 #include <linux/irq.h> 16 #include <linux/gpio.h> 17 #include <linux/platform_device.h> 18 #include <linux/io.h> 19 20 #include <asm/mach/map.h> 21 #include <mach/hardware.h> 22 #include <mach/setup.h> 23 #include <mach/devices.h> 24 25 static struct platform_device *platform_devs[] __initdata = { 26 &u8500_gpio_devs[0], 27 &u8500_gpio_devs[1], 28 &u8500_gpio_devs[2], 29 &u8500_gpio_devs[3], 30 &u8500_gpio_devs[4], 31 &u8500_gpio_devs[5], 32 &u8500_gpio_devs[6], 33 &u8500_gpio_devs[7], 34 &u8500_gpio_devs[8], 35 &u8500_dma40_device, 36 }; 37 38 /* minimum static i/o mapping required to boot U8500 platforms */ 39 static struct map_desc u8500_io_desc[] __initdata = { 40 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), 41 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 42 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), 43 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 44 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 45 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 46 __MEM_DEV_DESC(U8500_BOOT_ROM_BASE, SZ_1M), 47 }; 48 49 static struct map_desc u8500ed_io_desc[] __initdata = { 50 __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K), 51 __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K), 52 }; 53 54 static struct map_desc u8500v1_io_desc[] __initdata = { 55 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 56 }; 57 58 /* 59 * Functions to differentiate between later ASICs 60 * We look into the end of the ROM to locate the hardcoded ASIC ID. 61 * This is only needed to differentiate between minor revisions and 62 * process variants of an ASIC, the major revisions are encoded in 63 * the cpuid. 64 */ 65 #define U8500_ASIC_ID_LOC_ED_V1 (U8500_BOOT_ROM_BASE + 0x1FFF4) 66 #define U8500_ASIC_ID_LOC_V2 (U8500_BOOT_ROM_BASE + 0x1DBF4) 67 #define U8500_ASIC_REV_ED 0x01 68 #define U8500_ASIC_REV_V10 0xA0 69 #define U8500_ASIC_REV_V11 0xA1 70 #define U8500_ASIC_REV_V20 0xB0 71 72 /** 73 * struct db8500_asic_id - fields of the ASIC ID 74 * @process: the manufacturing process, 0x40 is 40 nm 75 * 0x00 is "standard" 76 * @partnumber: hithereto 0x8500 for DB8500 77 * @revision: version code in the series 78 * This field definion is not formally defined but makes 79 * sense. 80 */ 81 struct db8500_asic_id { 82 u8 process; 83 u16 partnumber; 84 u8 revision; 85 }; 86 87 /* This isn't going to change at runtime */ 88 static struct db8500_asic_id db8500_id; 89 90 static void __init get_db8500_asic_id(void) 91 { 92 u32 asicid; 93 94 if (cpu_is_u8500v1() || cpu_is_u8500ed()) 95 asicid = readl(__io_address(U8500_ASIC_ID_LOC_ED_V1)); 96 else if (cpu_is_u8500v2()) 97 asicid = readl(__io_address(U8500_ASIC_ID_LOC_V2)); 98 else 99 BUG(); 100 101 db8500_id.process = (asicid >> 24); 102 db8500_id.partnumber = (asicid >> 16) & 0xFFFFU; 103 db8500_id.revision = asicid & 0xFFU; 104 } 105 106 bool cpu_is_u8500v10(void) 107 { 108 return (db8500_id.revision == U8500_ASIC_REV_V10); 109 } 110 111 bool cpu_is_u8500v11(void) 112 { 113 return (db8500_id.revision == U8500_ASIC_REV_V11); 114 } 115 116 bool cpu_is_u8500v20(void) 117 { 118 return (db8500_id.revision == U8500_ASIC_REV_V20); 119 } 120 121 void __init u8500_map_io(void) 122 { 123 ux500_map_io(); 124 125 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 126 127 if (cpu_is_u8500ed()) 128 iotable_init(u8500ed_io_desc, ARRAY_SIZE(u8500ed_io_desc)); 129 else 130 iotable_init(u8500v1_io_desc, ARRAY_SIZE(u8500v1_io_desc)); 131 132 /* Read out the ASIC ID as early as we can */ 133 get_db8500_asic_id(); 134 } 135 136 /* 137 * This function is called from the board init 138 */ 139 void __init u8500_init_devices(void) 140 { 141 /* Display some ASIC boilerplate */ 142 pr_info("DB8500: process: %02x, revision ID: 0x%02x\n", 143 db8500_id.process, db8500_id.revision); 144 if (cpu_is_u8500ed()) 145 pr_info("DB8500: Early Drop (ED)\n"); 146 else if (cpu_is_u8500v10()) 147 pr_info("DB8500: version 1.0\n"); 148 else if (cpu_is_u8500v11()) 149 pr_info("DB8500: version 1.1\n"); 150 else if (cpu_is_u8500v20()) 151 pr_info("DB8500: version 2.0\n"); 152 else 153 pr_warning("ASIC: UNKNOWN SILICON VERSION!\n"); 154 155 ux500_init_devices(); 156 157 if (cpu_is_u8500ed()) 158 dma40_u8500ed_fixup(); 159 160 /* Register the platform devices */ 161 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 162 163 return ; 164 } 165