1 /* 2 * Copyright (C) 2008-2009 ST-Ericsson 3 * 4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2, as 8 * published by the Free Software Foundation. 9 * 10 */ 11 #include <linux/types.h> 12 #include <linux/init.h> 13 #include <linux/device.h> 14 #include <linux/amba/bus.h> 15 #include <linux/irq.h> 16 #include <linux/gpio.h> 17 #include <linux/platform_device.h> 18 #include <linux/io.h> 19 20 #include <asm/mach/map.h> 21 #include <mach/hardware.h> 22 #include <mach/setup.h> 23 #include <mach/devices.h> 24 25 #include "devices-db8500.h" 26 27 static struct platform_device *platform_devs[] __initdata = { 28 &u8500_dma40_device, 29 }; 30 31 /* minimum static i/o mapping required to boot U8500 platforms */ 32 static struct map_desc u8500_uart_io_desc[] __initdata = { 33 __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), 34 __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), 35 }; 36 37 static struct map_desc u8500_io_desc[] __initdata = { 38 __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K), 39 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), 40 __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), 41 __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K), 42 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 43 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), 44 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), 45 46 __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), 47 __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K), 48 __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K), 49 __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K), 50 __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K), 51 52 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), 53 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), 54 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 55 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 56 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 57 }; 58 59 static struct map_desc u8500_ed_io_desc[] __initdata = { 60 __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K), 61 __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K), 62 }; 63 64 static struct map_desc u8500_v1_io_desc[] __initdata = { 65 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 66 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE_V1, SZ_4K), 67 }; 68 69 static struct map_desc u8500_v2_io_desc[] __initdata = { 70 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 71 }; 72 73 void __init u8500_map_io(void) 74 { 75 /* 76 * Map the UARTs early so that the DEBUG_LL stuff continues to work. 77 */ 78 iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); 79 80 ux500_map_io(); 81 82 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 83 84 if (cpu_is_u8500ed()) 85 iotable_init(u8500_ed_io_desc, ARRAY_SIZE(u8500_ed_io_desc)); 86 else if (cpu_is_u8500v1()) 87 iotable_init(u8500_v1_io_desc, ARRAY_SIZE(u8500_v1_io_desc)); 88 else if (cpu_is_u8500v2()) 89 iotable_init(u8500_v2_io_desc, ARRAY_SIZE(u8500_v2_io_desc)); 90 } 91 92 static resource_size_t __initdata db8500_gpio_base[] = { 93 U8500_GPIOBANK0_BASE, 94 U8500_GPIOBANK1_BASE, 95 U8500_GPIOBANK2_BASE, 96 U8500_GPIOBANK3_BASE, 97 U8500_GPIOBANK4_BASE, 98 U8500_GPIOBANK5_BASE, 99 U8500_GPIOBANK6_BASE, 100 U8500_GPIOBANK7_BASE, 101 U8500_GPIOBANK8_BASE, 102 }; 103 104 static void __init db8500_add_gpios(void) 105 { 106 struct nmk_gpio_platform_data pdata = { 107 /* No custom data yet */ 108 }; 109 110 dbx500_add_gpios(ARRAY_AND_SIZE(db8500_gpio_base), 111 IRQ_DB8500_GPIO0, &pdata); 112 } 113 114 /* 115 * This function is called from the board init 116 */ 117 void __init u8500_init_devices(void) 118 { 119 if (cpu_is_u8500ed()) 120 dma40_u8500ed_fixup(); 121 122 db8500_add_rtc(); 123 db8500_add_gpios(); 124 125 platform_device_register_simple("cpufreq-u8500", -1, NULL, 0); 126 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 127 128 return ; 129 } 130