xref: /openbmc/linux/arch/arm/mach-ux500/cpu-db8500.c (revision a36954f5)
1 /*
2  * Copyright (C) 2008-2009 ST-Ericsson SA
3  *
4  * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2, as
8  * published by the Free Software Foundation.
9  *
10  */
11 #include <linux/types.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/amba/bus.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/irqchip.h>
18 #include <linux/irqchip/arm-gic.h>
19 #include <linux/mfd/dbx500-prcmu.h>
20 #include <linux/platform_data/arm-ux500-pm.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/of_platform.h>
26 #include <linux/perf/arm_pmu.h>
27 #include <linux/regulator/machine.h>
28 
29 #include <asm/outercache.h>
30 #include <asm/hardware/cache-l2x0.h>
31 #include <asm/mach/map.h>
32 #include <asm/mach/arch.h>
33 
34 #include "db8500-regs.h"
35 
36 static int __init ux500_l2x0_unlock(void)
37 {
38 	int i;
39 	struct device_node *np;
40 	void __iomem *l2x0_base;
41 
42 	np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
43 	l2x0_base = of_iomap(np, 0);
44 	of_node_put(np);
45 	if (!l2x0_base)
46 		return -ENODEV;
47 
48 	/*
49 	 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
50 	 * apparently locks both caches before jumping to the kernel. The
51 	 * l2x0 core will not touch the unlock registers if the l2x0 is
52 	 * already enabled, so we do it right here instead. The PL310 has
53 	 * 8 sets of registers, one per possible CPU.
54 	 */
55 	for (i = 0; i < 8; i++) {
56 		writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
57 			       i * L2X0_LOCKDOWN_STRIDE);
58 		writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
59 			       i * L2X0_LOCKDOWN_STRIDE);
60 	}
61 	iounmap(l2x0_base);
62 	return 0;
63 }
64 
65 static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
66 {
67 	/*
68 	 * We can't write to secure registers as we are in non-secure
69 	 * mode, until we have some SMI service available.
70 	 */
71 }
72 
73 /*
74  * FIXME: Should we set up the GPIO domain here?
75  *
76  * The problem is that we cannot put the interrupt resources into the platform
77  * device until the irqdomain has been added. Right now, we set the GIC interrupt
78  * domain from init_irq(), then load the gpio driver from
79  * core_initcall(nmk_gpio_init) and add the platform devices from
80  * arch_initcall(customize_machine).
81  *
82  * This feels fragile because it depends on the gpio device getting probed
83  * _before_ any device uses the gpio interrupts.
84 */
85 static void __init ux500_init_irq(void)
86 {
87 	struct device_node *np;
88 	struct resource r;
89 
90 	irqchip_init();
91 	np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
92 	of_address_to_resource(np, 0, &r);
93 	of_node_put(np);
94 	if (!r.start) {
95 		pr_err("could not find PRCMU base resource\n");
96 		return;
97 	}
98 	prcmu_early_init(r.start, r.end-r.start);
99 	ux500_pm_init(r.start, r.end-r.start);
100 
101 	/* Unlock before init */
102 	ux500_l2x0_unlock();
103 	outer_cache.write_sec = ux500_l2c310_write_sec;
104 }
105 
106 static void ux500_restart(enum reboot_mode mode, const char *cmd)
107 {
108 	local_irq_disable();
109 	local_fiq_disable();
110 
111 	prcmu_system_reset(0);
112 }
113 
114 /*
115  * The PMU IRQ lines of two cores are wired together into a single interrupt.
116  * Bounce the interrupt to the other core if it's not ours.
117  */
118 static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
119 {
120 	irqreturn_t ret = handler(irq, dev);
121 	int other = !smp_processor_id();
122 
123 	if (ret == IRQ_NONE && cpu_online(other))
124 		irq_set_affinity(irq, cpumask_of(other));
125 
126 	/*
127 	 * We should be able to get away with the amount of IRQ_NONEs we give,
128 	 * while still having the spurious IRQ detection code kick in if the
129 	 * interrupt really starts hitting spuriously.
130 	 */
131 	return ret;
132 }
133 
134 static struct arm_pmu_platdata db8500_pmu_platdata = {
135 	.handle_irq		= db8500_pmu_handler,
136 };
137 
138 static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
139 	/* Requires call-back bindings. */
140 	OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
141 	{},
142 };
143 
144 static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
145 	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
146 	{},
147 };
148 
149 static const struct of_device_id u8500_local_bus_nodes[] = {
150 	/* only create devices below soc node */
151 	{ .compatible = "stericsson,db8500", },
152 	{ .compatible = "stericsson,db8500-prcmu", },
153 	{ .compatible = "simple-bus"},
154 	{ },
155 };
156 
157 static void __init u8500_init_machine(void)
158 {
159 	/* automatically probe child nodes of dbx5x0 devices */
160 	if (of_machine_is_compatible("st-ericsson,u8540"))
161 		of_platform_populate(NULL, u8500_local_bus_nodes,
162 				     u8540_auxdata_lookup, NULL);
163 	else
164 		of_platform_populate(NULL, u8500_local_bus_nodes,
165 				     u8500_auxdata_lookup, NULL);
166 }
167 
168 static const char * stericsson_dt_platform_compat[] = {
169 	"st-ericsson,u8500",
170 	"st-ericsson,u8540",
171 	"st-ericsson,u9500",
172 	"st-ericsson,u9540",
173 	NULL,
174 };
175 
176 DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
177 	.l2c_aux_val    = 0,
178 	.l2c_aux_mask	= ~0,
179 	.init_irq	= ux500_init_irq,
180 	.init_machine	= u8500_init_machine,
181 	.dt_compat      = stericsson_dt_platform_compat,
182 	.restart        = ux500_restart,
183 MACHINE_END
184