1 /* 2 * Copyright (C) 2008-2009 ST-Ericsson SA 3 * 4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2, as 8 * published by the Free Software Foundation. 9 * 10 */ 11 #include <linux/types.h> 12 #include <linux/init.h> 13 #include <linux/device.h> 14 #include <linux/amba/bus.h> 15 #include <linux/interrupt.h> 16 #include <linux/irq.h> 17 #include <linux/platform_device.h> 18 #include <linux/io.h> 19 #include <linux/mfd/abx500/ab8500.h> 20 #include <linux/mfd/dbx500-prcmu.h> 21 #include <linux/of.h> 22 #include <linux/of_platform.h> 23 #include <linux/regulator/machine.h> 24 #include <linux/platform_data/pinctrl-nomadik.h> 25 #include <linux/random.h> 26 27 #include <asm/pmu.h> 28 #include <asm/mach/map.h> 29 #include <asm/mach/arch.h> 30 #include <asm/hardware/gic.h> 31 32 #include <mach/hardware.h> 33 #include <mach/setup.h> 34 #include <mach/devices.h> 35 #include <mach/db8500-regs.h> 36 #include <mach/irqs.h> 37 38 #include "devices-db8500.h" 39 #include "ste-dma40-db8500.h" 40 #include "board-mop500.h" 41 42 /* minimum static i/o mapping required to boot U8500 platforms */ 43 static struct map_desc u8500_uart_io_desc[] __initdata = { 44 __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), 45 __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), 46 }; 47 /* U8500 and U9540 common io_desc */ 48 static struct map_desc u8500_common_io_desc[] __initdata = { 49 /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ 50 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), 51 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), 52 __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), 53 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), 54 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), 55 56 __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), 57 __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K), 58 __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K), 59 __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K), 60 __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K), 61 62 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), 63 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), 64 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), 65 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), 66 }; 67 68 /* U8500 IO map specific description */ 69 static struct map_desc u8500_io_desc[] __initdata = { 70 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), 71 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), 72 73 }; 74 75 /* U9540 IO map specific description */ 76 static struct map_desc u9540_io_desc[] __initdata = { 77 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K), 78 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K), 79 }; 80 81 void __init u8500_map_io(void) 82 { 83 /* 84 * Map the UARTs early so that the DEBUG_LL stuff continues to work. 85 */ 86 iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); 87 88 ux500_map_io(); 89 90 iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc)); 91 92 if (cpu_is_ux540_family()) 93 iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); 94 else 95 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 96 97 _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); 98 } 99 100 static struct resource db8500_pmu_resources[] = { 101 [0] = { 102 .start = IRQ_DB8500_PMU, 103 .end = IRQ_DB8500_PMU, 104 .flags = IORESOURCE_IRQ, 105 }, 106 }; 107 108 /* 109 * The PMU IRQ lines of two cores are wired together into a single interrupt. 110 * Bounce the interrupt to the other core if it's not ours. 111 */ 112 static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler) 113 { 114 irqreturn_t ret = handler(irq, dev); 115 int other = !smp_processor_id(); 116 117 if (ret == IRQ_NONE && cpu_online(other)) 118 irq_set_affinity(irq, cpumask_of(other)); 119 120 /* 121 * We should be able to get away with the amount of IRQ_NONEs we give, 122 * while still having the spurious IRQ detection code kick in if the 123 * interrupt really starts hitting spuriously. 124 */ 125 return ret; 126 } 127 128 struct arm_pmu_platdata db8500_pmu_platdata = { 129 .handle_irq = db8500_pmu_handler, 130 }; 131 132 static struct platform_device db8500_pmu_device = { 133 .name = "arm-pmu", 134 .id = -1, 135 .num_resources = ARRAY_SIZE(db8500_pmu_resources), 136 .resource = db8500_pmu_resources, 137 .dev.platform_data = &db8500_pmu_platdata, 138 }; 139 140 static struct platform_device db8500_prcmu_device = { 141 .name = "db8500-prcmu", 142 }; 143 144 static struct platform_device *platform_devs[] __initdata = { 145 &u8500_dma40_device, 146 &db8500_pmu_device, 147 &db8500_prcmu_device, 148 }; 149 150 static resource_size_t __initdata db8500_gpio_base[] = { 151 U8500_GPIOBANK0_BASE, 152 U8500_GPIOBANK1_BASE, 153 U8500_GPIOBANK2_BASE, 154 U8500_GPIOBANK3_BASE, 155 U8500_GPIOBANK4_BASE, 156 U8500_GPIOBANK5_BASE, 157 U8500_GPIOBANK6_BASE, 158 U8500_GPIOBANK7_BASE, 159 U8500_GPIOBANK8_BASE, 160 }; 161 162 static void __init db8500_add_gpios(struct device *parent) 163 { 164 struct nmk_gpio_platform_data pdata = { 165 .supports_sleepmode = true, 166 }; 167 168 dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base), 169 IRQ_DB8500_GPIO0, &pdata); 170 dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE); 171 } 172 173 static int usb_db8500_rx_dma_cfg[] = { 174 DB8500_DMA_DEV38_USB_OTG_IEP_1_9, 175 DB8500_DMA_DEV37_USB_OTG_IEP_2_10, 176 DB8500_DMA_DEV36_USB_OTG_IEP_3_11, 177 DB8500_DMA_DEV19_USB_OTG_IEP_4_12, 178 DB8500_DMA_DEV18_USB_OTG_IEP_5_13, 179 DB8500_DMA_DEV17_USB_OTG_IEP_6_14, 180 DB8500_DMA_DEV16_USB_OTG_IEP_7_15, 181 DB8500_DMA_DEV39_USB_OTG_IEP_8 182 }; 183 184 static int usb_db8500_tx_dma_cfg[] = { 185 DB8500_DMA_DEV38_USB_OTG_OEP_1_9, 186 DB8500_DMA_DEV37_USB_OTG_OEP_2_10, 187 DB8500_DMA_DEV36_USB_OTG_OEP_3_11, 188 DB8500_DMA_DEV19_USB_OTG_OEP_4_12, 189 DB8500_DMA_DEV18_USB_OTG_OEP_5_13, 190 DB8500_DMA_DEV17_USB_OTG_OEP_6_14, 191 DB8500_DMA_DEV16_USB_OTG_OEP_7_15, 192 DB8500_DMA_DEV39_USB_OTG_OEP_8 193 }; 194 195 static const char *db8500_read_soc_id(void) 196 { 197 void __iomem *uid = __io_address(U8500_BB_UID_BASE); 198 199 /* Throw these device-specific numbers into the entropy pool */ 200 add_device_randomness(uid, 0x14); 201 return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x", 202 readl((u32 *)uid+1), 203 readl((u32 *)uid+1), readl((u32 *)uid+2), 204 readl((u32 *)uid+3), readl((u32 *)uid+4)); 205 } 206 207 static struct device * __init db8500_soc_device_init(void) 208 { 209 const char *soc_id = db8500_read_soc_id(); 210 211 return ux500_soc_device_init(soc_id); 212 } 213 214 /* 215 * This function is called from the board init 216 */ 217 struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500) 218 { 219 struct device *parent; 220 int i; 221 222 parent = db8500_soc_device_init(); 223 224 db8500_add_rtc(parent); 225 db8500_add_gpios(parent); 226 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 227 228 for (i = 0; i < ARRAY_SIZE(platform_devs); i++) 229 platform_devs[i]->dev.parent = parent; 230 231 db8500_prcmu_device.dev.platform_data = ab8500; 232 233 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); 234 235 return parent; 236 } 237 238 #ifdef CONFIG_MACH_UX500_DT 239 240 /* TODO: Once all pieces are DT:ed, remove completely. */ 241 static struct device * __init u8500_of_init_devices(void) 242 { 243 struct device *parent = db8500_soc_device_init(); 244 245 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); 246 247 u8500_dma40_device.dev.parent = parent; 248 249 /* 250 * Devices to be DT:ed: 251 * u8500_dma40_device = todo 252 * db8500_pmu_device = done 253 * db8500_prcmu_device = done 254 */ 255 platform_device_register(&u8500_dma40_device); 256 257 return parent; 258 } 259 260 static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 261 /* Requires call-back bindings. */ 262 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 263 /* Requires DMA bindings. */ 264 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), 265 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), 266 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), 267 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), 268 OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data), 269 OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data), 270 OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data), 271 OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data), 272 /* Requires clock name bindings. */ 273 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL), 274 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL), 275 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL), 276 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL), 277 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL), 278 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL), 279 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL), 280 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL), 281 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL), 282 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL), 283 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL), 284 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL), 285 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), 286 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), 287 /* Requires device name bindings. */ 288 OF_DEV_AUXDATA("stericsson,nmk_pinctrl", U8500_PRCMU_BASE, 289 "pinctrl-db8500", NULL), 290 /* Requires clock name and DMA bindings. */ 291 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, 292 "ux500-msp-i2s.0", &msp0_platform_data), 293 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, 294 "ux500-msp-i2s.1", &msp1_platform_data), 295 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000, 296 "ux500-msp-i2s.2", &msp2_platform_data), 297 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000, 298 "ux500-msp-i2s.3", &msp3_platform_data), 299 {}, 300 }; 301 302 static const struct of_device_id u8500_local_bus_nodes[] = { 303 /* only create devices below soc node */ 304 { .compatible = "stericsson,db8500", }, 305 { .compatible = "stericsson,db8500-prcmu", }, 306 { .compatible = "simple-bus"}, 307 { }, 308 }; 309 310 static void __init u8500_init_machine(void) 311 { 312 struct device *parent = NULL; 313 314 /* Pinmaps must be in place before devices register */ 315 if (of_machine_is_compatible("st-ericsson,mop500")) 316 mop500_pinmaps_init(); 317 else if (of_machine_is_compatible("calaosystems,snowball-a9500")) 318 snowball_pinmaps_init(); 319 else if (of_machine_is_compatible("st-ericsson,hrefv60+")) 320 hrefv60_pinmaps_init(); 321 else if (of_machine_is_compatible("st-ericsson,ccu9540")) {} 322 /* TODO: Add pinmaps for ccu9540 board. */ 323 324 /* TODO: Export SoC, USB, cpu-freq and DMA40 */ 325 parent = u8500_of_init_devices(); 326 327 /* automatically probe child nodes of db8500 device */ 328 of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent); 329 } 330 331 static const char * stericsson_dt_platform_compat[] = { 332 "st-ericsson,u8500", 333 "st-ericsson,u8540", 334 "st-ericsson,u9500", 335 "st-ericsson,u9540", 336 NULL, 337 }; 338 339 DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)") 340 .smp = smp_ops(ux500_smp_ops), 341 .map_io = u8500_map_io, 342 .init_irq = ux500_init_irq, 343 /* we re-use nomadik timer here */ 344 .timer = &ux500_timer, 345 .handle_irq = gic_handle_irq, 346 .init_machine = u8500_init_machine, 347 .init_late = NULL, 348 .dt_compat = stericsson_dt_platform_compat, 349 MACHINE_END 350 351 #endif 352